Patents Examined by Jue Zhang
  • Patent number: 11929689
    Abstract: A power conversion device includes: a dead time application unit which applies a dead time to only one of a pair of pulse signals; a current polarity detection unit which detects a polarity of an output current; and a gate signal selection unit which, if the polarity of the output current is positive, selects the one pulse signal, to which the dead time has been applied, as a gate signal for a positive arm and selects the other pulse signal as a gate signal for a negative arm, and, if the polarity of the output current is negative, selects the one pulse signal, to which the dead time has been applied, as the gate signal for the negative arm and selects the other pulse signal as the gate signal for the positive arm.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 12, 2024
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Ryoji Tsuruta, Hiroshi Masunaga, Tomohiro Tanaka
  • Patent number: 11929672
    Abstract: A power converter and a corresponding method of converting power are presented. The power converter includes a ground port, an input port for receiving an input voltage and an output port for providing an output voltage; an inductor; a flying capacitor; a network of switches; and a driver to drive the network of switches with a sequence of states during a drive period. The sequence of states includes a first state and a second state. In the first state one of the input port and the output port is coupled to the ground port via a first path comprising the inductor. In the second state the remaining state among the input port and the output port is coupled to the ground port via a second path and a third path, the second path comprising the flying capacitor and bypassing the inductor, and the third path comprising the inductor.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: March 12, 2024
    Assignee: Renesas Design (UK) Limited
    Inventor: Holger Petersen
  • Patent number: 11923769
    Abstract: The control system includes a PFC circuit and a sampling control circuit, and the PFC circuit includes an inductor, a first power supply drive circuit, and a first bridge arm and a second bridge arm that are connected in parallel, and a first bridge arm midpoint is a serial connection point between a first upper bridge arm and a first lower bridge arm of the first bridge arm. The sampling control circuit is configured to control, based on voltages of two ends of an alternating current power supply, the first lower bridge arm to be turned on, so that the first power supply drive circuit starts charging. The sampling control circuit is further configured to: when charging duration of the first power supply drive circuit reaches first target duration, control the first lower bridge arm to be turned off, so that the first power supply drive circuit completes charging.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: March 5, 2024
    Assignee: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
    Inventors: Ken Chin, Shanglin Mo, Yuanjun Liu
  • Patent number: 11921533
    Abstract: Example implementations include a bandgap voltage device with a first current source operatively coupled to a bandgap input node and a bandgap output node and operable to output a first proportional-to-absolute-temperature (PTAT) current, a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror and operable to output a second PTAT current.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: March 5, 2024
    Assignee: Renesas Electronics America Inc.
    Inventor: Anurag Kaplish
  • Patent number: 11914410
    Abstract: Described embodiments include a circuit for controlling a voltage drop. The circuit includes a resistor coupled between an output voltage terminal and a reference voltage terminal. First, second and third switches each have respective first, second and third switch terminals. The respective second switch terminals are connected together and are coupled to the output voltage terminal. The respective third switch terminals are connected together and are coupled to the reference voltage terminal. A first transistor is coupled between a supply voltage terminal and the first switch. A second transistor is coupled between the supply voltage terminal and the second switch. A third transistor is coupled between the supply voltage terminal and the third switch. Control terminals of the first, second and third transistors are coupled to a gate control terminal.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: February 27, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Rajat Chauhan
  • Patent number: 11916438
    Abstract: A magnetization ring is disposed between a rotor and a core portion surrounding the rotor, the rotor having permanent magnets and inter-pole portions which are arranged in a circumferential direction about an axis. The magnetization ring has a magnetic portion facing the center of the permanent magnet in the circumferential direction, and a nonmagnetic portion facing the inter-pole portion of the rotor.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: February 27, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takanori Watanabe, Atsushi Matsuoka, Atsushi Ishikawa
  • Patent number: 11916512
    Abstract: An embodiment provides a DC-DC converter for sensing a grounded state and a method for controlling same in a photovoltaic energy storage system. Specifically, the converter can sense a grounded state on the basis of the magnitude of voltage applied to a resistor and provide a notification.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: February 27, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sang Gyu Choi, Jae Geun Lee, Jeong Heum Lee
  • Patent number: 11914412
    Abstract: In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: February 27, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sanjeev Praphulla Chandra Nyshadham, Subrato Roy
  • Patent number: 11906999
    Abstract: Described embodiments include a circuit for dampening overshoot in a voltage regulator. The circuit includes a first and second offset voltage circuits, each having an input coupled to an input voltage terminal. A first comparator has a first comparator input coupled to the first offset output, and a second comparator input coupled to a reference voltage terminal. A second comparator has a third comparator input coupled to an output of the second offset circuit, and a fourth comparator input coupled to a voltage regulator output. An OR gate has first and second logic inputs and a logic output. The first and second logic inputs are coupled to the outputs of the first and second comparators, respectively. A turn-off circuit has a turn-off input coupled to the logic output, and is configured to provide a turn-off signal at a turn-off output to stop current flow from the voltage regulator output.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: February 20, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saurabh Rai, Venkateswarlu Ramaswamy Tiruvamattur, Ramakrishna Ankamreddi
  • Patent number: 11906995
    Abstract: A voltage regulator coupled between a first node and second node includes a first (full-power) regulator circuit and a second (low-power) regulator circuit. In a first mode: the first regulator circuit is activated (with the second regulator circuit inactive) when the voltage at the first node is a battery voltage, and the voltage regulator is kept de-activated when the voltage at the first node is a ground voltage. In a second mode: the first regulator circuitry in is active (with the second regulator circuitry inactive) when the voltage at the first node is a battery voltage, and the voltage regulator is inactive when the voltage at the first node is a ground voltage. In a third mode: the second regulator circuitry is active (with the first regulator circuitry inactive) irrespective of the voltage at the first node being at the battery voltage or the ground voltage.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: February 20, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniele Mangano, Francesco Clerici, Pasquale Butta'
  • Patent number: 11909271
    Abstract: A rotating machine includes: an electric motor that includes a stator and a rotor that is rotatable relative to the stator; a rotary member to be rotated that is provided on the shaft; and a fastening member made of magnetic material and provided to fasten the rotary member to a shaft. The rotor includes: a rotor core made of magnetic material; a plurality of permanent magnets attached to the rotor core such that the permanent magnets are spaced from each other in a circumferential direction and magnetic poles of the permanent magnets that face an outer peripheral side of the rotor core in a radius direction of the rotor core have the same magnetic polarity; and the shaft. The shaft is made of magnetic material, provided to extend through a central part of the rotor core in an axial direction of the rotor core, and magnetized by part of magnetic fluxes generated from the permanent magnets.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: February 20, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuma Nomoto, Hiroki Aso, Ryogo Takahashi
  • Patent number: 11908614
    Abstract: This application relates to an active current compensation device which actively compensates for a noise occurring in a common mode in each of two or more high-current paths. In one aspect, the active current compensation device includes a sensing unit configured to generate an output signal corresponding to a common-mode noise current on each of the two or more high-current paths, and an amplification unit configured to amplify the output signal to generate an amplified current. The device may also include a compensation unit configured to generate a compensation current on the basis of the amplified current and allow the compensation current to flow to each of the two or more high-current paths, and a malfunction detection unit configured to detect a malfunction of the amplification unit. The malfunction detection unit and at least a portion of the amplification unit may be embedded in one integrated circuit (IC) chip.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 20, 2024
    Assignees: UNIST (Ulsan National Institute of Science and Technology)
    Inventors: Jin Gook Kim, Sang Yeong Jeong
  • Patent number: 11909326
    Abstract: An apparatus includes an isolated power converter having an input connected to an input dc power source, a first output and a second output, and a non-isolated power converter having an input connected to the second output of the isolated power converter, wherein the first output of the isolated power converter and an output of the non-isolated power converter are connected in series.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: February 20, 2024
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Heping Dai, Liming Ye, Dianbo Fu, Daoshen Chen
  • Patent number: 11909316
    Abstract: Circuits and methods for protecting the switches of charge pump-based power converters from damage if a VOUT short circuit event occurs and/or if VIN falls rapidly with respect to VX or VOUT. A general embodiment includes a VX Detection Block coupled to the core block of a power converter. The VX Detection Block is coupled to VX and to a control circuit that disables operations of an associated converter circuit upon detection of large, rapid falls in VX during the dead time between clock phase signals, thereby prevent damaging current spikes. Some embodiments include a VIN Detection Block configured to detect and prevent excessive in-rush current due to rapidly falling values of VIN to the power converter. The VIN Detection Block is coupled to VIN, and to VX or VOUT in some embodiments, and to a control circuit to that disables operation of an associated converter circuit.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: February 20, 2024
    Assignee: pSemi Corporation
    Inventor: Antony Christopher Routledge
  • Patent number: 11909331
    Abstract: A power supply includes an inverter configured to direct current (DC) power into alternating current (AC) power, an impedance matching circuit configured to supply the AC power to a load; and a controller configured to adjust disposition of a powering period, in which the AC power is output, and a freewheeling period, in which the AC power is not output, to adjust a power amount of the power supplied to the load through the impedance matching circuit by the inverter.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: February 20, 2024
    Assignee: EN2CORE TECHNOLOGY, INC.
    Inventors: Yeong-Hoon Sohn, Se-Hong Park, Sae-Hoon Uhm
  • Patent number: 11909287
    Abstract: A motor has: a housing; a stator disposed inside the housing; a rotor disposed inside the stator; and a shaft coupled to the rotor. The stator has a stator core, an insulator disposed on the stator core, and a coil wound around the insulator. The insulator has: a first body; an inside guide protruding from the inside of the first body; an outside guide protruding from the outside of the first body; a first blade portion disposed to be spaced apart from one side of the first body and to protrude from the outside guide in the radial direction; a second blade portion disposed to be spaced apart from the other side of the first body and to protrude from the outside guide in the radial direction; and a protruding portion extending from one radial side of the first blade portion.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: February 20, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Tae Ho Kim
  • Patent number: 11909351
    Abstract: An inline DC feeder DC/DC voltage step-up harness for photovoltaic solar facilities includes a housing, a plurality of PV input connectors, an at least one PV output connector. The housing incorporates a DC/DC converter, and has an input and an output. The plurality of PV input connectors are operatively connected to the housing at the input. The PV output connector is operatively connected to the housing at the output.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: February 20, 2024
    Assignee: ADERIS ENERGY, LLC
    Inventors: Olee Joel Olsen, Jr., Adam Will Foodman, Bradley Allan Micallef
  • Patent number: 11907000
    Abstract: Solar power systems and methods utilize DC power transmission and centralized power inversion. The solar power systems include a photovoltaic (PV) bus system and a fixed bus system. The PV system utilizes a control mode handoff control method, which includes determining that a local maximum power point tracking (MPPT) control is enabled; in response to determining that the local MPPT control is enabled, starting an MPPT mode timer; performing local MPPT; determining that the MPPT mode timer is greater than a predetermined period; and, in response to determining that the MPPT mode timer is greater than a predetermined period, handing off MPPT control to the next MPPT controller. The distributed MPPT control method may include sequential MPPT control, adaptive ?V MPPT control, and/or power limiting control. The fixed bus system includes PV string-level MPPT controllers and a fixed DC input central inverter or multiple fixed DC modular inverters.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: February 20, 2024
    Assignee: NEXTRACKER LLC
    Inventors: Yang Liu, Alexander W. Au, Fei Gu
  • Patent number: 11899480
    Abstract: A voltage regulator circuit can include two feedback loops, such as to reduce or suppress an unwanted transient condition in an output voltage during transient conditions such as during startup or during load current demand transients. One of the two feedback loops can include a shunt device arranged to provide a temporary current pathway during the transient condition to change current provided to a load connected to an output of the voltage regulation circuit. In addition, or instead, the voltage regulator circuit can include an open-loop regulation circuit separate from a loop corresponding to the first error amplifier. The open-loop regulator circuit can operate in a lower-power mode as compared to a closed-loop regulator circuit. A portion or an entirety of the voltage regulator circuit can be implemented in an integrated circuit, such as monolithically.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: February 13, 2024
    Assignee: Analog Devices, Inc.
    Inventors: Colin Tse, James Lin
  • Patent number: 11901818
    Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: February 13, 2024
    Assignee: pSemi Corporation
    Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.