Abstract: An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.

Abstract: This disclosure pertains to a system for cooling an electric motor including a rotor which is connected to an output shaft, a stator disposed about the rotor, a casing in which the stator and rotor are disposed, and a cooling assembly. The cooling assembly includes an inlet configured to deliver coolant into the casing and directly onto the stator to cool the stator and an outlet configured to remove the coolant from the casing. The stator is a major source of heat within the electric motor and applying coolant directly to onto the stator is an effective method of cooling the motor.

Abstract: Circuitry and methods for an improved gate driver circuit for power converters. The improved gate driver circuit substantially reduces propagation delay and transition losses in the floating-gate side of the gate driver circuit. One embodiment includes an inverter having an input configured to receive a state transition signal and an output configured to be coupled to a control input of a switching device. The inverter includes a first NFET having a control gate configured to be coupled to the state transition signal, a second NFET having a control gate coupled to the output of a reference circuit, and a PFET having a control gate configured to be coupled to the state transition signal, wherein the output of the inverter is a node between the conduction channels of the first NFET and the second NFET and the conduction channels of the first NFET, second NFET, and PFET are coupled in series.

Abstract: A bandgap reference circuit includes a first current generator having first and second bipolar transistors for generating a first current that varies proportionally as a function of temperature. A second current generator includes a field effect transistor for generating a second current that varies inversely as a function of temperature. A trimming circuit includes a third bipolar transistor sized to match the first bipolar transistor, a third current generator having a second field effect transistor coupled to a collector and base of the third bipolar transistor to generate a third current based on a base current of the third bipolar transistor, and a trim control circuit configured to modify the second current by adding the third current to or subtracting the third current from the second current based on a trim control signal. A bandgap reference current is generated by summing the first current and the modified second current.

Abstract: An electrostatic chuck including a workpiece support surface, clamping layer, heating layer, thermal control system, and sealing band is disclosed. The sealing band surrounds an outer perimeter of the electrostatic chuck including at least a portion of the workpiece surface. The sealing band has a width greater than about 3 millimeters (mm) up to about 10 mm. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

Abstract: A system for driving four-quadrant (4Q) switches of a power converter is provided herein and comprises a transformer driver module, a first gate driver module and a second gate driver module coupled to the transformer driver module via a first isolation transformer and a second isolation transformer, respectively, for receiving both switch signal information and power, and a first bidirectional switch and a second bidirectional switch coupled to the first gate driver module and the second gate driver module and to one another for driving the first bidirectional switch and the second bidirectional switch based on the switch signal information.

Abstract: A power converter circuit. In one aspect, the power converter circuit includes a first buck converter coupled in series to a second buck converter at a junction, and a control circuit coupled to each of the first and second buck converters. In another aspect, the control circuit is arranged to continuously operate the first buck converter, sense a voltage at the junction, compare the sensed voltage to a first threshold voltage and in response to the sensed voltage being at a voltage lower than the first threshold voltage disables the second buck converter. In yet another aspect, the control circuit is arranged to continuously operate the first buck converter, compare the sensed voltage to a second threshold voltage and in response to the sensed voltage being at a voltage higher than the second threshold voltage, the control circuit operates the second buck converter.

Abstract: Described embodiments include a circuit for dampening overshoot in a voltage regulator. The circuit includes a first and second offset voltage circuits, each having an input coupled to an input voltage terminal. A first comparator has a first comparator input coupled to the first offset output, and a second comparator input coupled to a reference voltage terminal. A second comparator has a third comparator input coupled to an output of the second offset circuit, and a fourth comparator input coupled to a voltage regulator output. An OR gate has first and second logic inputs and a logic output. The first and second logic inputs are coupled to the outputs of the first and second comparators, respectively. A turn-off circuit has a turn-off input coupled to the logic output, and is configured to provide a turn-off signal at a turn-off output to stop current flow from the voltage regulator output.

Abstract: A power converter includes a converter, a smoothing capacitor, an inverter, and a single calculator. The converter includes a switching element and rectifies a power supply voltage applied from an alternating-current power supply. The smoothing capacitor smooths a rectified voltage output from the converter into a direct-current voltage including a ripple. The inverter converts the direct-current voltage smoothed by the smoothing capacitor into an alternating-current voltage for a motor. The calculator performs control such that a first physical quantity representing an operation state of the converter is equal to a second physical quantity representing an operation state of the inverter.

Abstract: An electrical component having a DC link capacitor and an EMC filter. The electrical component includes an input port and an output port. The EMC filter includes a first filter stage and a second filter stage. The first filter stage is arranged between the input port and the DC link capacitor, and the second filter stage is arranged between the output port and the DC link capacitor. Another aspect concerns a method for manufacturing an electronic component.

Abstract: An open-loop inductor current emulating circuit is provided. A current sensor circuit senses a current flowing through a first terminal of a low-side switch to output a current sensed signal. An emulation controller circuit outputs a plurality of charging current signals according to currents of a plurality of rising waveforms of the current sensed signal. The emulation controller circuit outputs a plurality of discharging current signals according to currents of a plurality of falling waveforms of the current sensed signal. A charging and discharging circuit generates a plurality of charging currents according to the charging current signals, and generates a plurality of discharging currents according to the discharging current signals. The charging and discharging circuit alternatively outputs the charging currents and the discharging currents to the capacitor to charge and discharge the capacitor multiple times, thereby achieving a purpose of emulating an inductor current.

Abstract: An air conditioner is connected to an AC power source. The air conditioner includes an adjustment unit and a control unit. The adjustment unit adjusts apparent power at a power source input terminal of the air conditioner. The control unit controls the adjustment unit, based on information according to a target value of apparent power to be supplied to the AC power source from the air conditioner.

Abstract: A method for reducing current ripple at an output of a power supply includes sensing an alternating current (AC) input voltage waveform; determining a correction factor for a switching frequency of the power supply based on the sensed AC input voltage; and applying the correction factor to the switching frequency of the power supply to modify the power supply switching frequency. A modification of the switching frequency synchronizes the switching frequency of the power supply to the AC input voltage waveform.

Abstract: A power converter arrangement with a modular multi-level converter which includes a series circuit of switch modules which each have a plurality of semiconductor switches and an energy source. Some of the switch modules are of a first type and others of the switch modules are of a second type. During operation, a positive switch module voltage, a negative voltage module voltage, or a null voltage is generated at connection terminals of the switch modules of the first type, and a positive switch module voltage or a null voltage can be generated at connection terminals of the switch modules of the second type. The power converter arrangement further contains a support structure having a number of levels, which each have receptacles in which the switch modules are arranged, with both switch modules of the first and second type being arranged in each level of the support structure.

Abstract: Systems and methods as described herein may take a variety of forms. In an example, a circuit includes a first voltage stepdown module and a second voltage stepdown module. The first voltage stepdown module has a supply voltage and a first reference voltage as inputs, and an intermediate stepped down voltage as an output, the intermediate stepped down voltage being electrically coupled to a feedback input of the first voltage stepdown module. The second voltage stepdown module includes a low-dropout voltage regulator having the intermediate stepped down voltage and a second reference voltage as inputs and a target voltage as an output.

Abstract: Systems and methods relating to the integration of energy storage subsystems into components for use with systems that harvest energy from PV panels and convert that energy for use with a power grid. Various configurations of converters that integrate energy storage cells and the inverters that use such converters are presented. Half-bridge and full bridge configurations for the converters are presented. The integrated energy storage cells may be battery cells, supercapacitor cells, or a combination of the two. Digital control systems for controlling the converters as well as the charge and discharge cycles for the energy storage cells are also presented.

Abstract: A power system, responsive to a detected change in an onboard charger or a generator, switches a converter from a first conversion setting, in which a first low voltage value of a medium-voltage bus port is converted to a first high voltage value of a high-voltage bus port, to a second conversion setting, in which a second low voltage value of the medium-voltage bus port is converted to the first high voltage value of the high-voltage bus port.

Abstract: In a switching power supply device, a control circuit controls a first thyristor, a second thyristor, and a switching element according to an input voltage. The control circuit maintains the first thyristor in an on state while maintaining the second thyristor and the switching element in an off state in a first period in which the absolute amplitude value is equal to or less than a first threshold value within the latter half of a first half-cycle of the input voltage at startup, and maintains the second thyristor in an on state while maintaining the first thyristor and the switching element in an off state in a second period in which the absolute amplitude value is equal to or less than a second threshold value within the latter half of a second half-cycle of the input voltage at startup. The second half-cycle is the half-cycle following the first half-cycle.

Abstract: A power conversion apparatus and a control method for a power conversion apparatus to reduce an amplitude of an output voltage of a converter when a grid is recovered from a fault, to ensure device safety. The power conversion apparatus includes a controller and a converter, and the controller is connected to the converter. The controller is configured to: after the output voltage of the converter is less than a first threshold, when the output voltage of the converter rises to be greater than a second threshold, reduce an active current output by the converter to a first current value, and reduce a reactive current output by the converter to a second current value, where the second threshold is greater than the first threshold.