Patents Examined by K. Jaconetty
  • Patent number: 4499120
    Abstract: Method and apparatus which allows the component leads of pre-taped electronic components to be solder tinned to preserve the solderability and shelf life of such component leads. Pre-taped electronic components and the like are prepackaged in a reel and positioned in the apparatus such that the reel is free to rotate. Both leads of each component are secured to corresponding adjacent component leads by tape. The electronic components are moved through a plurality of processing stages such that one lead of each component is solder tinned, one of the processing stages removing the tape from the leads to enable the soldering thereof. After soldering of the leads, tape is applied thereto. The process is then repeated for the other leads of each component.
    Type: Grant
    Filed: October 6, 1983
    Date of Patent: February 12, 1985
    Assignee: General Dynamics, Pomona Division
    Inventor: George C. Marshall, Jr.
  • Patent number: 4496610
    Abstract: A method in which a phosphor film of manganese doped zinc chalcogenide is produced by chemical vapor deposition from alkyl zinc vapor and the gaseous hydride of the chalcogen. The manganese dopant is introduced uniformly during deposition by decomposition of tricarbonyl alkylcyclopentadienyl manganese: ##STR1## where here R denotes the alkyl radical. Preferably dimethyl zinc and tricarbonyl methylcyclopentadienyl manganese are used.The phosphor produced may be one of the following manganese doped compounds: zinc sulphide, zinc selenide, zinc sulphur selenide, zinc oxy-sulphide, zinc oxy-selenide or zinc cadmium sulphide.
    Type: Grant
    Filed: March 22, 1983
    Date of Patent: January 29, 1985
    Assignee: The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Northern Ireland
    Inventors: Alan F. Cattell, Brian Cockayne, Peter J. Wright, John Kirton
  • Patent number: 4493855
    Abstract: Pinhole-free thin films deposited by glow discharge or plasma polymerization of organosilanes, organosilazones and organosiloxanes for use as reactive ion etch oxygen barriers in multilayer resist structures, of lift-off masks, for fabrication of semiconductor devices, such as integrated circuits. The process includes deposition of thin plasma polymerized organosilicon barrier film over a radiation insensitive polymeric base layer previously coated on a substrate, followed by thermal annealing of the plasma polymerized barrier layer, over which is then coated a radiation sensitive resist layer. After definition of the desired resist pattern by imagewise exposure and development, the image is etch transferred into the barrier layer by reactive sputter etching in a fluorine containing ambient, and subsequently transferred into the base layer, down to the substrate, in an oxygen plasma, during which time the plasma deposited film functions as an oxygen barrier.
    Type: Grant
    Filed: December 23, 1982
    Date of Patent: January 15, 1985
    Assignee: International Business Machines Corporation
    Inventors: Harbans S. Sachdev, Krishna G. Sachdev
  • Patent number: 4491084
    Abstract: Method and apparatus which allows the component leads of pre-taped electronic components to be solder tinned to preserve the solderability and shelf life of such component leads. Pre-taped electronic components and the like are prepackaged in a reel and positioned in the apparatus such that the reel is free to rotate. Both leads of each component are secured to corresponding adjacent component leads by tape. The electronic components are moved through a plurality of processing stages such that one lead of each component is solder tinned, one of the processing stages removing the tape from the leads to enable the soldering thereof. After soldering of the leads, tape is applied thereto. The process is then repeated for the other leads of each component.
    Type: Grant
    Filed: September 29, 1982
    Date of Patent: January 1, 1985
    Assignee: General Dynamics, Pomona Division
    Inventor: George C. Marshall, Jr.
  • Patent number: 4414243
    Abstract: A method is described for the fabrication of surface acoustic wave devices by the selective removal of one of the phases of a metallic eutectic solidified as a thin film having a lamellar morphology to form a first spaced array of metallic elements which then provides a self-aligned structure for the formation of a second array of metallic elements interdigitated with the elements of the first array.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: November 8, 1983
    Assignee: General Electric Company
    Inventor: Harvey E. Cline