Patents Examined by K Thangavelu
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Patent number: 7263477Abstract: The present invention includes a method for modeling devices having different geometries, in which a range of interest for device geometrical variations is divided into a plurality of subregions each corresponding to a subrange of device geometrical variations. The plurality of subregions include a first type of subregions and a second type of subregions. The first or second type of subregions include one or more subregions. A regional global model is generated for each of the first type of subregions and a binning model is generated for each of the second type of subregions. The regional global model for a subregion uses one set of model parameters to comprehend the subrange of device geometrical variations corresponding to the G-type subregion. The binning model for a subregion includes binning parameters to provide continuity of the model parameters when device geometry varies across two different subregions.Type: GrantFiled: June 9, 2003Date of Patent: August 28, 2007Assignee: Cadence Design Systems, Inc.Inventors: Ping Chen, Zhihong Liu
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Patent number: 7228260Abstract: In a role-playing simulation apparatus, a setting section sets a plurality of patterns of parameters indicating characters of player agents who participate in a virtual role-playing and also sets patterns of negotiation rules, and player agent sections realize the player agents. A lecture attendant agent section realizes a lecture attendant agent who carries out virtual negotiations with the player agents, a learning material preparing section allows the player agents and the lecture attendant agent to carry out negotiations, a learning material evaluating section evaluates a negotiation result for each combination and sets a parameter evaluated with at least a predetermined level as a learning material, and a lecture attendance processor that allows the player agents and an actual lecture attendant to execute a virtual role-playing based on the learning material.Type: GrantFiled: January 31, 2003Date of Patent: June 5, 2007Assignee: Fujitsu LimitedInventors: Akio Fujino, Masaru Nakagaki, Hiroshi Hatakama
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Patent number: 7222062Abstract: A method and system to emulate a trusted platform module to execute trusted operations. A virtual machine monitor is executed to support a virtual machine session. An operating system is loaded into the virtual machine session. The trusted platform module is emulated to hold a key associated with the virtual session and to execute trusted operations.Type: GrantFiled: December 23, 2003Date of Patent: May 22, 2007Assignee: Intel CorporationInventors: Gundrala D. Goud, Vincent J. Zimmer
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Patent number: 7203631Abstract: Briefly, a system and a method of formal verification and failure analysis and rectification of models or designs, e.g., VLSI designs, of processors, circuits and logical systems. Embodiments of the system may include a multi-value annotation scheme for annotating different types of values of signals, and a post-annotation scheme for further analysis based on the annotated values. Some embodiments of the invention may optionally include a generator of counter-examples of a given length.Type: GrantFiled: December 31, 2002Date of Patent: April 10, 2007Assignee: Intel CorporationInventors: Ranan Fraer, Osnat Weissberg, Amitai Irron, Gila Kamhi, Marcelo Glusman, Sela Mador-Haim, Moshe Y. Vardi
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Patent number: 7200536Abstract: A vehicle simulator comprising: (i) a real-world vehicle (1) whose controls and instruments are dual-mode such that they can be switched between normal operation and simulated operation; (ii) a retro-reflecting screen (3) which is deployed around and outside windows of a control area (cockpit) of the vehicle (1), which control area is for a person operating the simulator; (iii) an image projector (9) for being mounted on a head or headwear of the operator; (iv) a head position and orientation sensing system (11) mounted on the head or the headwear of the operator; (v) a simulator host computer that receives information from controls of the vehicle (1) and sends information to the controls and to instruments of the vehicle (1) when the vehicle (1) is in a simulation mode; and (vi) an image generator computer (8) that receives data from the simulator host computer regarding the vehicle's simulated position and orientation and that also receives data from the head position and orientation sensing system (11)Type: GrantFiled: December 28, 2001Date of Patent: April 3, 2007Assignee: SEOS LimitedInventor: Owen John Williams Wynn
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Patent number: 7200541Abstract: In the method, a set of limits are defined and a reference core design is generated based on the limits, and includes an initial loading pattern of current fresh fuel bundles arranged in a plurality of fuel locations. A unique subset of fresh fuel bundles is selected for evaluation as the reference core design is subjected to an iterative improvement process. The iterative process includes replacing, at each fuel location, at least one of the current fresh fuel bundles with at least one of the selected fresh fuel bundles, and simulating reactor operation on the reference core design to obtain a plurality of outputs. The outputs may be ranked based on the defined set of limits, and the highest ranked output may be selected as an accepted core design for the nuclear reactor.Type: GrantFiled: December 23, 2002Date of Patent: April 3, 2007Assignee: Global Nuclear Fuel-Americas, LLCInventors: David Joseph Kropaczek, William Earl Russell, III, Steven Barry Sutton, Christian Carlos Oyarzun, William Charles Cline
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Patent number: 7184942Abstract: Methods and systems for verifying that a virtual network is properly configured are described. Configuration information from devices in the virtual network is received. The configuration information is compared against reference information. The reference information represents the design of the virtual network. Discrepancies between the configuration of the devices and the design of the virtual network are identified.Type: GrantFiled: May 22, 2003Date of Patent: February 27, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: David Andrew Graves, Brian John O'Keefe
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Patent number: 7139692Abstract: A method and system for flow propagation analysis uses ‘tracers’ that are iteratively propagated through a simulated network between source and destination elements. These tracers are structured to contain traffic flow information from source to destination, and to reflect changes as the flow is affected by each element along the path from source to destination. The resultant flow information at the destination corresponds to the effective throughput from the source to the destination, and the flow information at the output of each intermediate element in the network corresponds to the potentially achievable throughput through that element for the given source-to-destination flow.Type: GrantFiled: December 20, 2002Date of Patent: November 21, 2006Assignee: Opnet Technologies, Inc.Inventors: Alain Cohen, Pradeep K. Singh, Arun Pasupathy, Stefan Znam, Marius Popa
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Patent number: 7047164Abstract: A system and method are disclosed for analyzing burst statistics from a communications network switch port transmitting data in a bursty communication system, where the burst statistics have been classified according to pre-defined burst ranges and where each burst range corresponds to a predetermined percentage range of the rated port speed, storing the burst statistics, specifying a report period of interest, specifying a plurality of summary periods, retrieving the burst statistics from storage, trending the information to predict future port speed requirements, and then recommending the magnitude of any port speed changes.Type: GrantFiled: May 30, 2000Date of Patent: May 16, 2006Assignee: Paradyne CorporationInventor: Larry Swift
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Patent number: 7039572Abstract: In a gate-level logic simulation, a change in electric current is calculated from event information 5 output from a logic simulator 4 through use of a current waveform calculation section 7. The thus-calculated change in current is subjected to FFT processing through use of an FFT processing section 9, thereby determining a frequency characteristic of EMI and enabling EMI analysis.Type: GrantFiled: July 7, 2000Date of Patent: May 2, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hidetoshi Narahara, Seijirou Kojima, Hiroyuki Tsujikawa, Kenji Shimazaki, Kasumi Hamaguchi
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Patent number: 6978232Abstract: Methods and systems for demonstrating a service that provides a computerized transaction to a client via a server coupled to a computer network. One aspect of the invention is a method for demonstrating a virtual server service using a host server system over a computer network. A particular embodiment of the method can comprise receiving a first request from a prospective client via a prospective client system to demonstrate the virtual server service. This embodiment of the method can include sending a simulated control window of the virtual server service via a host server system to the prospective client system in response to the first request. The simulated control window can have a plurality of demonstration components that simulate corresponding system administration components of an active control window that active clients use to configure the virtual server service.Type: GrantFiled: June 30, 2000Date of Patent: December 20, 2005Assignee: Interland, Inc.Inventor: David L. Tobler
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Patent number: 6836752Abstract: A method and apparatus for enabling computer aided design of architectural projects is provided that includes an area for storing building code resources, accessibility resources, and format resources. By inputting a selection of a predetermined search terms corresponding to one of physical environmental features, assembled building components, and building elements, a user is able to access the appropriate applicable regulations for that feature. Information from the resources is displayed on a display mechanism. Once the user has downloaded the applicable resources, navigation between the downloaded documents is made possible. In this manner, a user is able to obtain computerized assistance without being required to input an initial plan. Additionally, a customized search apparatus and method are provided. After selecting a term, the user can select the resource search described above or can select a customized search which aids in the selection of items to be used for building.Type: GrantFiled: July 20, 1999Date of Patent: December 28, 2004Assignee: Computecture Inc.Inventor: Pelin Atasoy
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Patent number: 6772106Abstract: An automatic and retargetable computer design system is using a combination of simulation and performance prediction to investigate a plurality of target computer systems. A high-level specification and a predetermined application are used by the computer design system to provide inputs into a computer evaluator. The computer evaluator has reference computer system dependent and independent systems for producing a reference representation and dynamic behavior information, respectively, of the application. The reference representation and information are mated to produce further information to drive a simulator. The simulator provides performance information of a reference computer system. The performance information is provided to another computer evaluator, which has a target computer system dependent system for producing a target representation of the application for the plurality of target computer systems.Type: GrantFiled: August 20, 1999Date of Patent: August 3, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: Scott A. Mahlke, Santosh G. Abraham, Vinod K. Kathail
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Patent number: 6725189Abstract: An adapter program couples a legacy operating system to a driver program of an I/O channel which has an incompatible interface to a native operating system. The adapter program includes a translator which receives legacy control structures from the legacy operating system that represents a legacy I/O instruction. The adapter program also includes an interface to the driver program which simulates the native operating system interface. The adapter program further includes an emulator for performing the I/O instruction by interacting with the driver program thru the simulated native operating system interface.Type: GrantFiled: April 22, 1999Date of Patent: April 20, 2004Assignee: Unisys CorporationInventors: Darrell Rex Pett, Lewis Rossland Carlson, Dennis Charles Gassman
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Patent number: 6704694Abstract: A ray-based interaction system and related techniques are described. The ray-based interaction system and rendering techniques can be used to display haptic interactions between objects having one or more dimensions and a haptic probe modeled as a line segment.Type: GrantFiled: October 15, 1999Date of Patent: March 9, 2004Assignee: Massachusetts Institute of TechnologyInventors: Cagatay Basdogan, Chih-Hao Ho, Mandayam A. Srinivasan
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Patent number: 6691078Abstract: A method for exploring the behavior of a design model, the method including the steps of providing a design model represented as a Finite State Machine (FSM). The method further includes the step of providing a path specification of interest. The method further includes the step of exploring the behavior of the design in order to find and present a scenario in the design that meets the path specification.Type: GrantFiled: July 29, 1999Date of Patent: February 10, 2004Assignee: International Business Machines CorporationInventors: Ilan Beer, Eli Dichterman, Leonid Gluhovsky, Anna Gringauze, Yossi Malka, Yaron Wolfsthal, Shoham Ben-David
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Patent number: 6691077Abstract: A technique for translating design test bench generated signals into an Automated-Test-Equipment compatible format using existing digital pattern conversion tools. The technique uses sigma-delta modulation technology to allow conversion of analog and mixed signal stimuli into digital representations that can be converted for use in the target tester using existing digital pattern conversion tools.Type: GrantFiled: September 2, 1999Date of Patent: February 10, 2004Assignee: Texas Instruments IncorporatedInventors: Mark Burns, Craig D. Force
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Patent number: 6647361Abstract: A system and method for detecting and filtering non-violation events in a traffic light violation prediction and recording system, including at least one violation prediction image capturing device, such as a video camera, and a violation prediction unit. The prediction unit generates a prediction reflecting a probability that the vehicle will violate a red light phase of the traffic signal. A non-violation event filter determines whether the vehicle approaching the traffic signal is actually performing a non-violation action. Non-violation events may include a variety of actions performed by the vehicle, and are fully configurable to meet the needs and policies of various specific intersections and jurisdictions. When the non-violation event filter determines that the vehicle is performing a non-violation action, resources that may have been allocated to recording the non-violating vehicle may be released, and a determination may be made that additional resources need not be allocated to such recording.Type: GrantFiled: November 22, 1999Date of Patent: November 11, 2003Assignee: Nestor, Inc.Inventors: Mark D. Laird, Steven I. Small, Michael T. Tinnemeier
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Patent number: 6609088Abstract: A formalized method for part of the design decisions, related to memory, involved while designing an essentially digital device is presented. The method shows how to traverse through and how to limit the search space being examined while solving these memory related design decisions. The method focuses on power consumption of said essentially digital device. A method for determining an optimized memory organization of an essentially digital device, wherein data reuse possibilities are explored, is described.Type: GrantFiled: July 23, 1999Date of Patent: August 19, 2003Assignee: Interuniversitaire Micro-Elektronica CentrumInventors: Sven Wuytack, Francky Catthoor, Hugo De Man, Jean-Philippe Diguet
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Patent number: 6574590Abstract: A procedure and processor are disclosed for avoiding lengthy delays in debug procedures during access by a memory mapped peripheral device. The processor includes in-circuit emulation means comprising one or more scan chains or serially connected registers for access by an external host computer system. The procedure comprises: a) the host computer system carrying out a debug procedure via said scan chains, and selectively interrupting such debug procedure for access to a peripheral memory mapped device; b) the host computer system writing into an area or memory of the processor a program for reading and/or writing data at a specified memory location; and c) the host computer system causing said processor to run said program, and then to return to said debug procedure.Type: GrantFiled: December 1, 1999Date of Patent: June 3, 2003Assignee: LSI Logic CorporationInventors: Simon Martin Kershaw, Graham Kirsch, Brendon Slade