Patents Examined by Kamini Shah
  • Patent number: 7444275
    Abstract: Techniques are disclosed for modeling a cell of an integrated circuit design. In one aspect of the invention, a full-space polynomial model is fit to cell information comprising measured data points associated with one or more independent variables such as voltage slew, capacitive load, supply voltage or temperature. Error values are generated indicative of error between the measured data points and the full-space polynomial model. The error values are used to partition the modeling space into domains. For at least a given one of the domains, a first polynomial model is generated based on a subset of the measured data points and at least one additional data point determined by interpolation from the measured data points in the subset. Error values are generated indicative of error between the measured data points of the subset and the first polynomial model.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: October 28, 2008
    Assignee: Agere Systems Inc.
    Inventor: John A. Carelli, Jr.
  • Patent number: 7440885
    Abstract: An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event dispatcher is in communication with the application module to deliver commands to the DUT. A plurality of transactors are in communication with the event dispatcher to forward the commands to the DUT. A channel controller is in communication with the transactors to process and forward the commands to the DUT, wherein the channel controller also receives messages from the DUT, processes the messages, and forwards the messages to the transactors for delivery to the event dispatcher and the application module.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: October 21, 2008
    Assignee: Broadcom Corporation
    Inventors: Luis A Garcia, Russell E Vreeland, Christopher B Novak, Gabriel G Marasigan, Christopher A Roussel
  • Patent number: 7437281
    Abstract: The present invention provides a method for modeling the performance of a system by fitting non-linear curves to data points for system performance parameters, such as response time and throughput, as a function of load. Data points may be measured in testing may be measured through monitoring a system operating in a production environment. While a variety of non-linear curves may be used in accordance with the present invention, a logarithmic curve may be used to model system throughput and an exponential curve may be used to model system response time. By defining a relationship between throughput and response time a distance may be calculated between the curves, and this distance may be used to determine an optimal load. Additionally, a graph displaying both throughput and response time as a function of load may be displayed to a system operator in a graphical user interface to facilitate the evaluation of system performance.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: October 14, 2008
    Assignee: Sprint Communications Company L.P.
    Inventors: Dean Lee Saghier, Brian Washburn, Scott Schroder
  • Patent number: 7433809
    Abstract: A computer-implemented system and method of non-linear modeling in a computer system having a limited precision processor is provided. A non-linear model is initialized by forming an objective function having one or more functional components and a marginal variance matrix. The model is then iteratively solved using the computer processor until it has converged to a feasible solution. In doing so, the feasibility of computing the objective function is evaluated by determining if the marginal variance matrix is positive definite, thereby indicating whether or not the computer processor is capable of calculating a feasible solution to the non-linear model. If the marginal variance matrix is positive definite, then the objective function and its gradient are computed using the marginal variance matrix.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: October 7, 2008
    Assignee: SAS Institute Inc.
    Inventor: Georges H. Guirguis
  • Patent number: 7433814
    Abstract: A network emulator provides both per-connection and non-connection-based emulation. The emulator includes a host computer, and a kernel-mode emulator driver and user-mode application component running on the host computer. The application component supplies configuration parameters to the driver. The driver includes a packet filter list that filters a captured packet, a virtual network link that receives the packet from the packet filter list, a link group list that applies an emulation procedure to the packet, a timer management component that manages a timer associated with the emulation procedure, and a packet dispatcher component that sends out the packet. A connection pool component facilitates per-connection emulation.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 7, 2008
    Assignee: Microsoft Corporation
    Inventors: Yunxin Liu, Zheng Ni, Jian Wang, Qian Zhang, Wenwu Zhu
  • Patent number: 7430497
    Abstract: A system and process for determining the location of a captured image from a larger image is described. Using a list of determined locations, the system is able to determine the best or most likely path of a pen tip.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: September 30, 2008
    Assignee: Microsoft Corporation
    Inventors: Jian Wang, Zheng Chen, Xiaoxu Ma, Yingnong Dang, Liyong Chen, Jiang Wu
  • Patent number: 7428486
    Abstract: A system and method is disclosed for generating process simulation parameters. The method discloses: identifying an execution process; partitioning the process in accordance with a partitioning rule; and generating simulation parameters for each partition. The system discloses various means for effecting the method.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: September 23, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Fabio Casati, Ming-Chien Shan, Maria Guadalupe Castellanos
  • Patent number: 7426455
    Abstract: Performing Boolean operations among two regions; regions and results represented as vector tuples. Establish indexing cells about regions and classify by type of interaction between regions, e.g., (boundary, boundary). For each (boundary, boundary) cell, define pseudo-points at each boundary entrance/exit. Categorize each (boundary, boundary) cell on relationship of its pseudo-points. Identify starting points along boundaries based on: categorization, operation, and interior convention. Accumulate results cycling from a starting point, along region boundary. Upon encountering each intersection, proceed along the other region boundary. Upon encountering a cell edge, proceed along the cell edge in the direction consistent with the interior convention. Where a starting point or intersection between region boundaries remains untraversed, accumulate results in tracing a similar cycle along untraced boundaries. Discard duplicate/cell-edge only tuples.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: September 16, 2008
    Assignee: Science Applications International Corporation
    Inventor: Richard T. Antony
  • Patent number: 7424417
    Abstract: A method and system are disclosed, in a simulation of a design of a digital integrated circuit chip, to limit a number of scan test clocks and chip ports used for testing the chip. Clock domains are identified within the design of the chip that are independent of each other. The independent clock domains are grouped together, within said chip design, to form clock domain groups. A timing analysis is performed on the design of the chip by clocking the clock domain groups each with an independent scan test clock. The scan test clocks originate externally to the design and by-pass, within the chip design, the corresponding internal clocks. Capture mode violations are recorded from the timing analysis and are used to go back and form new clock domain groups, thereby repeating the method until no capture mode violations are generated.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: September 9, 2008
    Assignee: Broadcom Corporation
    Inventor: Amar Guettaf
  • Patent number: 7418373
    Abstract: Methods for evaluating drill pattern parameters such as burden, spacing, borehole diameter, etc., at a blast site are disclosed. One method involves accumulating the burden contributed by successive layers of rock and matching the accumulated rock burden to a target value for a borehole having a length related to the average height of the layers. Another method relates to varying drill pattern parameters and characteristics to match blast design constraints, including the substitution of one explosive material for another by the proper balance of materials and/or output energies to the associated rock burden. Analysis of deviations from target rock burdens and corrective measures are disclosed, as well as cost optimization methods. The various methods can be practiced using an appropriately programmed general purpose computer.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: August 26, 2008
    Assignee: Live Oak Ministries
    Inventor: Jay Howard Heck, Sr.
  • Patent number: 7415401
    Abstract: A process for constructing a three-dimensional geologic model of a subsurface earth volume wherein resolution scales of multiple diverse data types, including seismic data, are accounted for by generating multiple frequency passband models and combining them together to form the complete geologic model. Preferably, a model is generated for each of a low-frequency passband, a mid-frequency passband, and a high-frequency passband. When integrating seismic data into the modeling process, the seismic-frequency passband constitutes the mid-frequency passband model. The process further contemplates updating tentative frequency-passband models through optimization of assigned rock property values in each tentative model according to specified geological criteria. Such optimization is carried out by perturbation of the rock property values in a manner wherein the frequency content of each model is maintained.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: August 19, 2008
    Assignee: ExxonMobil Upstream Research Company
    Inventors: Craig S. Calvert, Glen W. Bishop, Yuan-zhe Ma, Tingting Yao, J. Lincoln Foreman, Keith B. Sullivan, Dwight C. Dawson, Thomas A. Jones
  • Patent number: 7403878
    Abstract: The current invention relates to a definition of a process model in a Workflow Management System or a computer system with comparable functionality (WFMS) wherein said process model is modeling at least one hyper-edge said hyper-edge representing a boundary within said process model. According to the current invention the process model is realized by defining said hyper-edge by one or a multitude of additional hyper-edge nodes being part of said process model.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: July 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: Frank Leymann, Dieter Roller
  • Patent number: 7401009
    Abstract: Methods and systems for magnetostatic modeling of a magnetic object is disclosed. A varying surface charge density is established at a surface of a magnetic object modeled by a magnetostatic model. Thereafter, a varying magnetic charge is generally distributed throughout a volume of the magnetic object to thereby accurately and efficiently model the magnetic object across a wide range of magnetic curves utilizing the magnetostatic model. The magnetic curves can be configured to generally comprise at least one non-linear magnetic curve and/or least one linear magnetic curve. Such magnetic curves may also comprise at least one magnetic curve in a magnetized direction and/or non-magnetized direction. Such magnetic curves are generally referred to as “BH curves”.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: July 15, 2008
    Assignee: Honeywell International Inc.
    Inventor: Nicholas F. Busch
  • Patent number: 7398194
    Abstract: An improved method for analyzing power systems; in particular, power systems that may incorporate distributed energy resources (DER), that provides a thorough determination of the potential for network performance improvement that DER could provide, independent of non-network benefits DER could provide. The method incorporates an Energynet dataset simulating the power system, integrating transmission and distribution elements together and capable of evaluating the impacts of additions of real energy sources and/or reactive energy sources anywhere in the network. Such energy source additions are evaluated for their impact on a broad set of performance measures. The specific DER projects that would realize that potential improvement in network performance are characterized as an Optimal DER Portfolio. Network performance improvement attributable to the Optimal DER Portfolio is quantified in engineering and financial terms.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: July 8, 2008
    Inventors: Peter B. Evans, Steven E. Schumer
  • Patent number: 7395191
    Abstract: A computer-implemented land planning system is designed to generate at least one conceptual fit solution to a user-defined land development problem. The system electronically creates at least one candidate solution to the land development problem. The candidate solution incorporates a number of engineering measurements applicable in development of an undeveloped land site. A fitness function quantitatively evaluates the candidate solution based on its fitness. A heuristic problem-solving strategy manipulates the engineering measurements of the candidate solution to achieve a more quantitatively fit solution to the land development problem. A computer output device outputs to a user documentation illustrating the fit solution to the land development problem.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: July 1, 2008
    Assignee: Blueridge Analytic, Inc.
    Inventors: Michael W. Detwiler, James W. Reynolds, Jr., Anthony H. Watts
  • Patent number: 7392170
    Abstract: A system for dynamically compressing circuit components during simulating of a circuit having a hierarchical data structure includes a simulator module having one or more computer programs for 1) selecting a group of leaf circuits from the first and second branches for simulation, 2) if two or more leaf circuits of the circuit having a substantially same isomorphic behavior, representing the two or more leaf circuits as a merged leaf circuit, 3) creating a first port connectivity interface dynamically for the group of leaf circuits in response to the merged leaf circuit, where the first port connectivity interface communicates changes in signal conditions among the group of leaf circuits, and 4) simulating the group of leaf circuits in accordance with the first port connectivity interface.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: June 24, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bruce W. McGaughy, Jun Kong
  • Patent number: 7392169
    Abstract: According to one method of simulation processing, instrumentation code, such as an runtime executive (rtx), receives one or more statements describing an count event and identifying the count event as an outlying count event. While simulating a design utilizing the HDL simulation model, occurrences of the outlying count event are counted to obtain a count event value. Simulation result data obtained from simulating the design is then received and processed. In the processing, the count event value is recorded within a data storage subsystem responsive to a determination of whether or not the count event value of the outlying count event exceeds a previously recorded count event value.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corporation
    Inventors: Carol Ivash Gabele, Wolfgang Roesner, Derek Edward Williams
  • Patent number: 7386426
    Abstract: An NSET method and apparatus for modeling and monitoring the status of a system is disclosed. The NSET employs a nonlinear similarity operator in place of linear matrix multiplication, to estimate a set of sensor data based on learned reference data, responsive to receiving a set of actual sensor data. Regularization is used in the generation of the estimate. The estimated data values and the actual sensor data are differenced to produce residuals, which are statistically tested with a SPRT to detect anomalies. Cluster centers may be used to represent learned reference data. The detection of anomalies can be used advantageously for sensor calibration verification.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: June 10, 2008
    Assignee: Smartsignal Corporation
    Inventors: Christopher L. Black, J. Wesley Hines
  • Patent number: 7386433
    Abstract: One embodiment of the invention provides a system for speeding up an iterative process that simulates and, if necessary, corrects a layout of a target cell within an integrated circuit so that a simulated layout of the target cell matches a desired layout for the target cell. The system operates by determining if the target cell is similar to a preceding cell for which there exists a previously calculated solution. If so, the system uses the previously calculated solution as an initial input to the iterative process that produces the solution for the target cell.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: June 10, 2008
    Assignee: Synopsys, Inc.
    Inventors: Kevin D. MacLean, Roger W. Sturgeon
  • Patent number: 7383166
    Abstract: A method of checking correctness of scheduling of a circuit where a schedule for the circuit is obtained from a behavioral description. The method comprising extracting loop invariants to determine a sufficient set of acyclic threads when loops are present, performing symbolic simulation to extract the above loop invariants, and proving equivalence of the acyclic threads. Systems, computer systems and computer program products that incorporate the techniques of verification and correctness checking according to the present invention have also been disclosed.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: June 3, 2008
    Assignee: NEC Corporation
    Inventors: Pranav Ashar, Anand Raghunathan, Subhrajit Bhattacharya