Patents Examined by Kamini Shah
  • Patent number: 7353155
    Abstract: Transmission line macromodels can be classified into main categories of delay-extraction and rational approximation. The exponential solution of the Telegrapher's Equation is used to create a system and method that enable a time-domain circuit simulator to automatically select the most appropriate macromodel for a given transmission line structure.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventor: Ibrahim M. Elfadel
  • Patent number: 7353157
    Abstract: A system, method, and apparatus select state variables for, build state equations of, and simulate time-domain operation of an electronic circuit. The circuit is modeled with three branch types (inductor, resistor, voltage source in series; capacitor, resistor, current source in parallel; and switch), including four pre-defined switch types (unidirectional unlatched, bidirectional unlatched, unidirectional latched, and bidirectional latched). Automated analyses determine efficient state variables based on the currently active circuit topology, and state equations are built and applied. Switching logic determines when switch states change, and state equations for the new topology are either drawn from a cache (if the topology has already been processed) or derived anew. The switch control signals may be combined into a single switching variable, defined as a function of the state output.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: April 1, 2008
    Assignee: P. C. Krause & Associates, Inc.
    Inventors: Oleg Wasynczuk, Juri V. Jatskevich
  • Patent number: 7353156
    Abstract: A system for verifying an integrated circuit design is provided. The system comprising: an I/O controller connected to one or more I/O cores, the I/O cores part of the integrated circuit design; an external memory mapped test device having a switch for selectively connecting one or more of the I/O cores to corresponding I/O driver models; a bus for transferring signals between the I/O controller and the switch; and a test operating system for controlling the switch.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Devins, Robert D. Herzl, David W. Milton
  • Patent number: 7349832
    Abstract: Realistic sprays for simulated fluids are created by adding a set of spray particles to a boundary region just below the fluid surface. The fluid surface is determined by solving a level set equation for a zero level corresponding to the fluid surface. Additionally, the boundary region is determined by solving the level set equation for a non-zero level corresponding to a surface at the specified depth from the fluid surface. The set of spray particles inherit an initial state, for example a velocity, from the fluid simulation. Subsequent motion of the spray particles is determined according to a ballistic simulation, rather than a fluid simulation, thereby substantially reducing the computational burden required to animate the fluid. Spray particles that sink below a specified depth from the fluid surface are removed.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: March 25, 2008
    Assignee: Pixar
    Inventor: John Anderson
  • Patent number: 7346480
    Abstract: This invention provides directional connectivity described by the interconnections of the blocks in the schematic or netlist that are used to propagate impedance data from one block to another. The propagation of impedance data for discrete time based simulation programs allow for the simulation under less than ideal termination conditions between the blocks. This invention also supports functionality where the input impedance and output impedance of each block are not perfectly terminated. This assumption can lead to very significant modeling errors in the simulated results. In general, termination impedances are complex frequency dependent functions that result in frequency dependent mismatch losses between the blocks. This invention allows for the propagation and calculation of impedance mismatches between the various blocks.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: March 18, 2008
    Assignee: Applied Wave Research, Inc.
    Inventors: Joseph Edward Pekarek, Albert Santos, Scotty Hudson
  • Patent number: 7343271
    Abstract: A first method to compute a phase map within an optical proximity correction simulation kernel utilizes simulated wavefront information from randomly generated data. A second method uses measured data from optical tools. A phase map is created by analytically embedding a randomly generated two-dimensional array of complex numbers of wavefront information, and performing an inverse Fourier Transform on the resultant array. A filtering function requires the amplitude of each element of the array to be multiplied by a Gaussian function. A power law is then applied to the array. The elements of the array are shuffled, and converted from the phasor form to real/imaginary form. A two-dimensional Fast Fourier Transform is applied. The array is then unshuffled, and converted back to phasor form.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: March 11, 2008
    Assignee: International Business Machines Corporation
    Inventors: Gregg M. Gallatin, Emanuel Gofman, Kafai Lai, Mark A. Lavin, Maharaj Mukherjee, Dov Ramm, Alan E. Rosenbluth, Shlomo Shlafman
  • Patent number: 7337100
    Abstract: A multiple-pass synthesis technique improves the performance of a design. In a specific embodiment, synthesis is performed in two or more passes. In a first pass, a first synthesis is performed, and in a second or subsequent pass, a second synthesis or resynthesis is performed. During the first synthesis, the logic will be mapped to for example, the logic structures (e.g., logic elements, LUTs, synthesis gates) of the target technology such as a programmable logic device. Alternatively a netlist may be provided from a third party. Before the second synthesis, a fast or abbreviated fit may be performed of the netlist to a specific device (e.g., specific programmable logic device product). Before the second synthesis, the netlist obtained from the first synthesis (or provided by a third party) is unmapped and then the second synthesis is performed. Since a partial fit is performed, the second synthesis has more visibility and optimize the logic better than by using a single synthesis pass.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: February 26, 2008
    Assignee: Altera Corporation
    Inventors: Michael D. Hutton, Joachim Pistorius, Babette van Antwerpen, Gregg Baeckler, Richard Yuan, Yean-Yow Hwang
  • Patent number: 7330809
    Abstract: A trace data compression system includes a data acquisition circuit which is configured to acquire address information for identifying an address for reading or writing operation of a microcomputer which performs predetermined processing, and data information as operand data stored in the address; an address information compression circuit which is configured to compress the address information having been acquired by the data acquisition circuit and output the address information as compressed; a data information compression circuit which is configured to compress the data information having been acquired by the data acquisition circuit and output the data information as compressed; a data output circuit which is configured to output variable length data containing the address information having been compressed and outputted by the address information compression circuit and the data information having been compressed and outputted by the data information compression circuit.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: February 12, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuya Tabe
  • Patent number: 7328145
    Abstract: A method and apparatus for emulation of IOS in a feasible and efficient manner are provided. The method includes defining a data structure to hold a data set; opening a socket connection to the device; sending instructions to return the command data for an index value; storing the returned command data in the data structure; incrementing the index value, repeating the sending, the storing and the incrementing till the index value exceeds the depth of command data to be captured; and writing the command data captured in the data structure to a file. The depth of command data to be captured or stored can be defined by specifying an index value in the data structure.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: February 5, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Rod Jackson, Tarun Raisoni
  • Patent number: 7328143
    Abstract: A method for building a hierarchical representation of a circuit for simulation includes 1) receiving a source file containing SPICE-like netlist descriptions of the circuit in a flattened representation; 2) generating a primitive database using the source file, where the primitive database includes a geometries-describing section for storing a plurality of primitive subcircuit blocks; 3) generating an instance database using the geometries-describing section, where the instances database includes instance subcircuit blocks corresponding to explicitly-expressed primitive subcircuit blocks with predefined geometric values; 4) generating a simulation database using the instance database, where the simulation database includes simulation subcircuit blocks corresponding to fully-flattened instance subcircuit blocks; and 5) simulating the circuit using the simulation database, the instance database, and the primitive database.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: February 5, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventor: Bruce W. McGaughy
  • Patent number: 7324929
    Abstract: The invention is a method for simulating one or more characteristics of a multi-component, hydrocarbon-bearing formation into which a displacement fluid having at least one component is injected to displace formation hydrocarbons. The first step of the method is to equate at least part of the formation to a multiplicity of gridcells. Each gridcell is then divided into two regions, a first region representing a portion of each gridcell swept by the displacement fluid and a second region representing a portion of each gridcell essentially unswept by the displacement fluid. The distribution of components in each region is assumed to be essentially uniform. A model is constructed that is representative of fluid properties within each region, fluid flow between gridcells using principles of percolation theory, and component transport between the regions. The model is then used in a simulator to simulate one or more characteristics of the formation.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: January 29, 2008
    Assignee: ExxonMobil Upstream Research Company
    Inventors: Chun Huh, Gary F. Teletzke, Sriram S. Nivarthi
  • Patent number: 7319946
    Abstract: New Frequency dependent RLC extraction and modeling for on chip integrity and noise verification employs: A) 2D scan line algorithm for the collection of adjacent signal and power conductor coordinates; B) In core pair-wise frequency Dependent RL extraction; C) In core equivalent circuit synthesis; D) caching and partitioning RL extraction techniques for run time efficiency; and E) Techniques for synthesizing stable circuits to represent frequency dependent RL circuits for non-mono tonic R12.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: January 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Bowen, Alina Deutsch, Gerard V. Kopcsay, Byron L. Krauter, Barry J. Rubin, Howard H. Smith, David J. Widiger
  • Patent number: 7315807
    Abstract: A storage area network simulator, operable to simulate an exchange of calls emanating from a SAN management application to a plurality of manageable entities, allows analyzing SAN management application response to a particular configuration. A capture tool discovers manageable entities interconnected in a particular SAN experiencing undesirable operation. The capture tool provides exemplary calls to an agent, and gathers responses. The exemplary calls enumerate expected responses from the various manageable entities responsive to the agent. The gathered responses take the form of an XML markup script. A simulation plug-in is operative as an interface module (e.g. plug-in) for a test agent in a test environment, such as the management application test facility. The test agent employs the simulation plug-in as the API plug-in for calls emanating from the test agent.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: January 1, 2008
    Assignee: EMC Corporation
    Inventors: James E. Lavallee, Sean P. Frazer, Alexander Dubrovsky
  • Patent number: 7315805
    Abstract: A discrete event simulation (DES) and method of model development provide affordable, accurate, pre-validated, reusable and portable models and simulations that capture the complexity, interdependencies and stochastic nature of the operations and support (O&S) of weapons systems. A model of the O&S problem is created based on a service use profile (SUP) that describes a logical structure of delivery, maintenance, deployment, testing policy, infrastructure and logistics constraints. That model is translated into a DES, preferably using a “toolkit” including common attributes for the weapons and pre-validated common blocks and sub-models that define higher level functionality. The DES calculates a time-based prediction of weapons availability, maintenance activities, and spare parts stock over a life cycle of the weapons system.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: January 1, 2008
    Assignee: Raytheon Company
    Inventor: Robert D Slater
  • Patent number: 7315798
    Abstract: A natural frequency and a calculated mode vector are calculated by using a finite-element method models for analysis which include an object of analysis including a plurality of components and a plurality of elements which are positioned between the components of the object of analysis and indicate a boundary condition between the components, the calculated mode vector having high degree of correlation for an experimental mode vector is extracted and set to a pair, and identifying the boundary condition of the elements based on the extracted calculated mode vector and the natural frequency corresponding to the extracted calculated mode vector.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: January 1, 2008
    Assignee: Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Yoshitsugu Goto, Tatsuyuki Amago, Yoshio Kojima, Mizuho Inagaki, Kazuaki Chiku, Toru Matsushima, Keisuke Hayakawa
  • Patent number: 7315808
    Abstract: In producing data processor emulation information, program counter values used by a data processor are provided in a program counter trace stream, and a synchronization marker is inserted into the program counter trace stream. Trace information indicative of a data processing operation performed by the data processor is also provided, and a program counter value that corresponds to the data processing operation is identified. In this identification, the corresponding program counter value is expressed as an offset which indicates a number of program counter values in the program counter trace stream by which the corresponding program counter value is offset from the synchronization marker in the program counter trace stream.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: January 1, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Gary L. Swoboda, Robert A. McGowan
  • Patent number: 7313511
    Abstract: Virtual Real Time (VRT) provides high fidelity timing for software simulator environment running in a workstation. VRT is scalable and controllable. VRT provides flight and simulation software synchronization mechanism. This feature guarantees that the causality effect between flight software when interacting with simulated devices is the same as running flight software in a real test-bed environment. VRT provides high-resolution timing, which facilitates monitoring and detection of timing related faults while running the simulation software system on a workstation. VRT is modularized, such that the switchover from virtual clock to real clock is a trivial task. Running the system on a workstation using VRT behaves exactly like a real system, with the added benefits of user controllable features such as start, stop, monitor and time-scale. Performance of systems running with VRT is generally very good, equal to or better than the hardware, as the software runs natively on a faster workstation.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: December 25, 2007
    Assignee: California Institute of Technology
    Inventors: Mohammad Shahabuddin, William K. Reinholtz
  • Patent number: 7305333
    Abstract: A process and method for projection beam lithography which utilizes an estimator, such as a Kalman filter to control electron beam placement. The Kalman filter receives predictive information from a model and measurement information from a projection electron beam lithography tool and compensates for factors which cause beam placement error such as wafer heating and beam drift. The process and method may also utilize an adaptive Kalman filter to control electron beam placement. The adaptive Kalman filter receives predictive information from a number of models and measurement information from a projection electron beam lithography tool and compensates for factors which cause beam placement error such as heating and beam drift. The Kalman filter may be implemented such that real-time process control may be achieved.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: December 4, 2007
    Assignee: Agere Systems Inc.
    Inventor: Stuart T. Stanton
  • Patent number: 7302375
    Abstract: Roughly described, a method for numerically solving a system of equations of the form 0=F(X), for a solution vector X which involves choosing a starting value X0 and iterating Xn+1=Xn?[F?(Xn)+?nDiag F?(Xn)]?1F(Xn). In this iteration, at least one ?n is a number greater than 0. Preferably, ?n=min {?/n, [?n/(1+n?n)]?F(Xn)?}, where ? is a constant that remains fixed for all n, and ?n=?F(Xn)?/?F(Xn?1)?.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: November 27, 2007
    Assignee: Synopsys, Inc.
    Inventors: Andrey Kucherov, Victor Moroz
  • Patent number: 7302377
    Abstract: An event queue for use with a software-enabled logic simulation tool can include a heap array and a hash table data structure. The heap array can include time slots organized such that each time slot conforms to heap properties which specify, at least in part, that a root node of the array indicates a time slot having a minimum simulation time value. The hash table data structure can include a plurality of entries, wherein selected ones of the entries specify references to at least one of the time slots.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: November 27, 2007
    Assignee: Xilinx, Inc.
    Inventor: Kumar Deepak