Patents Examined by Katherine Lin
  • Patent number: 11029973
    Abstract: A server computer can have multiple potential configurations depending on a state of an input signal. In a first potential configuration, a single-platform model is used with multiple processors booted using a single BIOS. The multiple processors can have a bus there between allowing processor-to-processor communication. In a second potential configuration, a multi-platform model is used with multiple processors booted using separate BIOS. In this configuration, the bus between the processors is disabled so that the platforms operate autonomously. The hardware can be extended to support additional processors, such as 4, 8, etc. A failover mode also allows the hardware to detect a hardware error (e.g., bus error) and dynamically reconfigure the processors to use an alternative bus. With the failover, the addressing of the processors can be modified to reconfigure the server computer to compensate for the hardware error.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: June 8, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Shuwei Teng
  • Patent number: 11023307
    Abstract: A method for execution by one or more processing modules of one or more computing devices of a dispersed storage network (DSN), the method begins by gathering, at a DSN management unit, an abstracted DSN node hardware configuration and associated node health information for a plurality of DSN nodes residing in the DSN. The method continues by generating a graphical display indicating a state and a presence of the plurality of DSN nodes and associated hardware. The method continues by performing, at the DSN management unit, specific remediating actions on the plurality of DSN nodes based on the state and presence of the plurality of DSN nodes and associated hardware.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: June 1, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ryan J. Attard, Bart R. Cilfone, Patrick A. Tamborski, Sanjaya Kumar, Eric Tashakkor
  • Patent number: 11016854
    Abstract: Stabilizing a container-based application includes determining a health of a container. Based on the container health, a most recent stable version of an image for the container is identified. A container image is considered stable if containers spawned from the image have a relatively high MTTF and relatively low MTTR compared to other versions of same image. The container is then deployed using the most recent stable version of the image for the container.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 25, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ambika Nair, Mayank Singh Sachan
  • Patent number: 11003556
    Abstract: State information of one or more extents in a stripe in a storage system is obtained, the state information indicating whether the extents comprise at least one of a failed extent and an end-of-life extent. A risk level for the stripe is determined based on the state information, the risk level indicating a possibility that data stored in the stripe is lost. In response to the risk level exceeding a first threshold, the storage system is caused to: rebuild data corresponding to the failed extent, and write the data to a sparing extent in a second storage device different from a first storage device where the failed extent resides; and write data corresponding to the end-of-life extent to a swapped extent in a fourth storage device different from a third storage device where the end-of-life extent resides, the fourth storage device being used to replace the third storage device.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: May 11, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Chun Ma, Geng Han, Jibing Dong, Hongpo Gao, Jian Gao, Xinlei Xu
  • Patent number: 10990511
    Abstract: An apparatus including processing circuitry and an application interface traversing method are described. The processing circuitry selects a target interface from a plurality of interfaces of an application to be tested. The target interface is associated with at least one of a control element, a sub-interface, and a parent interface. The processing circuitry obtains a first control list for the target interface. The first control list indicates whether the at least one of the control element, the sub-interface, and the parent interface has been traversed. The processing circuitry determines, based on the first control list, whether the target interface is associated with a non-traversed interface corresponding to one of the at least one of the control element, the sub-interface, and the parent interface. When the target interface is determined to be associated with the non-traversed interface, the processing circuitry selects the non-traversed interface to update the first control list.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: April 27, 2021
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Chen Lin, Xiaoxia Chen, Yongde Huang
  • Patent number: 10990506
    Abstract: This disclosure relates to creating memory snapshots that reduce processing for thread-focused analysis. A plurality of trace fragments is identified, each representing an uninterrupted consecutive execution of executable instructions on a corresponding thread of a plurality of threads. The trace fragments include a first and a second fragment corresponding to a first thread, and a third fragment corresponding to a second thread. An ordering among the fragments is determined. In the ordering, the first fragment is orderable prior to the second fragment on the first thread, and the third fragment is orderable between the first and second fragments. Based on the third fragment being orderable between the first and second fragments, a memory cell is identified that is interacted with by executable instructions whose execution is represented by the third trace fragment. Memory snapshot data identifying the memory cell is inserted into trace data corresponding to the first thread.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: April 27, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jordi Mola
  • Patent number: 10986306
    Abstract: A monitoring camera system may include: a camera including an imaging unit for capturing an image of a periphery region according to a first profile, a local storage medium capable of storing the captured image, and a first communication interface for transmitting the captured image; and an image management device including a main storage for storing the transmitted image, a recovery control unit for determining whether a recovery is necessary in the main storage and generating a control signal according to the determination result such that the main storage is recovered, and a computation unit for calculating storable hours for which the image captured according to the first profile can be stored in the local storage medium, according to the determination result, and comparing the calculated storable hours and predicted recovery hours required for recovering the main storage.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: April 20, 2021
    Assignee: HANWHA TECHWIN CO., LTD.
    Inventors: Song Taek Jeong, Jin Hyuk Choi
  • Patent number: 10977106
    Abstract: Examples for detecting anomalies in a dataset are provided herein. A decision tree is trained using the data set and partitions of the data set produced by the trained decision tree are identified. Further, subsets of data based at least on the partitions of the data set are identified and z-scores are computed for the subsets of data. Based at least on the subsets of data, a subset of data with a highest z-score is identified as an anomalous subset of data, and the anomalous subset of data is provided for display.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: April 13, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Anna S. Bertiger, Alexander V. Moore, Adam E. Shirey
  • Patent number: 10977112
    Abstract: Embodiments facilitating performance anomaly detection are described. A computer-implemented method comprises: detecting, by a device operatively coupled to one or more processing units, based on monitoring data of a plurality of performance metrics of a monitored device, at least one trend within the monitoring data of the respective performance metrics; removing, by the device, the at least one trend from the monitoring data of the respective performance metrics to generate modified data of the respective performance metrics; and detecting, by the device, a performance anomaly based on the modified data of the respective performance metrics and a behavior clustering model comprising at least one steady state.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: April 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiao Zhang, Fan Jing Meng, Lin Yang, Jing Min Xu
  • Patent number: 10970158
    Abstract: A method and system for performing a root cause analysis. A central processing unit (CPU) tracks a focal point of a user's eye gaze. The CPU correlates the focal point of the user's eye gaze to a viewing position of a display device displaying a file that includes event data being viewed by the user. The CPU identifies, as a function of the viewing position, events of interest in the event data and an amount of time that the event data is viewed by the user. The CPU outputs, as a function of a linear regression model, an interest score pertaining to one or more events of interest that were previously identified as a function of the user's eye gaze. The interest score is a probability of each identified event of interest being a root cause of a defect.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: April 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hernan A. Cunico, Jonathan Dunne, Jeremiah O'Connor, Asima Silva
  • Patent number: 10963341
    Abstract: Methods and apparatus for isolating the introduction of software defects in a dispersed storage network (DSN) are disclosed. In various embodiments, a search strategy is employed whereby after identifying a test failure in a current version of the memory software code, a sequence of interim versions of the code between the current version of the memory software code and a previous successfully tested version of the code is determined. A first version of the memory software code is selected from the sequence of interim versions (e.g., from the middle of or approximately in the middle of the sequence) and tested. When testing of the first version does not result in a test failure, a second version of the memory software code is tested, the second version selected from a sub-sequence of the sequence of interim versions between the first version of the code and the current version of the code.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: March 30, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Teague S. Algie, Andrew G. Peake, Mark D. Seaborn, Ilya Volvovski
  • Patent number: 10949307
    Abstract: Technical solutions are described for executing a computer instruction including an asynchronous operation. An example method includes computing parameters associated with the asynchronous operation, and transmitting a command for executing the asynchronous operation by an external device. The method also includes intercepting and storing, by an interface logic controller, the parameters associated with the asynchronous operation into one or more log registers. The method also includes receiving a response to the asynchronous operation. In response to the asynchronous operation being a success, executing a next instruction by the processing element. In response to the asynchronous operation being a failure, a processing element accesses the parameters from the log registers, and restarts the asynchronous operation using the parameters from the one or more log registers.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: March 16, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Raymond M. Higgs, Luke M. Hopkins, Mushfiq U. Saleheen
  • Patent number: 10942800
    Abstract: A storage device which generates dump data for debugging at the occurrence of an error includes a memory device including a dump area for storing the dump data, and a storage controller that receives a dump request from a host through a first host interface, stores the dump data in the dump area in response to the dump request, and transmits the stored dump data to the host by using a second host interface after resetting the second host interface.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dukyoung Yun, Chul-Woo Lee
  • Patent number: 10936432
    Abstract: Methods, systems, and computer-readable media for implementing a fault-tolerant parallel computation framework are disclosed. Execution of an application comprises execution of a plurality of processes in parallel. Process states for the processes are stored during the execution of the application. The processes use a message passing interface for exchanging messages with one other. The messages are exchanged and the process states are stored at a plurality of checkpoints during execution of the application. A final successful checkpoint is determined after the execution of the application is terminated. The final successful checkpoint represents the most recent checkpoint at which the processes exchanged messages successfully. Execution of the application is resumed from the final successful checkpoint using the process states stored at the final successful checkpoint.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: March 2, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Tin-Yu Lee, Rejith George Joseph, Scott Michael Le Grand, Saurabh Dileep Baji
  • Patent number: 10936403
    Abstract: A set of processors in a symmetric multiprocessor (SMP) system are deconfigured following a first failed processor to return the SMP system to a symmetric state. One or more deconfiguration options are identified, and a respective cost is calculated for each deconfiguration option. A deconfiguration option is selected and applied to the SMP system based on the respective costs of the one or more identified deconfiguration options.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jayanth Othayoth, Venkatesh Sainath, Vishwanatha Subbanna, Dhruvaraj Subhashchandran
  • Patent number: 10929258
    Abstract: An embodiment of the present invention is directed to an optimal event-driven anomaly detection scheme. The present invention recognizes that anomaly detection based solely on rules-based (deterministic) or probabilistic analysis alone are insufficient to capture and respond to ever evolving, highly sophisticated threats that tend to persist within a system undetected for long periods of time. According to an embodiment of the present invention, a tiered detection scheme composed of behavioral analysis and machine-learned probabilistic system behaviors provides an optimal level of sensitivity to detect and respond to threats, and further limits the number of false positives identified.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 23, 2021
    Assignee: INNOVATIVE DEFENSE TECHNOLOGIES, LLC
    Inventors: Bernard Gauf, Michael Bryman, Claire Moore, Samuel Nicoll, David Ponticello
  • Patent number: 10929216
    Abstract: Distributed architectures that can generate a crash report without concurrent access to debug symbols and a memory dump. Besides grabbing generic information from a memory dump, which most debuggers provide (e.g., call stack traces for all threads), developer-provided scripts can grab application-specific details such as tables of open protocol client connections and so-forth. This extraction can take place at a customer site where a crash occurred and can proceed without the use of debug symbols. The extraction can generate a crash report which can be sent back from the field. Once in the hands of engineering (e.g., at a provider site where debug symbols are extant but the memory dump is not), debug symbols can then be used in an annotation phase to fill in missing details (e.g. the precise source files and line numbers corresponding to call stack traces) without access to the original crash dump.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: February 23, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Brian Koropoff
  • Patent number: 10915390
    Abstract: In some examples, a computing device can determine a data state from telemetry data received from a plurality of client devices, determine a state change using the data state determined from the telemetry data, determine, using the state change, a potential cause of a fault of a component of a client device of the plurality of client devices, where the potential cause of the fault is determined in response to receiving a support inquiry from the client device, and display a timeline of state changes, where the timeline includes the determined state change of the client device.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: February 9, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matheus Eichelberger, Roberto Coutinho, Augusto Queiroz de Macedo
  • Patent number: 10915434
    Abstract: The present invention relates to a method for controlling a test environment on a mobile device. The method includes the steps of providing a test to a user within a testing phase on the device; detecting an interruption via the device during the testing phase; and generating an action in response to the detected interruption. A system for controlling a test environment is also disclosed.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: February 9, 2021
    Assignee: GRAD DNA LTD.
    Inventor: Stephen Reilly
  • Patent number: 10909004
    Abstract: An aspect includes generating a checkpoint for a storage system containing an image for a point in time. An aspect also includes storing, in a reserved area, volume configuration data corresponding to volumes for the point in time, layers of metadata and physical data for the point in time. An aspect further includes creating consistent snapshots for the volumes, destaging a control module journal and persisting a hash tree and dirty tree metadata, destaging a code cache, dumping hash metadata and physical layout metadata to a separate location in the storage and enabling new metadata updates to a default location. An aspect also includes redirecting new data and metadata IOS to stripes reserved during preparation of the separate location relating to the checkpoint and protecting checkpointed data and metadata, and generating a consistent checkpoint copy of a management module repository in the reserved area of storage.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: February 2, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Anton Kucherov, Zvi Schneider, Ying Hu, Felix Shvaiger