Patents Examined by Ken Parker
  • Patent number: 7968923
    Abstract: An image sensor pixel includes a photo-sensor region, a microlens, a first color filter layer, and a second color filter layer. The photo-sensor region is disposed within a semiconductor die. The microlens is disposed on the semiconductor die in optical alignment with the photo-sensor region. The first color filter layer is disposed between the photo-sensor region and the microlens. The second color filter layer is disposed on an opposite side of the microlens as the first color filter layer.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: June 28, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: Satyadev Nagaraja, Vincent Venezia
  • Patent number: 7968409
    Abstract: A Mixed-Signal Semiconductor Platform Incorporating Castellated-Gate MOSFET device(s) capable of Fully-Depleted operation is disclosed along with a method of making the same. The composite device/technology platform has robust I/O applications and includes a starting semiconductor substrate of a first conductivity type. One or more isolated regions of at least a first conductivity type is separated by trench isolation insulator islands. Within an isolated region designated for castellated-gate MOSFETs there exists a semiconductor body consisting of an upper portion with an upper surface, and a lower portion with a lower surface. Also within the castellated-gate MOSFET region, there exists a source region, a drain region, and a channel-forming region disposed between the source and drain regions, and are all formed within the semiconductor substrate body.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: June 28, 2011
    Inventor: John J. Seliskar
  • Patent number: 7960781
    Abstract: In one embodiment, a semiconductor device is formed having vertical localized charge-compensated trenches, trench control regions, and sub-surface doped layers. The vertical localized charge-compensated trenches include at least a pair of opposite conductivity type semiconductor layers. The trench control regions are configured to provide a generally vertical channel region electrically coupling source regions to the sub-surface doped layers. The sub-surface doped layers are further configured to electrically connect the drain-end of the channel to the vertical localized charge compensation trenches. Body regions are configured to isolate the sub-surface doped layers from the surface of the device.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: June 14, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gary H. Loechelt, Peter J. Zdebel
  • Patent number: 7955927
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a memory array region and a peripheral circuit region; a first active region and a second active region in the peripheral circuit region; a recessed gate disposed on the memory array region, comprising a first gate dielectric layer on the semiconductor substrate, wherein the first gate dielectric layer has a first thickness; and a second gate dielectric layer on the peripheral circuit region, wherein the second gate dielectric layer on the first active layer has a second thickness, and the second gate dielectric layer on the second active layer has a third thickness.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: June 7, 2011
    Assignee: Nanya Technology Corporation
    Inventors: Shian-Jyh Lin, Yu-Pi Lee, Ming-Yuan Huang, Jar-Ming Ho, Shun-Fu Chen, Tse-Chuan Kuo
  • Patent number: 7385227
    Abstract: A light emitting device package and method for making the package utilizes a first leadframe having a first surface and a second leadframe having a second surface that are relatively positioned such that the second surface is at a higher level than the first surface. The light emitting device package includes a light source, e.g., a light emitting diode die, which is mounted on the first surface of the first leadframe and electrically connected to the second surface of the second leadframe.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: June 10, 2008
    Assignee: Avago Technologies ECBU IP Pte Ltd
    Inventors: Thye Linn Mok, Ju Chin Poh, Siew It Pang
  • Patent number: 7112879
    Abstract: A microelectronic package includes a microelectronic element having contacts accessible at a surface thereof, a layer overlying the microelectronic element, the layer having a first surface and a sloping peripheral edge extending away from the first surface of the layer, and conductive terminals overlying the microelectronic element, wherein the layer supports the conductive terminals over the microelectronic element. The package also includes conductive traces having first ends electrically connected with the contacts of the microelectronic element and second ends electrically connected with the conductive terminals, with at least one of the conductive traces having a section that is in contact with and extends along the sloping peripheral edge of the layer, and a compliant material disposed between the conductive terminals and the microelectronic element so that the conductive terminals are movable relative to the microelectronic element.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: September 26, 2006
    Assignee: Tessera, Inc.
    Inventors: Joseph Fjelstad, Konstantine Karavakis
  • Patent number: 6337728
    Abstract: A liquid crystal display device capable of preventing occurrence of display irregularity due to movement of spherical spacer materials. The liquid crystal display device includes a pixel electrode and counter electrode that are formed on a liquid crystal-side surface of one transparent substrate of respective transparent substrates disposed opposing each other with a liquid crystal being laid therebetween, wherein the transmissivity of light transmitting between this pixel electrode and the counter electrode is controlled by twisting of molecules of the liquid crystal as caused by an electric field generated between the pixel electrode and counter electrode. In the liquid crystal display device, spacer materials are provided between respective ones of said transparent substrates. These spacers are fixed and disposed on an insulating layer underlying an orientation film which is in contact with said liquid crystal on the one transparent substrate side.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: January 8, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Keiko Inoue, Shigeru Matsuyama, Setsuo Kobayashi, Hiroaki Asuma