Patents Examined by Kenneth Wieder
  • Patent number: 6133740
    Abstract: A method and apparatus are set forth which enables a gas chromatographic column output to be connected with a pulse discharge chamber in which chemically bound chlorine in volatile organic or inorganic samples is measured. A spark discharge is formed in the chamber to ionize and excite helium molecules to a metastable state. In turn, that transfers excitation to a trace of krypton gas in the chamber which is ionized, and the ionized krypton then preferentially binds with chemically bound chlorine. The latter binding occurs with the liberation of a photon centered at about 222 nanometers thereby defining a spectral region of interest which is measured by a photomultiplier tube to quantify chemically bound chlorine.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: October 17, 2000
    Assignee: Valco Instrument Co., Inc
    Inventors: Wayne E. Wentworth, Stanley D. Stearns
  • Patent number: 6049212
    Abstract: An SWR bridge with an accompanying set of connector saving adapters for connecting between the test port of the SWR bridge and a test device. The SWR bridge includes a branch opposite the test port which has an impedance set to substantially compensate for the impedance of the connector saving adapters. The connector saving adapters are configured to mate with connectors from two groups of test device connectors in both male and female versions, a first group including 3.5 mm, SMA and 2.92 mm connectors, and a second group including 2.5 mm and 1.85 mm connectors. To compensate for any capacitive mismatch between an adapter configured for a particular group of connectors and a given connector type, either a center conductor pin setback, an inductive counter bore in the outer conductor of the adapter, or a combination of the center pin setback and inductive counter bore may be utilized.
    Type: Grant
    Filed: July 20, 1995
    Date of Patent: April 11, 2000
    Assignee: Wiltron Company
    Inventor: William W. Oldfield
  • Patent number: 5869959
    Abstract: A spectrum analyzer includes a synchronizing signal input terminal (27A) and a sweep control signal generator (32) inserted between the synchronizing signal input terminal (27A) and a ramp address generator (23). In the case of making a frequency analysis of an input signal Sx which is a burst wave, a synchronizing signal SY, synchronized with the burst wave, is applied to the synchronizing signal input terminal (27A) from the outside and a sweep control signal SC which rises an arbitrary period of time after the synchronizing signal SY and has an arbitrary width is generated by the sweep control signal generator (32). The sweep control signal SC is applied to the ramp address generator (32), which sweeps, in each burst, a ramp voltage VR for controlling a local oscillator (16) and an address AD for effecting a write into a signal loading memory (19), and in the other periods the sweep is stopped.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: February 9, 1999
    Assignee: Advantest Corporation
    Inventor: Shigeo Tomikawa
  • Patent number: 5841286
    Abstract: An oscilloscope comprises a trigger circuit for initiating display of the waveform of an input signal in response to a trigger event, at least one detection circuit responsive to the input signal for detecting occurrence of an anomalous event therein, and a counter for reporting the number of occurrences of the anomalous event that have been detected.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: November 24, 1998
    Assignee: Tektronix, Inc.
    Inventor: John F. Stoops
  • Patent number: 5841293
    Abstract: Integrated circuit chips are screened for susceptibility to latch-up by first applying power and ground to the chips to be tested while limiting current flow to a non-destructive compliance value. Next, the chips are irradiated with a pulse of radiation having an energy dose calibrated to trigger latch-up in latch-up sensitive chips. Upon termination of the radiation, the current is detected. Chips having current persisting at the compliance value are indicated as failing. The current in passing chips returns approximately to the original standby current value. In the preferred embodiment, the radiation is visible light and the radiation energy dose is selected to cause a percentage of chips to latch-up approximating the percentage of failures expected at burn-in.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: November 24, 1998
    Assignee: International Business Machines Corporation
    Inventor: James Marc Leas
  • Patent number: 5793195
    Abstract: Ion-beam probes of the planar, screened, and multilayer types are shown and described. These probes can detect the arrival of energetic ions and, in the latter type, also detect the arrival of energetic neutral molecules. A specific improvement is the use of a multilayer collection surface behind an aperture to measure the angular distribution of the etching contributions of energetic ions and/or energetic neutral molecules. After use, this multilayer collection surface provides a permanent record of the measurement. The improvement is also suitable for the adverse thermal and ion-etching environment of an energetic ion beam. In one embodiment, the aperture size and distance from the collection surface are such that a theoretical analysis of etch depth behind a straight-edge mask can be used to analyze the experimental results. The etch contour can be accurately reproduced from the measurement of half-maximum half angle, as long as the assumed distribution is incorporated in the measurement process.
    Type: Grant
    Filed: August 30, 1995
    Date of Patent: August 11, 1998
    Assignee: Kaufman & Robinson, Inc.
    Inventors: Harold R. Kaufman, Raymond S. Robinson, James R. Kahn
  • Patent number: 5757199
    Abstract: The test carrier for the semiconductor integrated circuit device according to the present invention comprises a substrate and a substrate covering sheet. The substrate includes thereon a semiconductor chip, in which a semiconductor integrated circuit is formed, such that electrodes of the semiconductor chip are positioned upwardly. The covering sheet has contact pads to be contacted to the electrodes of the semiconductor chip and formed on one surface thereof, and has connecting wirings to be connected to the contact pads and formed on the other surface thereof.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: May 26, 1998
    Assignee: Fujitsu Limited
    Inventor: Shigeyuki Maruyama
  • Patent number: 5726574
    Abstract: A method of pinpointing the location between manholes of a fault in an electrical cable typically buried underground in an urban environment, the fault being caused by an insulation defect which may be broken down by a high voltage includes the steps of applying the voltage to break down the fault insulation defect to induce a transient fault pulse on the cable on both sides of the fault traveling away from the fault. By the use of a ferrite type transformer coupler producing an output voltage, the direction of the transient fault pulse is determined by relating the polarity of the output voltage to the initial high voltage pulse which was applied.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: March 10, 1998
    Assignee: Electric Power Research Institute, Inc
    Inventors: Michael H. Silverberg, Jack F. Trezza
  • Patent number: 5717338
    Abstract: A method and apparatus for testing flyback transformers counts the number of cycles of a decaying ringing signal generated in a resonant circuit including the secondary winding of the flyback transformer beginning with the second cycle and ending with the cycle where the amplitude of the ringing signal falls below twenty-five percent of the amplitude of the second cycle of the ringing signal.
    Type: Grant
    Filed: November 7, 1995
    Date of Patent: February 10, 1998
    Assignee: Sencore, Inc.
    Inventor: Terry D. Cook
  • Patent number: 5705930
    Abstract: A sensor installable within a gas turbine engine for sensing electrostatic charge therein. The sensor comprises a sensing plate and first and second shielding plates. The sensing plate has a first face with a first peripheral portion, and a second face with a second peripheral portion. The first and second shielding plates are spaced from and positioned relative to the first and second faces of the sensing plate, respectively, by a layer of electrically insulating material, so that electrostatic charge in the proximity of the sensor is sensed by both the first and second peripheral portions of the sensing plate.
    Type: Grant
    Filed: September 20, 1995
    Date of Patent: January 6, 1998
    Assignee: Stewart Hughes Limited
    Inventor: Roy Forfitt
  • Patent number: 5703492
    Abstract: In a fault analysis of large-scale integrated (LSI) circuits, a potential distribution image of a non-defective product and another potential distribution image of a defective product are displayed alternately and continuously in time, so that it is possible to acquire in real time an image of any location within a whole surface of the LSI chip. As a result, it can be viewed as if the potential distribution image of the non-defective product and the potential distribution image of the defective product are overlapped or superimposed with over time. Accordingly, a different portion between the non-defective and defective potential distribution images can be seen distinguishably from a coincident portion between the non-defective and defective potential distribution images, so that it is possible to trace the different portion in real time.
    Type: Grant
    Filed: January 10, 1995
    Date of Patent: December 30, 1997
    Assignee: NEC Corporation
    Inventors: Toyokazu Nakamura, Yasuko Hanagama, Tohru Tsujide, Kenji Morohashi
  • Patent number: 5694051
    Abstract: A method and apparatus for inspecting a transistor in an inverter circuit includes turning on only the transistor of the inverter circuit. A predetermined collector current is supplied to the transistor until a transistor junction temperature reaches a predetermined temperature. The transistor is acceptable if a difference between a transistor collector-to-emitter voltage when the predetermined collector current is supplied and a transistor collector-to-emitter voltage when the junction temperature reaches the predetermined temperature falls within a preset range. Switching elements of the inverter circuit are controlled to supply a current through a resistor to charge an electrolytic capacitor of the inverter circuit. A voltage across the electrolytic capacitor during charging and a time period is measured from the beginning of charging until a time when a voltage across the electrolytic capacitor attains a predetermined voltage.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: December 2, 1997
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Atsushi Ueyama, Yoshinari Tsukada, Fumitomo Takano
  • Patent number: 5694049
    Abstract: Burn-in module 120 contains a lower socketless board 230 and an upper socketless board 240. Device sitting positions 210, or a high temperature resistant sheet 610 perform the socket functions of holding the device 400 laterally in place and routing test signals to the device 400. The lower socketless board 230 has electrical leads which carry test signals from the oven circuitry 140 to the plurality of device positions 210. The lower socketless board 230 is fastened to the upper socketless board 240 by a connector 220. If the upper socketless board 240 is modified to contain electrical leads then connector 220 may also act as an electrical connector and carry electrical signals from the lower socketless board 230 to the upper socketless board 240.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: December 2, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Inderjit Singh, Sukhbir Singh
  • Patent number: 5691647
    Abstract: A sensing device and a method for sensing the presence and absence of an object in a machine using the sensing device. The sensing device generally including a sensing mechanism, a resistive element, and a control mechanism communicatively coupled to the sensing mechanism and resistive element. The sensing mechanism being coupled to the resistive element. The method comprising actuating the sensing mechanism so that it senses the location of the object. Recording the voltage across the resistive element in the control mechanism when the sensing mechanism senses the location of the object. Reactuating the sensing mechanism at least one more time to sense the location of the object. Measuring a subsequent voltage across the resistive element when the sensing mechanism is reactuated and comparing the subsequent voltage with the recorded voltage across the resistive element when the resistive element sensed the location of the object.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: November 25, 1997
    Assignee: Tooling & Production Systems, Inc.
    Inventors: Dean Bentzien, Hermann Dohl, Frank Riedl, Armin Dohl
  • Patent number: 5682104
    Abstract: In the present invention, a signal is input to a device by the device input apparatus, a trigger signal is input to the electron beam tester, and a wiring pattern of the layout obtained from design data is displayed on the display. A beam is applied onto a predetermined measurement point in the wiring while operating the device by the irradiation means, and the amount of secondary electrons emitted from the irradiated measurement point is detected by the detector. The potential at the measurement point, which corresponds to the amount of the secondary electrons detected, calculated from the calculation means (not shown), and the potential data obtained from this calculation is displayed being superimposed on the wiring pattern of the layout.
    Type: Grant
    Filed: February 9, 1995
    Date of Patent: October 28, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mahito Shido
  • Patent number: 5675257
    Abstract: A device for diagnosing the state of health of an ignition system is provided, where the system includes at least one spark producing channel comprising an exciter, output circuit and igniter plug. The device provides a diagnosis of the state of health for both the exciter and igniter plug by monitoring the high energy pulses at the output of the exciter. By monitoring the ignition system at an intermediate point in the system such as the output of the exciter, the sensor and electronics of the device may be completely contained within the electronic environment of the exciter, thereby avoiding any need for attaching sensors at the output of the system adjacent to the igniter plug in order to diagnose the plug's state of health. As an alternative to the device being built into the ignition system, it can be incorporated into automatic test equipment that produces high energy pulses for delivery to an igniter plug to be tested.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: October 7, 1997
    Assignee: Unison Industries Limited Partnership
    Inventor: John R. Frus
  • Patent number: 5672965
    Abstract: An evaluation board for evaluating electrical characteristics of an IC package has an electrically insulating support board having signal wire patterns for contact by a measurement probe formed on a first surface and mounting pads for contact with solder balls of an IC package formed on a surface. The signal wire patterns and the mounting pads are electrically connected with each other via through holes formed in the support board. The signal wire patterns are surrounded by and spaced from a ground pattern formed on the first surface.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Kurafuchi, Hiroshi Seki, Mitsuyuki Takada
  • Patent number: 5672982
    Abstract: An object of the present invention is to make it easy to realize a method of measuring a current which flows upon deactivation of a semiconductor integrated circuit in order to test whether a damaged transistor exists in the semiconductor integrated circuit.
    Type: Grant
    Filed: August 16, 1995
    Date of Patent: September 30, 1997
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Harumi Kawano
  • Patent number: 5670888
    Abstract: A method and apparatus for handling wafers. A wafer pick moves along a horizontal x-axis to unload a wafer from a cassette and position the wafer over a chuck. The chuck moves upwardly along a z-axis perpendicular to the surface of the wafer and lifts the wafer off the pick. The pick retracts through a slot in the chuck and a test probe moves along the x-axis to position itself over the wafer and chuck with reference to a calculated wafer center. The chuck then moves upwardly to engage the surface of the wafer with the probe. Wafer characteristics are tested at several test points located on a circle on the surface of the wafer by repeatedly lowering the chuck, rotating the chuck by a small amount, and raising the chuck to engage the wafer with the probe. The probe is then positioned to test another circle of points.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 23, 1997
    Inventor: David Cheng
  • Patent number: 5668477
    Abstract: A testing apparatus for detecting popcorn noise in magnetic heads comprises a fully integrated testing system which includes an analog circuit portion and a digital circuit portion. The analog circuit portion is implemented to interface with a magnetic head while the digital circuit portion is designed to store the testing sequence, analyze the testing data, control and execute the testing routines. The testing apparatus is designed for production environments where testing data are required instantaneously as feedback for production process monitoring.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: September 16, 1997
    Assignee: Read-Rite Corporation
    Inventors: Mostafa Mahmoudian, Jagdeep S. Buttar, Oleg A. Gergel, Neil Motiska