Abstract: A system and method is shown for enabling a plurality of computers and associated computer resources, some or all of which may be of heterogeneous configuration, to cooperatively process various applications such that the execution is transparent to the user regardless of where the application is actually executing. This distributed applications architecture performs an information distribution service between multiple transaction processing systems by working with a transaction processor via communication channels to other hosts within the network and a dialog manager which uses a transaction processor interface to communicate with the transaction processor. The architecture employs a map service which provides an editor to create the maps for the application panels, a compiler to generate the maps into a linkable form, and a linkable interpreter which translates the linkable form into the screen presentation format for that platform.

Abstract: A method and apparatus for dispatching load operations in a computer system. The present invention includes a method and apparatus for determining when the load operation is ready for dispatched to memory. The load operation is then scheduled to dispatch from memory and then dispatched to memory. In the present invention, a load is determined ready when it is no longer blocked, such that there is no condition which produces a resource or address dependency causing the load to be blocked.

Abstract: The number of instruction processors to be independently allocated to each supervisor is limited to a level at which the performance of the tightly coupled multiprocessor system is not deteriorated. A plurality of independent tightly coupled multiprocessor systems comprising these supervisors and a plurality of instruction processors are provided to improve their processing capacity. Since the existence of a plurality of supervisors complicates the management of these supervisors, a supervisor for a total managing service to which separate instruction processors are independently allocated is provided. This supervisor for a total managing service executes initialization and termination of the supervisors and monitoring of a fault, to thereby integrally manage the plurality of supervisors and the on-line control programs under their control.

Abstract: In a distributed data processing system running multiple applications on the client system resources specific to an application which have no impact on the overall display at the server, are stored in application address space. Resources which have an effect on the overall system and which are managed in the client system are stored in common presentation address in the client system. Resources which have an overall effect and are managed in the server system are stored in the display server system.

Abstract: A computer software architecture for controlling a highly parallel computer system comprises several layers of abstraction. The first layer is an abstract physical machine which contains a set of abstract physical processors. This layer may be considered as a microkernel. The next layer includes virtual machines and virtual processors. A virtual machine comprises a virtual address space and a set of virtual processors that are connected in a virtual topology. Virtual machines are mapped onto abstract physical machines with each virtual processor mapped onto an abstract physical processor. The third layer of abstraction defines threads. Threads are lightweight processes that run on virtual processors. In a preferred embodiment the abstract physical machines, abstract physical processors, virtual machines, virtual processors, thread groups, and threads are all first class objects.

Abstract: The present invention is a system and process for optimizing programs, having memory references, at the object code level. The process includes the computer-implemented steps of instrumenting each of the memory references to create an instrumented program, executing the instrumented program to capture effective address trace data for each of the memory references, analyzing the access patterns of the effective address trace data and, in response, reordering the memory references to create an optimized program.

Abstract: A library of C functions to perform PCMCIA Card Services. A PCMCIA Card Services specification defines a set of functions which allow applications and device drivers to access PCMCIA Cards. The PCMCIA Card Services specification provides a register based software interrupt binding to access the Card Services functions. A library of C functions is defined which can be called to perform the Card Services functions. The library of C functions can reformat the function parameters and then call a Card Services provider with a standard register based software interrupt binding. Alternatively, the library of C functions can be a fully protected mode implemenation of Card Services.

Abstract: A computer method and system for invoking a function member of an object that is exposed to a client computer program by a source computer program are provided. In a preferred embodiment, the source computer program instantiates the object which has a dispatching interface. The dispatching interface has an invoking function member for receiving a name of a function member and arguments for the function member. When a client computer program wishes to invoke the function member, the client computer program invokes the invoking function member of the dispatching interface passing the name of the function member and arguments for the function member. The invoking function member invokes the function member with the passed name passing the arguments. When the function member returns, the invoking function member returns to the client computer program.

Abstract: A system for storing array variables in a programming language, wherein all subscripts are converted to strings, and stored along with the name of the array, allowing strings to be used as subscripts. When the array subscript is another variable, the contents of the subscript variable are converted to a string which is stored along with the array name. Memory is allocated when data is stored in the variable, allowing sparse arrays. A record from a file can be stored with each field of the record stored as an element of an array, indexed by the field name. The type of the data stored in a variable is stored with the data, thus the type can be changed dynamically, and each array element can have a different data type. The size of each dimension of the array can be changed dynamically, and the number of dimensions can be increased dynamically.

Abstract: This invention is a debugger for HPF-like languages which can be implemented on top of basically any debugger. A primary feature of the debugger is the use of backup breakpoints to generate a program status which is similar to a program status in a sequential execution of the code and the back and forth mapping between processor variables. This debugger requires some new debugging information which must be provided by the compiler. It then allows debugging from a sequential point of view.

Abstract: In an object-oriented application, a preparation process is used when compiling the sources of the application, a configuration process is used when link-editing, and a communication process is used during execution to call up methods for objects. No adaptation of sources is necessary when a system configuration is changed. This also applied to an extension of the object-oriented application.

Abstract: A system and method for achieving unitary installation of software at each time software is installed in user units of a distributed computer system. A specially adapted recipe is created from a general recipe which has fewer questions than the general recipe, or even no questions at all. This requires less information, or no information, from the user. This specially adapted recipe may either be used to achieve unitary installation of a program product in a plurality of mutually similar units of a computer system. The method enables a specially adapted installation recipe or configuration recipe to be created which can be re-used for manually, semi-automatically or fully automatically creating, installing or reconfiguring software. This reduces the total work in creating and/or installing a plurality of software programs or reconfiguring existing software while being aware of how these were created and/or installed or configured.

Abstract: One physical segment 30 is divided into a plurality of fixed-length logic segments 31, where a logic segment management table 22 for management each logic segment 31 is provided. In registering a subprogram 40, a smaller sized region is assigned to the logic segment 31 by a segment size decision means 11, a logic segment producing means 12, and a logic segment register means 13. In deleting the subprogram 40, the logic segment 31 which comes to a not-use status is deleted by a logic segment retrieval means 14 and a logic segment delete means 15.

Abstract: A method for operating a computer system includes the identification of at least one of a plurality of consoles to the operating system so as to be able to dynamically specify console attributes. Furthermore, a unique command and response token value is provided for associating commands and subsequently generated responses or messages so that they may be directed to an appropriately select set of consoles as determined by the token value and the console attributes. These facilities provide a programmable and flexible interface to a computer and its operating system environment so as to facilitate the utilization of console devices for controlling the computer complex from one or more remote locations in a consistent, protected, efficient but yet flexible manner.

Abstract: The present invention provides a mechanism for initial execution of software code by a processor in a multiprocessor system. In the preferred embodiment, the multiprocessor system has registers implemented at a reset vector location in a processor. The registers are first loaded with a sequence of software code, and then a first instruction loop is implemented with that software code. The processor is then released from a reset state, and the first instruction loop is executed. This first instruction loop is capable of being executed for an indefinite length of time, and it can execute software instructions on a periodic basis. The first instruction loop is then modified into a second instruction loop. The first and second instruction loops have at least one different instruction. The processor within the system of multiple processors is thus initialized.

Abstract: An improved storage mechanism is provided. In a preferred embodiment of the present invention, a container is used for storing objects, links to objects, and other containers. The container of the preferred embodiment is programmable so that the methods of the container are replaceable and the functionality of the container is extendible through the use of a command unit.

Abstract: An instruction code includes a first memory address part 22 and a second memory address part 23, and when a microinstruction decoder 14 decodes an operation code of save or restore instruction of the instruction code prefetched by an instruction queue 13, a micro-ROM 15 assigns the task number specified by the first memory address part 22 to an index value, reads a register list of the task from a context save information specified by the second memory address part 23, and selectively saves or restores the content of the register specified by the register list. With this configuration, the central processing unit can save or restore the context with a small occupied memory quantity and at high speed.

Abstract: A system for program development and execution consisting of a high level programming language based on a four part rule organization, consisting of a rule definition, a list of conditions, a list of actions which are taken upon satisfaction of a corresponding condition, and a list of exception handlers. The high level language is translated into an internal representation which controls a virtual stack machine. The virtual stack machine performs dynamic binding of rules and data to the current rule. Data access events are supplied through a table access method which provides an interface to the variety of sources of data coupled to the system. These sources of data include screens, import/export mechanisms, a foreign database system, such as IMS, and a local database system known as the table data store. The table data store organizes data in an object oriented, relational system, where each table is ordered on a primary key.

Abstract: A method and system for referring to and binding to objects using a moniker object is provided. In a preferred embodiment, a moniker object contains information to identify linked source data and provides methods through which a program can bind to the linked source data. A binding method is provided that returns an instance of an interface through which the linked source data can be accessed. The moniker object can identify source data that is stored persistently or nonpersistently. In addition, moniker objects can be composed to form a composite moniker object. A composite moniker object is used to identify linked source data that is nested in other data. In a preferred embodiment, the moniker object provides other methods including a reducing method that returns a more efficient representation of the moniker object; equality and hash methods for comparing moniker objects; and inverse, common prefix, and relative-path-to methods for comparing and locating moniker objects from other moniker objects.

Abstract: A method and apparatus for an innovative, object-oriented hardware independent interface to the external world. The interrupt services are part of an overall IO model providing an object base IO system that supports dynamic configuration of the system. Object processing is architected into even the lowest lever routines in the preferred embodiment of the invention. This includes an object oriented design all the way down to interrupt processing abstractions. These interrupt abstractions provide an architecturally sound framework for the dynamic installation, configuration, and timely execution of interrupt handlers.