Abstract: A client sends a state information message such as an error message or a state information manipulation request to a logging system server. The logging system server prioritizes the messages and requests, and sends them to the appropriate components. A notification engine and a notification manager control notifying the user of the state information message. A plugin server and plugins control logging the state information message and control other state information manipulation such as generating statistical analysis data and paging a user. The plugin server enables additional plugins to be added to the system. An external notification manager sends the state information message and possibly other information such as the statistical analysis data to an external system such as technical support. A system fatal error controller locks up the system during a system fatal error to prevent any additional data corruption.

Abstract: A data processing network has a client connected to first and second servers in which the first and second servers are operable to communicate with the network according to first and second incompatible data communication protocols. The client is operable to issue, onto the network, a first initial boot request (e.g. RPL) according to the first data communication protocol (IEEE 802.2) and the first server is operable, in response to the client request to send BOOTP bootstrap code to the client system. The BOOTP bootstrap code is loaded into client memory and when executed causes the client to issue a BOOTP request for servicing by the second server system.

Abstract: A multiprocessor system includes first and second processing units. Each of these processing units includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. Each processing unit is reset in response to a system reset signal but only selected portions of the processing units are reset in response to a partial-reset signal. The system can also include a number other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.

Abstract: A device (L) for transferring data between heterogeneous apparatuses (1, 2, 3 and 4) and one or more computers (18 and 19). An interface (20) is automatically configured by loading and executing specific protocol conversion programs and adapting the physical link on the basis of recognition of the connecting cable (5, 6, 7, 8, 16 or 17) between the interface and the computer(s) and apparatus(es) to be connected. The connecting cable is recognized by entering a key (k5, k6, k7, k8, k16 or k17) in the cable in the form of one or more electrical or electronic components providing nonambiguous identification of the cable.

Abstract: There is provided a document processing system in which a print image is stored into a memory and can be handled as output data by forming a document. The system comprises: a memory to store document data in a bit map style; a converter for converting the document data including characters, figures, images, etc., based on the result of the document formation into data of bit map style to be stored into the memory; an image output device corresponding to a page description language; and a circuit for making the data of bit map style stored in the memory correspond to the data format of the page description language, suitably for the particular image output device. With this system, data of substantially the same style as that in the local printing characters can be obtained from an external printing system in accordance with a request of the user.

Abstract: Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.

Abstract: The architecture and design method of an application specific processor having an instruction set which is matched to the needs of a specific application is provided. The application specific processor design method is based on using a library of pre-designed function blocks (111-113). These pre-designed function blocks encapsulate complex processing functions most commonly used by a specific application. Each of the pre-designed application specific function blocks is designed such that values of certain parameters of the encapsulated processing algorithm are implemented using registers which can be programmed with any desired value. Each of the pre-designed application specific function blocks is designed such that it can interface with a multi-purpose bus (110) through which the function block can accept invocation, reconfiguration, and data input/output routing commands.

Abstract: A system, method and article of manufacture for automatically inserting concurrency object services into binary classes in an information handling system employing object oriented technology, includes the steps of recognizing a constraint indicating that an object does not support concurrency and generating a concurrent version of the object. One alternative for generating a version of an object supporting concurrency is automatic transactional locking. The approach includes the steps of inheriting from the Lockable class which adds state to a class to allow object-level locking, inheriting from the Serialised metaclass which adds before and after methods to all methods of the non-concurrent version, and the object must be a RecoverableObject. Another alternative for generating a version of an object supporting concurrency is automatic per method locking.

Abstract: Committing an installation plan object for installing applications in a network. The installation plan object includes an application-in-plan object which represents an application program and a group-in-plan object which represents a group of workstations on which the application program is to be installed. As part of the commit process, the installation plan object is prevalidated by examining its child objects and adding additional child objects to the installation plan object if required, validated by examining data in the installation plan object and its child objects for errors in the data and transformed into data structures usable for a network installation engine which installs applications across a network. The installation plan further includes a response file object if the application's installation requires a response file and a customization file object which contains data to customize the response file object data for particular workstations.

Abstract: Apparatus and methods are disclosed for performing time-reversed scheduling of a data dependency graph representing a target program instruction loop in an optimizing compiler. The instruction scheduling function is the modulo scheduling function of an optimizing compiler and it is noted that the time-reverse transforms preserve all modulo constraints. Most modern microprocessors have the ability to issue multiple instructions in one clock cycle and/or possess multiple pipelined functional units and typically contain multi-level memory devices such as on-chip cache, off-chip cache as well as main memory. For such microprocessors this invention can, where applicable, accelerate the process of modulo-scheduling loops in the target program code. The invention consists of a technique to transform the data dependency graph of the target program instruction loop in order to produce an improved schedule of the loop instructions.

Abstract: A process controller implements an overall, user-developed control strategy in a process control network that includes distributed controller and field devices. A user defines a module control strategy by specifying function blocks that make up control modules and determine the control strategy. The user modifies or debugs a module control strategy by adding, modifying and deleting function blocks, configuring parameters associated with the function blocks and creating a view to new attributes. By defining function blocks and control modules, a user-defined control strategy, application program or diagnostic program is represented as a set of layers of interconnected control objects identified as modules. A layer of the control strategy includes a set of modules which are interconnected in a user-specified manner. A module typically includes an algorithm for performing a specific function and display components which are used to display information to a user.

Abstract: A PowerPC based Network Operating System Loadable Module (NOSLM) is concatenated onto an Intel-based NOSLM and offsets are adjusted to account for the size of the Intel-based NOSLM. The resulting enlarged NOSLM appears as a typical Intel-based NOSLM to Intel-based servers. When the enlarged NOSLM is loaded by PowerPC-based servers, the offsets are used to point the server to the beginning of the PowerPC-based NOSLM code and the Intel-based NOSLM is interpreted as a machine-specific header.

Abstract: A boot strap assignment system is disclosed for a symmetric multiprocessor computer in which the role of the boot strap processor is assigned to one of the working processors by a central agent as part of power-on configuration. The system includes a system management processor which monitors the operation of the multiprocessor computer and controls a switching circuit that selectively transmits the boot strap assignment signal from the central agent to the working processors. Since the management processor monitors environmental conditions and shut-down events, it can predict the failure of working processors and assign the bootstrapping function appropriately. A watch dog timer is also provided in case the bootstrapping fails so that another working processor can be assigned the task of booting up the computer.

Abstract: A central processing unit reset device for a portable computer system having no hardware reset switch. The central processing unit reset device includes a central processing unit having a reset terminal. A keyboard contains a plurality of discrete keys including a reset key that are independently operable by manual depression. The reset key serves as a reset switch for allowing a user to reboot an operating system of the central processing unit even when the central processing unit is locked in an infinite loop. A controller is electrically connected to the keyboard to scan the user's input through the keyboard and generate a reset request signal in response to the user's depression of said reset key on the keyboard. Finally, a reset driving circuit is electrically connected to the controller to generate a central processing unit reset signal to the reset terminal to reboot the operating system of the central processing unit.

Abstract: An electronic device including a microprocessor which executes code for carrying out a predefined set of operations; a non-volatile memory for storing code accessed by the microprocessor in order for the microprocessor to carry out the predefined set of operations; a PC Card slot coupled to the microprocessor; and a control circuit for, when the device is in an initialization state, providing for code stored in a PC Card inserted in the PC Card slot to be written to the non-volatile memory by the microprocessor.

Abstract: A method and system for referring to and binding to objects using a moniker object is provided. In a preferred embodiment, a moniker object contains information to identify linked source data and provides methods through which a program can bind to the linked source data. A binding method is provided that returns an instance of an interface through which the linked source data can be accessed. The moniker object can identify source data that is stored persistently or nonpersistently. In addition, moniker objects can be composed to form a composite moniker object. A composite moniker object is used to identify linked source data that is nested in other data. In a preferred embodiment, the moniker object provides other methods including a reducing method that returns a more efficient representation of the moniker object; equality and hash methods for comparing moniker objects; and inverse, common prefix, and relative-path-to methods for comparing and locating moniker objects from other moniker objects.

Abstract: A computer application stored on a storage medium (e.g., a portable storage medium such as a compact disk) is automatically launched. Initialization information expressed in accordance with a predefined syntax is stored on the storage medium. Also stored in the computer is "launching" information sufficient, together with the initialization information, to enable the computer to launch the application. The application is automatically launched, without user intervention, by reading the initialization information and using it in connection with the launching information stored in the computer.

Abstract: Apparatus and methods are disclosed for scheduling target program instructions during the code optimization pass of an optimizing compiler. Most modern microprocessors have the ability to issue multiple instructions in one clock cycle and/or possess multiple pipelined functional units. They also have the ability to add two values to form the address within memory load and store instructions. In such microprocessors this invention can, where applicable, accelerate the execution of modulo-scheduled loops. The invention consists of a technique to achieve this speed up by systematically reducing the number of certain overhead instructions in modulo scheduled loops. The technique involves identifying reducible overhead instructions, scheduling the balance of the instructions with normal modulo scheduling procedures and then judiciously inserting no more than three copies of the reducible instructions into the schedule.

Abstract: A user inquiry facility and method are described for use in a computerized data processing system which provides for monitoring of conversations or information transmission between a user of the data processing system, during the execution of the user's program, and a communication partner (which could include a database or other facility) associated with the data processing system. Task progress tracing information is selected from the conversations and stored. The stored information is updated to keep it current with the progress of the task of the user's program. An instruction is provided by the facility or method which, when activated, by the user selects task progress tracing information from the stored information and after formatting it for readability is transmitted to the user-s display or terminal.

Abstract: A software asset systemizing apparatus which arranges existing software assets. A language determinant keyword storing unit stores keywords for judging the descriptive language names of software assets. An asset name analysis keyword storing unit stores keywords for analyzing the asset names of the software assets. A characteristic information analysis keyword storing unit analyzes characteristics of the software assets. An interrelated asset analysis keyword storing unit stores keywords for analyzing interrelations among the software assets. A software asset analyzing unit executes analyses for software assets by using contents stored in the language determinant keyword storing unit, asset name analysis keyword storing unit, characteristic information analysis keyword storing unit and interrelation asset analysis keyword storing unit An intermediate asset information storing unit stores works-in-process of the analyses by the software asset analyzing unit.