Abstract: A power protecting apparatus and method of a power amplifier for removing backward voltages and preventing a hard damage within a circuit by connecting an output terminal of a DC-DC converter with an input terminal of a filter using diodes when an excessive backward voltage is generated due to physical characteristics of an inductor within the circuit at the time of applying high power level and low power level to the power amplifier using switching devices within a power circuit in order to optimize power consumption.

Abstract: A traveling wave amplifier comprises a first normally off MOS transistor having a drain, source and gate terminal. The drain terminal is connected to a node of a drain line, which is connected to a first supply voltage potential via a connecting resistor. The gate terminal is connected to a node of a gate line, onto which an input signal is coupled. The source terminal is coupled to a second supply voltage potential via a first resistor. The traveling wave amplifier also comprises at least one second normally off MOS transistor. In addition, the traveling wave amplifier further comprises a normally off bias MOS transistor. The normally off bias MOS transistor forms a current mirror with at least one of the second normally off MOS transistors. An output signal of the traveling wave amplifier is tapped off on the drain line.

Abstract: A circuit is disclosed for operating Doherty amplifiers in parallel in a small size circuit and at a low cost while reducing transmission loss and preventing a narrowed band. The circuit has a plurality of Doherty amplifiers and a signal combiner. Each of the plurality of Doherty amplifiers is applied with a distributed input signal which is amplified and delivered by the Doherty amplifier. The signal combiner is made up of a transmission line transformer, is connected to the outputs of the Doherty amplifiers and to its output terminal. The signal combiner has an impedance as viewed from the Doherty amplifiers, which represents an optimal load for the Doherty amplifiers, and an impedance as viewed from the output terminal, which is equal to the characteristic impedance of a transmission line connected to the output terminal. The signal combiner combines the outputs of the Doherty amplifiers and delivers the resulting output from the output terminal.

Abstract: Systems and methods for detecting the impedance of an output load coupled to a digital amplifier and compensating for changes in the response of the amplifier. One embodiment of the invention is implemented in a Class D pulse width modulated (PWM) amplifier. In this embodiment, a digital PCM test signal is generated. This test signal is processed by the amplifier to produce a corresponding analog audio output signal that is used to drive a speaker. A sense resistor placed in series with the speaker is used to generate a test voltage that is compared to a reference voltage. When the test voltage reaches the reference voltage, the current through the sense resistor (hence the speaker) is at a known level, so the value of the digital test signal is noted. The impedance of the speaker is then determined from the test signal value and the speaker current.

Abstract: A sampling differential amplifier for amplification of a signal having: a signal input (2) for application of an input signal to be amplified; signal amplification transistors (N1, N1) whose control connections are connected via sampling capacitors (CA, CA) to the signal input (2); with the signal amplification transistors (N1, N1) each being connected via series-connected load resistances (RL1, RL2) to a positive supply voltage (VDD) and via current source (N3) to a negative supply voltage (VSS); a signal output (3) for emitting an amplified output signal, with the signal output (3) being tapped off the signal amplification transistors (N1, N1); and having sampling switching transistors (N2, N2), which are each connected between the series-connected load resistances (RL1, RL2) and a control connection of one signal amplification transistor (N1, N1), with the control connection of the sampling switching transistors (N1, N1) being connected to a control signal input (13) for application of a sampling control s

Abstract: A receiver circuit is configured as a frequency compensated differential amplifier having one input coupled to the output of a transmission line to receive a transmitted signal and the second input coupled to a reference voltage. The differential amplifier has a high frequency gain equivalent to the gain of an uncompensated differential stage for the transmitted signal. The compensated differential amplifier has an attenuated low frequency gain for signal frequencies substantially lower than the high frequency and a transitional gain for frequencies between the low and high frequencies. A compensated stage provides the portion of the signal with a compensated response and an uncompensated stage provides the portion of the amplified signal that is uncompensated. Bias control signals determine how much of the output signal is from the compensated and uncompensated stages as a means for customizing response from transmission lines with varying losses.

Abstract: A differential amplifier comprises an operational amplifier, comprising a positive output terminal, a negative output terminal, and a feedback terminal; a common mode sensing circuit coupled to the positive output terminal and the negative output terminal, for generating a sensed common mode voltage of the positive output terminal and the negative output terminal of the operational amplifier; and a feedback circuit comprising a common mode input terminal for receiving the sensed common mode voltage, a reference input terminal for receiving a reference voltage, and a first resistive component coupled between the common mode input terminal and the reference input terminal, the feedback circuit generating a feedback signal according to the common mode voltage and the reference voltage; wherein the feedback terminal of the operational amplifier receives the feedback signal of the feedback circuit.

Abstract: A common mode control circuit reduces abrupt voltage changes at the outputs of a pair of amplifiers which, in turn, reduces EMI and distortions that occur when the correlation between the signals fed to the four channels of an audio system diminishes. The common mode control circuit generates for each amplifier a reference potential that is a saturated replica of the respective differential input signal of the amplifier that saturates when the amplifier switches to a bridge configuration.

Abstract: A receiver circuit having an optical reception device and having an amplifier connected to the reception device, the amplifier also having a circuit for setting the operating point of the amplifier and also at least one control terminal of the circuit, by which the operating point of the amplifier can be selectively changed between at least two values at the user end. The receiver circuit according to the invention enables a noise optimization of the amplifier by virtue of an adjustability of the operating point of the amplifier.

Abstract: In one embodiment, a delay circuit is formed to use cascode coupled transistors to receive signals from a differential pair and increase the propagation through the delay circuit.

Abstract: An amplifier module has a substrate, as assembly having one or more integrated circuit (IC) dies mounted to the substrate, and one or more other electronic components mounted to the substrate. The assembly receives an input signal and generates an amplified output signal. The one or more other electronic components perform one or more amplifier-related functions. The amplifier module is adapted to be mounted to a circuit board (CB) as a distinct electronic package. The invention may be implemented as an electronic system having the CB and at least one such amplifier module mounted to the CB.

Abstract: An amplifier includes differential current sensing circuitry and an input bridge. Two paths of the input bridge receive the input signals and provide proportional current flows to the differential current sensing circuitry. The input bridge is configured to provide a differential offset voltage in one current path, and a complimentary voltage drop of equal magnitude in the other current path. In the examples, the input bridge includes a matched pair of transistors. To remove parallel incremental or small-signal conductance-related error sources, both transistors are operated at matched VDS (drain-to-source) voltages. The voltage offset, provided in association with one of the input transistors, serves to extend the range of certain circuits using the amplifier. The complimentary voltage drop in association with the other input transistor maintains the match of the VDS voltages for the two transistors.

Abstract: In a power amplifier driven by a pulse width modulation (PWM) signal, a first pair of drive pulses opposite in level to each other is formed from a first pulse width modulation signal whose quantization level corresponds to its pulse width and supplied to a first push-pull circuit (15). A second pair of drive pulses opposite in level to each other is formed from a second pulse width modulation signal whose two's complement of quantization level corresponds to its pulse width, and supplied to a second push-pull circuit (16). A speaker (19) is connected between the first and second push-pull circuits (15 and 16). A deviation between potentials at the output terminals of the first and second push-pull circuits (15 and 16), respectively, is detected. When a deviation is detected, the push-pull circuits are substantially stopped from operating.

Abstract: An amplifier circuit operable to provide symmetric current limiting. The amplifier circuit includes a common source amplifier for sourcing a current and receiving an voltage input, a current source, and a current limiting device coupled between the common source amplifier and the current source. The current limiting device is operable to limit the current sourced by the common source amplifier. A bias network coupled to the current limiting device biases the current limiting device. An output is coupled to the current limiting device. The amount of current that is sourced to the output of the amplifier circuit may be limited, such that current limiting is symmetrical.

Abstract: A gain adjuster and a phase adjuster of a distortion generation path are set so that an extracted distortion component becomes small, the extracted component is compared with a reference value. When an upper-frequency distortion component of a pilot signal is larger than the reference value, the gain and phase of a frequency characteristic compensator of the distortion generation path are controlled so that the upper-frequency distortion component of the pilot signal becomes smaller than a value preset in the controller. When a lower-frequency distortion component of the pilot signal is larger than a reference value, the gain and phase of the frequency characteristic compensator of the distortion generation path are controlled so that the lower-frequency distortion component of the pilot signal becomes smaller than a value preset in the controller.

Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.

Abstract: A multi-band low noise amplifier capable of operating in a plurality of band modes includes a plurality of input amplifiers respectively corresponding to the plurality of band modes and an output amplifier. Each input amplifier includes a receiving port for receiving a corresponding input signal in the band mode. The output amplifier includes at least a lowest-impedance port being a lowest-impedance node of the multi-band low noise amplifier and an output port for outputting the input signal processed by the output amplifier. The output amplifier is coupled to the plurality of input amplifiers at the lowest-impedance port.

Abstract: A combined signal of a digital pilot signal and a digital transmission signal is applied to a digital predistorter (20), wherein it is added with odd-order distortions based on a power series model to generate a predistorted signal, then the predistorted signal is converted by a DA converter (31) to an analog signal, then the analog signal is upconverted by a frequency upconverting part (33) to a send frequency band, and the upconverted signal is output after being amplified by a power amplifier (37). A pilot signal component is extracted from the power amplifier output, then odd-order distortion components of the power series model are extracted by a digital predistorter control part (50) from the pilot signal component, and the odd-order distortions in the digital predistorter (20) are controlled to decrease the levels of the distortion components.

Abstract: In a multi-channel amplifier switching from a single-ended to a bridge configuration, one of the two operational amplifiers of the output bridge structure of each channel is kept at the design reference voltage (typically to half the supply voltage) for as long as the other operational amplifier of the output bridge structure does not begin to saturate and by connecting in common the gate nodes of the P-type MOS transistors and the gate nodes of the N-type MOS transistors of the output half bridge stages of all the operational amplifiers of the output bridge pairs of all the channels that are eventually configured to function as voltage reference buffer, when configuring the multi channel amplifier to function in a single-ended configuration.

Abstract: A current threshold circuit includes a series impedance, a reference voltage source, and a comparison module. The series impedance couples an output of a current source to a load, wherein impedance of the series impedance is substantially less than impedance of the load. The reference voltage source is operably coupled to produce a reference voltage differential. The comparison module is operably coupled to compare the reference voltage differential with a differential voltage of the series impedance, wherein the comparison module generates an excessive current indication when the differential voltage of the series impedance compares unfavorably to the reference voltage differential.