Abstract: A high-voltage (HV) power supply outputs an output voltage based on a control signal produced by a dual analog/digital feedback loop. The control signal is determined at least in part by an error amplifier that receives a measurement signal, proportionally attenuated from the output voltage, and a digital-to-analog converter (DAC) output signal. An analog-to-digital converter (ADC) also receives the measurement signal and transmits it in digitized form to a digital processor. The digital processor calculates a digital DAC data signal based on the measurement signal, and on a digital set-point input signal corresponding to a set-point voltage value of the output voltage desired to be outputted from the high-voltage source. A DAC receives the DAC data signal and converts it to the DAC output signal transmitted to the error amplifier.

Abstract: A scalable multi-phase switching converter includes: converter modules, each including: a loop control unit, which generates a basic trigger pulse according to a feedback signal in master operation mode; and a switching control unit, which determines an operation mode and a corresponding phase serial order according to a setting signal received by a setting pin in a setting mode, and generates a multi-phase trigger pulse signal at a trigger pin according to the basic trigger pulse in master operation mode. The switching control unit receives the multi-phase trigger pulse signal at the trigger pin in slave operation mode. The switching control unit generates an ON-trigger pulse according to the multi-phase trigger pulse signal and the corresponding phase serial order. An ON-period determination unit generates a conduction control pulse according to the ON-trigger pulse to control a corresponding inductor. The trigger pins of the converter modules are coupled to each other.

Abstract: A power converter is provided. The power converter includes an LLC converter, a feedback circuit, a first driving circuit, and a second driving circuit. The LLC converter includes a first arm transistor group and a second arm transistor group. The feedback circuit provides a feedback signal corresponding to a current value of the LLC converter. The first driving circuit drives the first arm transistor group in response to the feedback signal and provides a control signal. The second driving circuit drives the second arm transistor group in response to the control signal.

Abstract: A power supply system includes a direct current (DC) power source and a protection circuit having input and an input and an output, the input is operably coupled to the DC power so that, in operation, it receives DC power from the DC power source. The protection circuit includes a first path and a second path that both electrically couple the input to the output, and current passes, in operation, primarily through the first path when a voltage at the input is greater than a threshold voltage related to a Zener diode in the second path and primarily through the second path when the voltage at the input is below the threshold voltage. The system also includes a voltage regulator having an input coupled to the output of the protection circuit.

Abstract: A control apparatus for a power conversion apparatus acquires a detected voltage of an alternating-current power supply. The control apparatus determines a period from when the detected voltage exceeds a first determination value for determining a zero-up-crossing timing of an actual voltage of the alternating-current power supply until the detected voltage falls below a second determination value for determining a zero-down-crossing timing of the actual voltage to be a period during which the actual voltage has a positive polarity, and determines a period from when the detected voltage falls below the second determination value until the detected voltage exceeds the first determination value to be a period during which the actual voltage has a negative polarity. The first determination value is less than the detected voltage when the actual voltage is zero, and the second determination value is greater than the detected voltage when the actual voltage is zero.

Abstract: A system on an integrated circuit (IC) chip includes an input terminal and a return terminal, a heater, a thermopile, and a switch device. The heater is coupled between the input terminal and the return terminal. The thermopile is spaced apart from the heater by a galvanic isolation region. The switch device includes a control input coupled to an output of the thermopile. The switch device is coupled to at least one output terminal of the IC chip.

Abstract: A system includes: 1) a battery configured to provide an input voltage (VIN); 2) switching converter circuitry coupled to the battery, wherein the switching converter circuitry includes a power switch; 3) a load coupled to an output of the switching converter circuitry; and 4) a control circuit coupled to the power switch. The control circuit includes: 1) a switch driver circuit coupled to the power switch; 2) a summing comparator circuit configured to output a first control signal that indicates when to turn the power switch on; and 3) an analog on-time extension circuit configured to extend an on-time of the power switch by gating a second control signal with the first control signal, wherein the second control signal indicates when to turn the power switch off.

Abstract: A compensation circuit includes a tail current source, an error amplifier; a compensation resistor, and a voltage-to-current converter circuit. The tail current source is configured to generate a tail current. The error amplifier is coupled to the tail current source and biased by the tail current. The compensation resistor is coupled to the error amplifier. The voltage-to-current converter circuit is coupled to the error amplifier. The compensation resistor is configured to vary in resistance responsive to a change in the tail current, or the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.

Abstract: A resonant power conversion device includes: a main circuit provided with a semiconductor switch, a capacitor and an inductor connected in series or parallel to the semiconductor switch; and a drive circuit configured to drive the switching element. The switching element enters an off-state or an on-state depending on a control voltage input to a gate terminal, and the drive circuit includes two or more types of control voltages, as a control voltage at which the switching element enters an off-state.

Abstract: A switching regulator includes a power stage circuit and a controller circuit. The controller circuit includes a first amplification circuit, a second amplification circuit, a ramp signal generation circuit, and a comparator. The first amplification circuit generates an amplification signal according to a difference between a low-pass filtered signal and a feedback signal. The second amplification circuit generates an adjustment signal according to a difference between the feedback signal and a fast response signal. The comparator generates a pulse width modulation signal according to a difference between the amplification signal and a ramp signal to generate a switch control signal. The adjustment signal adaptively adjusts the amplification signal or the ramp signal. The low-pass filtered signal is related to a signal generated by filtering out higher frequency part of the reference signal, and the reference signal is related to a dynamic change of a target level of the output voltage.

Abstract: Stable switching is disclosed for a power factor correction boost converter using an input voltage and an output voltage. In one example, a boost converter control system includes a gate driver coupled to a switch of a boost converter to generate a drive signal to control switching of the switch, wherein a period of the drive signal is adjusted using a current adjustment signal. A current control loop is coupled to the gate driver to receive a sensed input current from the boost converter and a desired input current and to generate the current adjustment signal to the gate driver. A current limiter is coupled to the gate driver and the current control loop to determine a duty cycle of the switch, to determine a maximum input current in response to the duty cycle, and to restrict the desired input current to below the maximum input current.

Abstract: A synchronous rectifier control circuit, used with a synchronous rectification circuit having a primary switch and a synchronous rectifier, having: a drain-source threshold setting circuit, configured to provide a dynamic drain-source voltage threshold based on a drain-source voltage across the synchronous rectifier; a primary switch detecting circuit, configured to provide a primary switch state indicating signal based on a comparison result of the drain-source voltage and the dynamic drain-source voltage threshold; and an on-control circuit, configured to provide a synchronous on signal to turn on the synchronous rectifier when the drain-source voltage decreases to the turn-on threshold, on the premise that the primary switch state indicating signal indicates an on state of the primary switch.

Abstract: A semiconductor device in which an increase in circuit area is inhibited is provided. The semiconductor device includes a first circuit layer and a second circuit layer over the first circuit layer; the first circuit layer includes a first transistor; the second circuit layer includes a second transistor; a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor; a source and a drain of the second transistor are electrically connected to the other of the source and the drain of the first transistor; and a semiconductor layer of the second transistor contains a metal oxide.

Abstract: An inverter protection device is disclosed. An inverter protection device, which determines whether or not a pulse-width modulation (PWM) control signal provided to an inverter unit of an inverter is blocked in accordance with a voltage signal received from first and second switches of a safety relay which are parallelly connected, comprises: a first power switch which is switched to an on-state by means of a first voltage signal applied from the first switch; a second power switch which is switched to an on-state by means of a second voltage signal applied from the second switch; and a buffer unit which is on-off controlled in accordance with an output current of the first and second power switches and provides the PWM control signal to the inverter unit.

Abstract: A power semiconductor element and a support member are stacked with an intermediate structure being interposed between the power semiconductor element and the support member. The intermediate structure includes a first metal paste layer and at least one first penetrating member. The first metal paste layer contains a plurality of first metal particles. The at least one first penetrating member penetrates the first metal paste layer. At least one first vibrator attached to the at least one first penetrating member penetrating the first metal paste layer is vibrated. The first metal paste layer is heated so that the plurality of first metal particles are sintered or fused.

Abstract: A method and apparatus are described for controlling the phase of an interleaved boost converter using cycle ring time. In an embodiment, a cycle controller generates a first drive signal to control switching of a first converter and a second drive signal to control switching of a second converter, the controller receives a first cycle signal from the first converter and a second cycle signal from the second converter, wherein the first cycle signal and the second cycle signal have a power phase time and a ringing phase time. The cycle controller determines a master ringing phase time of the first cycle signal and applies the master ringing phase time to the second cycle signal to determine a slave ringing phase time. The cycle controller generates the second drive signal in accordance with the slave ringing phase time.

Abstract: A load control device for controlling power delivered from an AC power source to an electrical load may have a closed-loop gate drive circuit for controlling a semiconductor switch of a controllably conductive device. The controllably conductive device may be coupled in series between the source and the load. The gate drive circuit may generate a target signal in response to a control circuit. The gate drive circuit may shape the target signal over a period of time and may increase the target signal to a predetermined level after the period of time. The gate drive circuit may receive a feedback signal that indicates a magnitude of a load current conducted through the semiconductor switch. The gate drive circuit may generate a gate control signal in response to the target signal and the feedback signal, and render the semiconductor switch conductive and non-conductive in response to the gate control signal.

Abstract: A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.

Abstract: This chopper circuit 1 performs voltage conversion between a first DC voltage at a first external connection terminal and a second DC voltage at a second external connection terminal and is provided with: a first switch portion 11 having the first external connection terminal; a second switch portion 12 connected in series with the first switch portion 11 so that the conducting direction during ON-time matches that of the first switch portion 11 and having the second external connection terminal on the opposite side to the side where the first switch portion 11 is connected; one or a plurality of semiconductor power converters 13 cascade-connected to each other, which are provided on a wire branched from the wire for connecting the first switch portion 11 and the second switch portion 12; and an inductor 14 connected in series with the semiconductor power converters 13 on the wire branched from the wire for connecting the first switch portion 11 and the second switch portion 12.

Abstract: A voltage regulator comprises an output transistor with a controlled section connected between a first supply terminal and an output terminal. An amplifier comprises a reference input and a feedback input. A current mirror comprising a replica transistor. The current mirror is configured to mirror and attenuate a load current supplied by the output transistor to the replica transistor. A filter circuit is coupled to a controlled section of the replica transistor and coupled to the feedback input of the amplifier via the output terminal.