Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.

Abstract: A voltage regulator that outputs, from an output terminal, as an output voltage, a power supply voltage that is input from an input terminal, the voltage regulator including an error amplifier that includes a constant current source that causes a current that is based on a constant current supplied from an outside to flow, and outputs a signal that is based on a difference between a feedback voltage obtained by dividing the output voltage and a reference voltage, an output transistor that has a source connected to the input terminal, a drain connected to the output terminal, and a gate connected to an output of the error amplifier, a capacitor that has one end connected to the output terminal, a boost transistor that is connected in parallel with the constant current source and that has a gate connected to another end of the capacitor, and a diode that has an anode connected to the other end of the capacitor and a cathode connected to a ground terminal.

Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.

Abstract: An embodiment DC to DC conversion circuit comprises a DC to DC converter and a regulation circuit. The regulation circuit comprises a comparator configured to detect, during a discharge phase of the DC to DC converter, an overshoot period during which an output voltage of the DC to DC converter exceeds a target voltage, and a timer configured to measure a duration of the overshoot period.

Abstract: A device includes a first transistor connected between a first node and an output terminal and a first current source connected between the first node and a supply rail. A circuit includes a second current source connected between the supply rail and a second node, an operational amplifier having a non-inverting input configured to receive a potential set point, and a second transistor connected between the second node and an inverting input of the operational amplifier. An output of the operational amplifier is connected to a control terminal of the second transistor and further connected to a control terminal of the first transistor.

Abstract: A regulator includes a switch array, a feedback circuit, first and second voltage-controlled oscillators, and a switch driver. The switch array generates an output voltage based on a number of enabled switches from among a plurality of switches. The feedback circuit generates a feedback voltage which depends on a level of the output voltage. The first voltage-controlled oscillator generates a first signal having a first frequency which depends on a difference between a reference voltage and the feedback voltage. The second voltage-controlled oscillator generates a second signal having a second frequency which depends on a difference between the feedback voltage and the reference voltage. The switch driver determines a turn-on time point of each of the plurality of switches based on the first signal and determining a turn-off time point of each of the plurality of switches based on the second signal.

Abstract: A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.

Abstract: A method is provided for setting an operating parameter for a DC to DC voltage converter. A load is operated, using a controller, with the operating parameter at a first value. A measurement of an actual inductor current at an inductor of the DC to DC voltage converter, a measurement of an actual load current are provided. The method then determines a reference value for the inductor current, based on the actual load current combined with an inductor current adjustment value based on a desired output voltage at the DC load. The reference value for the inductor current is then compared to the actual inductor current, and the operating parameter is maintained at the first value if the reference value is greater than the actual inductor current. The operating parameter is changed to a second value if the reference value is less than the actual inductor current.

Abstract: A power managed voltage reference quickly provides accurate operation when enabled and also avoids back-charging power supply rails when disabled. When disabled, the voltage reference filter capacitor is decoupled from the voltage reference buffer and coupled to a pre-charge source having a voltage magnitude greater than the reference voltage. When the voltage reference is enabled, the capacitor is coupled to a discharge path and the voltage across the capacitor is detected to determine when to decouple the capacitor from the discharge path and couple the capacitor to the voltage reference buffer. The capacitor voltage is also detected while disabling the voltage reference. Back-charging the pre-charge supply is prevented by coupling the capacitor to the discharge path until the magnitude of the capacitor voltage is less than the lowest voltage specified for the pre-charge supply, then coupling the capacitor to the pre-charge supply to prepare for enabling the voltage reference.

Abstract: The present application provides a power converter and a power supply system, the power converter includes: a star/delta switching unit, a first power conversion unit, a second power conversion unit, a third power conversion unit, and a controller; AC terminals of the first power conversion unit, the second power conversion unit and the third power conversion unit are connected to a three-phase AC terminal through the star/delta switching unit, and DC terminals of the first power conversion unit, the second power conversion unit, and the third power conversion unit are connected to a DC power terminal; wherein the controller is configured to control the star/delta switching unit according to a signal reflecting a voltage of the DC power terminal, to form a star connection or a delta connection among the three-phase AC terminal and the first power conversion unit, the second power conversion unit and the third power conversion unit.

Abstract: A power factor correction circuit includes a power meter configured to measure a total harmonic distortion (THD) at an input port; a switching-type regulator that is controllable by a switch control signal in order to adjust a power factor; and a controller configured to generate the switch control signal to control the switching-type regulator to perform power factor correction, where the controller adjusts an on-time of a main switch of the switching-type regulator based on the measured THD to decrease the THD.

Abstract: Disclosed is a system for determining a primary switching event in an isolated converter having a primary-side and a secondary-side. The system includes a primary-switch (PS) on the primary-side, a synchronous rectifier (SR) on the secondary-side, an integration circuit, and a SR controller. The integration circuit is in signal communication with the SR on the secondary-side and the SR controller is in signal communication with the SR and the integration circuit. The SR is configured to produce a drain-to-source voltage (VDS) and the integration circuit is configured to integrate a difference between the VDS and a output voltage (VOut) (produced by the secondary-side) over time to produce a VDS over time value (VTime). The SR controller is configured to determine if the VDS is greater than a first threshold voltage (VTH) and determine the primary switching event when the VTime is greater than a second threshold voltage (VSTH).

Abstract: An AC-DC power converter can include: a front-stage power circuit; a rear-stage power circuit configured to share one power switch as a main power switch with the front-stage power circuit, where the rear-stage power circuit is coupled to a load, and a first magnetic component of the front-stage power circuit and a second magnetic component of the rear-stage power circuit are not in one conductive loop from a positive terminal of a DC input voltage to a negative terminal of the DC input voltage; and an energy storage capacitor coupled to the front-stage power circuit and the rear-stage power circuit, where energy is transferred to the energy storage capacitor and the load when the first magnetic component is discharged.

Abstract: The invention relates to an arrangement for overload protection of overvoltage protection devices, consisting of at least one type II surge arrester with or without a thermal disconnecting device that responds in the event of an of overload. According to the invention, a switching unit free of movable contacts is connected in series with the at least one surge arrester and structurally combined therewith, which switching unit has at least two fixed narrow spaced switching contacts, wherein the spacing of the switching contacts is specified in such a way that in the event of every surge current or discharge process, the switching device changes into a quasi-closed state because of the arc formed; whereas in the idle state, the voltage of the connected mains drops at the switching device, with the surge arrester arranged in series remaining free of leakage current.

Abstract: The present disclosure is directed to an electrosurgical generator including a resonant inverter having an H-bridge and a tank. A sensor array measures at least one property of the tank. A pulse width modulation (PWM) controller outputs a first PWM timing signal and a second PWM timing signal to the H-bridge. The PWM controller controls a dead-time between the first PWM timing signal and the second PWM timing signal based on the at least one property measured by the sensor array.

Abstract: Examples described herein provide a circuit and methods for self-testing to detect damage to a device, which damage may be caused by an Electro-Static Discharge (ESD) event. In an example, an integrated circuit includes an input/output circuit, an ESD protection circuit, and a system monitor. The input/output circuit has an input/output node. The ESD protection circuit is connected to the input/output node. The system monitor has a driving/measurement node selectively connectable to the input/output node. The system monitor is configured to drive and measure a voltage of the driving/measurement node. The system monitor is further configured to determine, based on driving and measuring the voltage of the driving/measurement node, whether a damaged device is present. The damaged device is in the input/output circuit or the ESD protection circuit.

Abstract: A low-temperature drift ultra-low-power linear regulator includes eight PMOS transistors, two resistors, two capacitors and three NMOS transistors. The eight PMOS transistors include PMOS transistor PM1 to PMOS transistor PM8. The two resistors include resistor R1 and resistor R2. The two capacitors include capacitor C1 and capacitor C2. The three NMOS transistors include NMOS transistor NM1, NMOS transistor NM2 and NMOS transistor NM3. From right to left, the linear regulator includes a PTAT voltage core starting circuit, a PTAT voltage core circuit, a negative temperature characteristic generating circuit and a driver stage closed-loop control circuit. PM5-PM8 form a feedback circuit. The feedback circuit clamps the current flowing through PM6 to be proportional to PM2 to obtain a temperature-stable output voltage, and can dynamically adjust the gate voltage of PM5 according to the change of load current to output different currents according to the load demand.

Abstract: A semiconductor circuit according to embodiments includes a circuit that includes the current source and generates the output voltage, and a voltage filter constituted by a depression-type NMOS transistor, the depression-type NMOS transistor having a source connected to a power supply side of the circuit, a gate that is grounded, and a drain to which a power supply voltage is applied. Thereby, a voltage on the power supply side of the circuit that has the current source and generates an output voltage is fixed regardless of an influence of a power supply fluctuation and suppresses a change in circuit characteristics.

Abstract: A method regulates a power converter arrangement that has at least one power converter arm with a series circuit of two-pole switching modules. Each of the switching modules contains a plurality of semiconductor switches and an energy store. At least some of the switching modules are switching modules of a first type and at least some further switching modules are switching modules of a second type. In the method, a voltage setpoint value of a power converter regulator is apportioned into a first and a second setpoint value portion. The switching modules of the first type are driven on the basis of the first setpoint value portion and the switching modules of the second type on the basis of the second setpoint value portion.

Abstract: A front-end module comprises a bias network including a current mirror, a junction temperature sensor, an n-bit analog-to-digital converter, an n-bit current source bank configured to automatically set reference current levels for one or more operating temperature regions, and a power amplifier. The bias network, junction temperature sensor, n-bit analog-to-digital converter, n-bit current source bank, and power amplifier are integrated on a first semiconductor die.