Patents Examined by Laura M Menz
  • Patent number: 10692964
    Abstract: An integrated circuit (IC) includes a circuit substrate having a front side surface and an opposite back side surface. Active circuitry is located on the front side surface. An inductive structure is located within a deep trench formed in the circuit substrate below the backside surface. The inductive structure is coupled to the active circuitry.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 23, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Roberto Giampiero Massolini, Daniel Carothers
  • Patent number: 10680083
    Abstract: According to an embodiment of the present invention, a semiconductor structure includes a semiconductor substrate and a plurality of fins located on the semiconductor substrate. The plurality of fins each independently includes a bottom fin portion, a top fin portion layer, and an isolated oxide layer located in between the bottom fin portion and the top fin portion layer in the y-direction parallel to the height of the plurality of fins. The isolated oxide layer includes a mixed oxide region located in between oxidized regions in an x-direction perpendicular to the height of the plurality of fins.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: June 9, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ruqiang Bao, Hemanth Jagannathan, Paul C. Jamison, Choonghyun Lee
  • Patent number: 10679953
    Abstract: Semiconductor devices and methods of forming are provided. A molding compound extends along sidewalls of a first die and a second die. A redistribution layer is formed over the first die, the second die, and the molding compound. The redistribution layer includes a conductor overlying a gap between the first die and the second die. The conductor is routed at a first angle over an edge of the first die. The first angle is measured with respect to a straight line that extends along a shortest between the first die and the second die, and the first angle is greater than 0.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: June 9, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, An-Jhih Su, Tsung-Shu Lin
  • Patent number: 10672685
    Abstract: A display device is disclosed, which includes: a substrate having a first surface and a second surface, wherein the first surface is opposite to the second surface; a first conductive element disposed on the first surface; a second conductive element disposed on the second surface; and a connecting element disposed in a through via of the substrate, wherein the connecting element electrically connects the first conductive element and the second conductive element; wherein the second conductive element has a first oxygen atomic concentration, the connecting element has a second oxygen atomic concentration, and the first oxygen atomic concentration is greater than the second oxygen atomic concentration.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: June 2, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Jui-Jen Yueh, Kuan-Feng Lee, Yuan-Lin Wu, Chandra Lius
  • Patent number: 10672753
    Abstract: A transfer apparatus includes: a body portion; and an adhesive portion connected to the body portion, with which a point light source of a display apparatus is attachable to and detachable from the transfer apparatus by contact therewith. The adhesive portion is defined by a plurality of surfaces in different planes from each other.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hyunjoon Oh
  • Patent number: 10672688
    Abstract: A semiconductor power device including a base plate, a ring frame disposed over the base plate, a semiconductor power die disposed on the base plate and surrounded by the ring frame, an input lead by way the semiconductor power die receives an input signal, wherein the input lead is disposed over a first portion of the ring frame, and an output lead by way an output signal generated by the semiconductor power die is sent to another device, wherein the output lead is disposed over a second portion of the ring frame. The ring frame may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The ring frame produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: June 2, 2020
    Assignee: Integra Technologies, Inc.
    Inventor: William Veitschegger
  • Patent number: 10672856
    Abstract: A display device including a substrate, a display region, a periphery region outside of the display region, a terminal part arranged with a plurality of terminal electrodes in the periphery region, a wiring arranged between the display region and the terminal part, a plurality of inorganic insulation layers, and an organic insulation film arranged between the display region and the terminal part. At least one of the plurality of inorganic insulation layer extends between the display region and the terminal part and includes an opening part between the display region and the terminal part, the organic insulation film is arranged overlapping the opening part, the organic insulation film has a larger film thickness at a center part than an end part of the opening part, and the wiring is arranged along an upper surface of the organic insulation film.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: June 2, 2020
    Assignee: Japan Display Inc.
    Inventor: Masato Hiramatsu
  • Patent number: 10665482
    Abstract: A method for processing a plate-shaped workpiece having a division line and a metal member formed on the division line or in an area corresponding to the division line includes a holding step of holding the workpiece on a chuck table with the metal member oriented downward, a first cutting step of cutting the workpiece along the division line by using a first cutting blade, thereby forming a first cut groove having a bottom not reaching the metal member, and a second cutting step of cutting the workpiece along the first cut groove by using a second cutting blade, thereby forming a second cut groove fully cutting the workpiece along the division line so as to divide the metal member. The second cutting step includes supplying a cutting fluid containing an organic acid and an oxidizing agent to the workpiece.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 26, 2020
    Assignee: DISCO CORPORATION
    Inventor: Kenji Takenouchi
  • Patent number: 10665545
    Abstract: Semiconductor devices, semiconductor packages and methods of forming the same are provided. One of the semiconductor device includes a dielectric layer and a connector. The dielectric layer includes a dielectric material and an additive, wherein the additive includes a compound represented by Chemical Formula 1. The connector is disposed in the dielectric layer.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu, Meng-Che Tu
  • Patent number: 10665519
    Abstract: A semiconductor chip includes a single-crystal substrate and a metal electrode on the bottom surface of the substrate. The metal electrode has a region in which a first metal is exposed and a region in which a second metal is exposed, the second metal having a standard electrode potential different from that of the first metal.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 26, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Isao Obu, Yasunari Umemoto, Masahiro Shibata
  • Patent number: 10665563
    Abstract: A semiconductor chip packaging structure without soldering wire and a packaging method thereof are disclosed. The semiconductor chip packaging structure comprises at least one packaging structure, and each packaging structure comprises a substrate, and a semiconductor chip is arranged on the substrate. Pins of the semiconductor chip are electrically connected to the conductive circuit formed by engraving or etching metal film or alloy film. The semiconductor chip packaging structure also comprises a packaging glue layer covering the semiconductor chip and the conductive circuit. The semiconductor chip packaging method includes steps of arranging a semiconductor chip on the substrate; forming a metal film or an alloy film around the semiconductor chip; etching the metal film or alloy film, to form the conductive circuit; and covering a packaging glue layer on the semiconductor chip and the conductive circuit. As a result, the production efficiency can be improved greatly.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: May 26, 2020
    Assignee: SHENZHEN JIEJIANDA INNOVATION TECHNOLOGY CO., LTD.
    Inventors: Bo Tu, Hsiang-Yi Cheng
  • Patent number: 10665804
    Abstract: An OLED and a display device has OLED are provided. The OLED includes an anode; an organic emission layer positioned on the anode, the organic emission layer includes a multilayer functional layer; a diffusion layer is positioned between at least two adjacent functional layers of the multilayer functional layer, the diffusion layer dissociates metal ions, the metal ions is diffusing to the functional layer adjacent to the diffusion layer for filling traps of the functional layer which is adjacent to the diffusion layer. The OLED of this invention could fill traps of the organic molecular materials, and decreases joule heating effect which generated by getting rid of the carriers bonded by traps. Therefore, it achieves to enhance life time and luminous performance of OLED.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: May 26, 2020
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Mingming Chi, Lei Pei
  • Patent number: 10658274
    Abstract: An electronic device including a die and at least one lead. The electronic device further includes a corresponding at least one connector, each connector for connecting the die to a corresponding lead or leads, and each connector having a first end disposed in bondable proximity to a complementary surface of the corresponding lead and a second end disposed in bondable proximity to a complementary surface of the die. An end portion of at least one of the first end and second end has a formation, the formation in combination with the complementary surface of one, or both, of the respective lead or the die defining therebetween a first region and at least a second region configured to attract by capillary action an electrically conductive bonding material to consolidate therein.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: May 19, 2020
    Assignee: Nexperia B.V.
    Inventors: Tim Boettcher, Haibo Fan, Wai Wong Chow, Pompeo V. Umali, Shun Tik Yeung, Chi Ho Leung
  • Patent number: 10658539
    Abstract: A light emitting diode device is described which includes at least one planar non-periodic high-index-contrast grating. The light emitting diode device includes a cavity formed between a reflective optical element and a transmissive optical element. One or both of the optical elements can be a planar non-periodic high-index-contrast grating. The transmissive optical element can be a collimating lens used to collimate incident beams of light while the reflective optical element can be a parabolic reflector used to reflect incident beams of light along a direction opposite to an incidence direction. A light emitter can be disposed within the cavity and can emit beams of light.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: May 19, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Zhen Peng, Nathaniel Quitoriano, Marco Fiorentino
  • Patent number: 10658251
    Abstract: A process of forming an epitaxial substrate is disclosed, where the epitaxial substrate includes a nucleus forming layer made of aluminum nitride (AlN) grown on a substrate made of silicon carbide (SiC). The process includes steps of: (1) first measuring the first reflectivity R0 of a surface of the SiC substrate, (2) growing the nucleus forming layer made of AlN as measuring second reflectivity R1 of a grown surface of the AlN nucleus forming layer, and (3) ending the growth of the AlN nucleus forming layer when a ratio R1/R0 of the reflectivity enters a preset range.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: May 19, 2020
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS
    Inventor: Tadashi Watanabe
  • Patent number: 10651167
    Abstract: A semiconductor FET provides a resonant gate and source and drain electrodes, wherein the resonant gate is electromagnetically resonant at one or more predetermined frequencies.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: May 12, 2020
    Inventor: L. Pierre de Rochemont
  • Patent number: 10651207
    Abstract: A display device may include a substrate; a plurality of signal lines on the substrate; a plurality of scan lines on the substrate, the scan lines crossing the signal lines; and a plurality of thin film transistors at crossing positions of the scan lines and the signal lines. The scan lines include some first scan lines and some second scan lines. Each of the second scan lines has an end connected to a load element.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: May 12, 2020
    Assignee: Japan Display Inc.
    Inventors: Daichi Hosokawa, Naoki Miyanaga, Masakatsu Kitani
  • Patent number: 10651248
    Abstract: An organic electroluminescent display panel and a display device is disclosed. The organic electroluminescent display panel includes: a pixel array; a packaging adhesive surrounding the pixel array; and a laser reflector located between the pixel array and the packaging adhesive. The laser reflector includes a top surface inclined toward the packaging adhesive which reflects the edge portion of the laser to the packaging adhesive.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 12, 2020
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lina Wang, Liang Zhang, Haotian Wang, Zifeng Wang
  • Patent number: 10637210
    Abstract: An optical device has a gallium and nitrogen containing substrate including a surface region and a strain control region, the strain control region being configured to maintain a quantum well region within a predetermined strain state. The device also has a plurality of quantum well regions overlying the strain control region.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: April 28, 2020
    Assignee: Soraa Laser Diode, Inc.
    Inventors: James W. Raring, Christiane Poblenz Elsass
  • Patent number: 10636651
    Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: April 28, 2020
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Sheng-Ting Fan, Pin-Shiang Chen, Chee Wee Liu, Chi-Wen Liu