Abstract: A semiconductor substrate has a plurality of groove portions formed along scribe lines. The semiconductor substrate includes: a device region in contact with at least any one of the plurality of groove portions and having a semiconductor device formed therein; a surface insulating layer formed to cover the device region and constituting a surface layer of the semiconductor substrate; and a wiring electrode connected to the semiconductor device and formed in a protruding shape rising above a surface of the surface insulating layer. The semiconductor substrate can be manufactured by forming a plurality of groove portions along scribe lines; applying an insulating material to a surface on a side where the plurality of groove portions are formed to form a surface insulating layer; and forming a wiring electrode connected to the semiconductor device and in a protruding shape rising above a surface of the surface insulating layer, after the formation of the surface insulating layer.

Abstract: According to an example embodiment, a vertical light emitting device (LED) includes a semiconductor layer including an active layer configured to emitting light, a first electrode on a first side of the semiconductor layer, and a second electrode on a second side of the semiconductor layer opposite to the first electrode. At least one of the first and second electrodes includes a metal electrode pattern and a transparent electrode pattern. The transparent electrode pattern is in a region between segment electrodes of the metal electrode pattern. The transparent electrode pattern is electrically connected to the metal electrode pattern.

Abstract: A semiconductor device and methods for small trench patterning are disclosed. The device includes a plurality of gate structures and sidewall spacers, and an etch buffer layer disposed over the sidewall spacers. The etch buffer layer includes an overhang component disposed on the upper portion of the sidewall spacers with an edge that extends laterally. The width between the edges of adjacent overhang components is narrower than the width between adjacent sidewall spacers.

Abstract: The invention relates to a method for processing a movable substrate by means of laser, wherein the processing results in the release of material separated from the substrate, wherein during processing of the substrate a higher pressure prevails on the side of the substrate where the substrate is impinged by the laser beam than on the other side of the substrate, and to a device for performing such a processing, wherein the device comprises guide means for guiding the substrate and laser processing means adapted to cast onto the substrate a laser spot which processes the substrate in a laser processing zone, and comprises means for generating a higher pressure on the side of the substrate where the substrate is impinged by the laser beam than on the other side of the substrate.

Abstract: A method for forming a nanowire field effect transistor (FET) device includes forming a nanowire over a substrate, forming a liner material around a portion of the nanowire, forming a capping layer on the liner material, forming a first spacer adjacent to sidewalls of the capping layer and around portions of the nanowire, forming a hardmask layer on the capping layer and the first spacer, removing an exposed portion of the nanowire to form a first cavity partially defined by the gate material, epitaxially growing a semiconductor material on an exposed cross section of the nanowire in the first cavity, removing the hardmask layer and the capping layer, forming a second capping layer around the semiconductor material epitaxially grown in the first cavity to define a channel region, and forming a source region and a drain region contacting the channel region.

Abstract: a composite dielectric thin film capable of high dielectric constant, low leakage current characteristics, and high dielectric breakdown voltage while being deposited at a room temperature, a capacitor and a field effect transistor (FET) using the same, and their fabrication methods. The composite dielectric thin film is deposited at a room temperature or less than 200° C. and comprises crystalline or amorphous insulating filler uniformly distributed within an amorphous dielectric matrix or within an amorphous and partially nanocrystalline dielectric matrix.

Abstract: To reduce size of a finished product by reducing the number of externally embedded parts, embedding of a Schottky barrier diode relatively large in the amount of current in a semiconductor integrated circuit device has been pursued. It is general practice to densely arrange a number of contact electrodes in a matrix over a Schottky junction region. A sputter etching process to the surface of a silicide layer at the bottom of each contact hole is performed before a barrier metal layer is deposited. However, in a structure in which electrodes are thus arranged over a Schottky junction region, a reverse leakage current in a Schottky barrier diode is varied by variations in the amount of sputter etching. The present invention is a semiconductor integrated circuit device having a Schottky barrier diode in which contact electrodes are arranged over a guard ring in contact with a peripheral isolation region.

Abstract: A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell, wherein the method comprises steps as following: a pad oxide layer and a first hard mask layer are sequentially formed on a substrate. The pad oxide layer and the first hard mask layer are then etched through to form an opening exposing a portion of the substrate. Subsequently, an oxide-nitride-oxide (ONO) structure with a size substantially less than or equal to the opening is formed to coincide with the portion of the substrate exposed from the opening.

Abstract: The apparatus and method for controlling laser cutting through surface plasma monitoring provides real-time monitoring and control of laser cutting quality. Laser cutting of a workpiece is controlled through monitoring of surface plasma generation, particularly during a laser gas-assisted cutting process. The apparatus includes a Langmuir probe positioned adjacent the impingement point of the laser beam on the workpiece. The Langmuir probe is in communication with a signal analyzer for measuring electrical voltage generated by plasma generated by the cutting of the workpiece. A controller is provided for comparing the measured electrical voltage with a desired threshold voltage. Control signals are generated to selectively adjust output power of the laser responsive to the compared measured electrical voltage and the desired threshold voltage to minimize plasma generation.

Abstract: A semiconductor device comprising at least two wiring layers on a substrate or a surface layer of the substrate, wherein a lower wiring layer of the two wiring layers contains silicon, and a silicon carbide layer is placed between the lower wiring layer and an upper wiring layer.

Abstract: A thin film transistor includes nanowires. More specifically, the thin film transistor includes nanowires aligned between and extending to opposite facing lateral surfaces of source/drain electrodes on a substrate. The nanowires extend in a direction parallel to a major surface defining the substrate to form a semiconductor channel layer. Also disclosed herein is a method for fabricating the thin film transistor.

Abstract: An integrated circuit including a hetero-interface and a manufacturing method thereof is disclosed. One embodiment includes forming a hetero-structure including a hetero-interface at a junction between a first region and a second region, and, thereafter introducing a material into the first region and at least up to the hetero-interface, wherein a diffusion constant of the material is higher in the first region than in the second region.

Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.

Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

Abstract: A light-emitting device includes a semiconductor light-emitting stack; a current injected portion formed on the semiconductor light-emitting stack; an extension portion having a first branch radiating from the current injected portion and having a first width, and a first length greater than the first width, and a second branch extending from the first branch and having a second width larger than the first width, and a second length greater than the second width; and an electrical contact structure between the second branch and the semiconductor light-emitting stack.

Abstract: Embodiments of the invention provide for three-terminal pressure sensors (“3-TPS”), a method of measuring a pressure with a 3-TPS, and a method of manufacturing a 3-TPS. In some embodiments, the 3-TPS includes a semiconducting layer with cavity and a 3-TPS element having at least one piezoresistive layer overlapping at least a portion of the cavity and oriented at an angle selected to provide a desired sensitivity for the 3-TPS. The method of measuring a pressure with a 3-TPS is performed with a 3-TPS that includes an input terminal, first and second output terminals, and a 3-TPS element, the 3-TPS element overlapping at least a portion of a cavity at a predetermined angle. The method comprises providing an input signal to the input terminal of the 3-TPS, determining a difference between two output signals from the respective output terminals of the 3-TPS, and correlating the determined difference to a pressure.

Abstract: When forming a micromachined part by water jet guided laser machining at a machine component 20, a point for forming a micromachined part is machined while moving a laser head 7 side and machine component 20 side so as to obtain a desired shape of a micromachined part.

Abstract: An image sensor and a method of manufacturing the same are disclosed. A passivation layer on an interlayer dielectric layer has different thicknesses for neighboring pixels. Consequently, a phase of light incident on a pixel is out of phase with light incident on an adjacent pixel before it reaches a photodiode. As a result, diffraction of the incident light results in destructive interference between the pixels. Thus, cross talk between adjacent pixels can be prevented.

Abstract: Embodiments of the invention describe compact memory arrays. In one embodiment, the memory cell array includes first, second, and third gate lines disposed over a substrate, the second gate lines are disposed between the first and the third gate lines. The first, the second, and the third gate lines form adjacent gate lines of the memory cell array. The memory cell array further includes first metal lines disposed over the first gate lines, the first metal lines coupled to the first gate lines; second metal lines disposed over the second gate lines, the second metal lines coupled to the second gate lines; and third metal lines disposed over the third gate lines, the third metal lines coupled to the third gate lines. The first metal lines, the second metal lines and the third metal lines are disposed in different metallization levels.

Abstract: The present invention provides a process for laser cutting a metal plate that comprises a) providing at least a laser cutting device, b) providing a metal plate to be cut from a metal coil, c) providing at least a holding apparatus holding and maintaining the metal plate, d) cutting said metal plate by means of at least a laser beam delivered by said at least one laser cutting device In this process, during step d), the metal plate is first cut by a first line comprising at least a first cutting machine, into at least one peripheral blank, and at least one peripheral blank is subsequently fed to at least a second line comprising at least a second cutting machine, to be cut into several smaller individual final blanks. With regard to this process, the first line produces peripheral blanks faster than at least one second cutting machine of the second line can cut them into several smaller individual final blanks.