Abstract: An electronic apparatus includes a first die, a second die, a third die, and a fourth die, wherein a portion of the second die and a portion of the third die are movably connected between the first die and the fourth die.

Abstract: The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the side surface of the rectangular chip. The configuration allows the semiconductor device to be provided with the substrate having a reduced size which is achieved by preventing a liquid resin from flowing out.

Abstract: In an ESD device for fast switching applications based on a BSCR or NLDMOS-SCR, an anode junction control electrode is provided by not connecting the anode electrode to the collector of the BSCR or to the drain of the NLDMOS-SCR, and a cathode junction control electrode is provided by forming an additional n+ region in the BSCR or an additional p+ region in the p-well of the NLDMOS-SCR. The triggering voltage of the ESD device is adjusted after a time delay by controlling one or both of the control electrodes using an RC-timer-driver circuit.

Abstract: A power device package according to the one embodiment of the present invention includes an insulating substrate with an interconnection pattern disposed on the insulating substrate. The interconnection pattern comprises a single conductive layer comprising a first metal layer, and a multiple conductive layer comprising another first metal layer and a second metal layer disposed on the another first metal layer. A plurality of wires are attached to an upper surface of the single conductive layer and/or an upper surface of the second metal layer of the multiple conductive layer. Contact pads on a power control semiconductor chip and a low power semiconductor chip driving the power control semiconductor chip are electrically connected to the wires.

Abstract: A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.

Abstract: A semiconductor device is disclosed. The semiconductor device includes an internal circuit having a high breakdown voltage transistor, and a first electrostatic protection circuit in which electrostatic protection elements are connected in series. The sum of the breakdown voltage values of the electrostatic protection elements in the first electrostatic protection circuit is almost equal to the breakdown voltage value of the high breakdown voltage transistor. The first electrostatic protection circuit is connected between an input/output terminal and a ground terminal of the semiconductor device to which terminals the internal circuit is connected.

Abstract: A ball grid array (BGA) package includes a substrate and a chip. A bottom surface of the substrate includes a central area and a marginal area. Several source balls are disposed in the central area. Several ball groups are disposed in the marginal area. Each ball group includes one ground ball and at most three signal balls. The chip is disposed on a top surface of the substrate and electrically connected to the substrate.

Abstract: A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in a digital output format. Depending on the ambient temperature, the resistance of the block of phase change material changes. By measuring a fractional resistance change compared to the resistance of the phase change material at a calibration temperature, the temperature of the region around the phase change material can be accurately measured. A logic decoder and an input/output circuit may be employed between the internal resistance measurement circuit and the input/output pads. A plurality of temperature sensing circuits containing phase change material blocks may be employed in the semiconductor chip to enable an accurate temperature profiling during chip operation.

Abstract: A lead frame made from a metallic thin plate, comprising: at least two stage portions on which a physical quantity sensor chip is mounted, and which have an area smaller than a mounting surface of the physical quantity sensor chip; a rectangular frame portion which encloses the stage portions; a plurality of leads including connecting leads which extend in a direction of the stage portion from the frame portion and are positioned on the periphery of the stage portion, and which connect the frame portion and each of the stage portions; and an easily deformed portion formed on the connecting leads which inclines the stage portion by becoming deformed; and the physical quantity sensor chip is mounted by superimposing the mounting surface on the stage portion and a portion of the plurality of leads in the direction of thickness of the frame portion.

Abstract: An integrated circuit and method are provided for preventing reverse engineering by monitoring light emissions emitted from transistors and such electrically active devices in the integrated circuit. The method prevents, in an integrated circuit, a pattern of light emitted from at least one active device in the integrated circuit from being detected external to the integrated circuit by fading the light emitted from the at least one active device in the integrated circuit and that is emitted external to the integrated circuit. Bright light emission emitted in substantial close proximity to the at least one active device in the integrated circuit, and emitted external to the integrated circuit, fades a pattern of light emission emitted from the at least one active device.

Abstract: A method of manufacturing a semiconductor device includes forming on a lower insulating layer first to third electrically conducting layers sequentially, forming a mask pattern on the third conducting layer, dry-etching the first to third conducting layers with the mask pattern as a mask, thereby dividing the conducting layers, and forming an insulating layer between the adjacent second conducting layers by an HDP-CVD process so that a void is defined so as to be located lower than an interface between the first and second conducting layers and higher than an interface between the second and third conducting layers so as to have a sectional area larger than the second conducting layer. The forming of the insulating layer by the HDP-CVD process includes burying the insulating layer and sputtering to spread a frontage of a buried region buried by the burying process, both burying and sputtering being repeated alternately.

Abstract: A microlens substrate is provided having a plurality of first microlenses and a plurality of second microlenses which are located between the plurality of first microlenses. The second microlenses are smaller than the first microlenses.

Abstract: A radiation-emitting semiconductor chip is specified, comprising a semiconductor body (3) having an n-conducting region (4) and a p-conducting region (5), the semiconductor body having a hole barrier layer containing a material from the material system InyGa1-x-yAlxN.

Abstract: An integrated circuit and method are provided for preventing reverse engineering by monitoring light emissions emitted from transistors and such electrically active devices in the integrated circuit. The method prevents, in an integrated circuit, a pattern of light emitted from at least one active device in the integrated circuit from being detected external to the integrated circuit by reduction of the intensity of light emitted from the at least one active device in the integrated circuit thereby preventing the reduced intensity light emitted from the at least one active device in the integrated circuit from being detected external to the integrated circuit. The intensity of light emitted from the at least one active device in the integrated circuit can be reduced by modification of operational characteristics of the at least one active device during switching transitions.

Abstract: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.

Abstract: The present invention is a through-hole LED light source with capability of emitting a beam angle of less than 75 degrees. The light source presents a three-dimensional lead frame with a well, into which at least one LED is mounted, and an optical housing which serves as a directional lens. Through adjustment of the housing and lead well properties, beam angle is adjusted to any angle. The frame is three-dimensional, preferably cylindrical, with both inner and outer portions, electrically isolated. The inner portion serves as the mounting area for the LEDs (and contains the well) and the LED serves as the electrical conduit between the portions, completing a circuit an illuminating the LED.

Abstract: A semiconductor assembly is provided that includes a first substrate that has a first surface. A second substrate is coupled to and spaced apart from the first substrate. The second substrate has a second surface facing the first surface of the first substrate. The second substrate includes a set of cavities. A set of non-conductive pillars is disposed on and protrudes from the first surface of the first substrate. The set of non-conductive pillars is configured and positioned to engage the set of cavities of the second substrate to align the second substrate with the first substrate.

Abstract: A die-stacked package structure, wherein a plurality of dies are stacked on the substrate with a rotation so that a plurality of metallic ends and the metal pad on each die on the substrate can all be exposed; a plurality of metal wires are provided for electrically connecting the plurality of metal pads on the plurality of dies with the plurality metallic ends on the substrate in one wire bonding process; then an encapsulate is provided for covering the plurality of stacked dies, a plurality of metal wires and the plurality of metallic ends on the substrate.

Abstract: An integrated circuit and method are provided for preventing reverse engineering by monitoring light emissions emitted from transistors and such electrically active devices in the integrated circuit. The method prevents, in an integrated circuit, a pattern of light emitted from at least one active device in the integrated circuit from being detected external to the integrated circuit by randomizing a pattern of light emitted from the at least one active device in an integrated circuit and that is emitted external to the integrated circuit. The pattern of light emitted from the at least one active device in the integrated circuit and that is emitted external to the integrated circuit can be randomized by randomizing a clock signal applied to a clocked circuit comprising the at least one active device in the integrated circuit.

Abstract: Example embodiments are directed to a method of forming a semiconductor structure and a semiconductor structure including a semiconductor unit including a protrusion on a front side of the semiconductor unit and a recess on a backside of the semiconductor unit.