Patents Examined by Lincoln D. Donovan
  • Patent number: 12267059
    Abstract: An acoustic wave device includes a piezoelectric layer that is made of lithium niobate or lithium tantalate, and a plurality of pairs of electrodes opposed to each other in a direction intersecting with a thickness direction of the piezoelectric layer, in which a bulk wave in a thickness shear primary mode is used or d/p is about 0.5 or lower when a thickness of the piezoelectric layer is d and a distance between centers of mutually adjacent electrodes among the plurality of pairs of electrodes is p. The plurality of pairs of electrodes include at least one pair of first electrodes of a first acoustic wave resonator and at least one pair of second electrodes of a second acoustic wave resonator. A direction orthogonal to a longitudinal direction of the second electrodes in the second acoustic wave resonator is inclined at an angle that is greater than 0° and smaller than 360° with respect to a direction orthogonal to a longitudinal direction of the first electrodes in the first acoustic wave resonator.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: April 1, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Syunsuke Kido, Tetsuya Kimura, Sho Nagatomo, Minefumi Ouchi
  • Patent number: 12266843
    Abstract: A waveguide-to-waveguide power combiner/divider including a waveguide including a first opening at a first end of a first section of the waveguide in a first plane and n openings of n sections at n other ends of the waveguide, wherein n is a positive integer. At least one of the n sections is bent in at least one plane different from the plane of first section, and the first section and n sections each have at least two sides that are broader than at least two other sides; and n?1 walls within waveguide configured to divide a height of first section into n heights. Each of n sections has a height equal to one of the n heights, wherein the n?1 walls are located at a junction of the first section and the n sections and extend toward the first opening of the first section.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: April 1, 2025
    Assignee: Raytheon Company
    Inventors: David D. Crouch, David R. Sar, Eachan Russell Landreth
  • Patent number: 12259454
    Abstract: A new method for calibrating slide screw tuners allows straightening the reflection factor phase response (anti-skewing); it uses a new scaling method and a new coordinate system of tuning probe control. The method is agnostic and self-regulating, it treats the tuner as a black box and depends on the test frequency. The method improve mathematical interpolation and tuning results using reduced number of calibration points and allows higher calibration speed.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 25, 2025
    Inventor: Christos Tsironis
  • Patent number: 12261478
    Abstract: A system power supply structure comprising: a power supply source; a plurality of systems each requiring a predetermined functional safety; and a plurality of relays inserted between the power supply source and the plurality of systems, wherein a system requiring the same functional safety among the plurality of systems is connected in parallel to the same relay among the plurality of relays.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: March 25, 2025
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsunori Mori
  • Patent number: 12255654
    Abstract: A slew rate acceleration circuit in a buffer circuit, is configured at least to detect a current flowing through a load stage of the buffer circuit, compare a value of the detected current with a reference value, and supply an adjusting driving voltage to an output stage of the buffer circuit based on results of the comparison for increasing a slew rate of the buffer circuit.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: March 18, 2025
    Assignee: Magnachip Mixed-Signal, Ltd.
    Inventors: Dukmin Lee, Kyeongwoo Kim
  • Patent number: 12253870
    Abstract: A circuit system includes a first voltage regulator circuit that generates a first supply voltage for an integrated circuit die based on a first control signal. The first voltage regulator circuit generates a first feedback signal based on the first supply voltage. The circuit system also includes a second voltage regulator circuit that generates a second supply voltage for an integrated circuit die based on a second control signal. The second voltage regulator circuit generates a second feedback signal based on the second supply voltage. The circuit system also includes a third voltage regulator circuit that generates the first control signal based on the first feedback signal and the second control signal based on the second feedback signal. The circuit system may include fully integrated, on-board, and on-package voltage regulator circuits.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: March 18, 2025
    Assignee: Altera Corporation
    Inventors: Archanna Srinivasan, Ravi Gutala, Scott Weber, Aravind Dasu, Mahesh Iyer, Eriko Nurvitadhi
  • Patent number: 12255655
    Abstract: A clock monitor circuit detects departures from expected values for clock period, clock high time duration, or clock low time duration. A delay line of the clock monitor circuit is composed of delay portions of delay cells. Each delay cell also has a comparator portion with logic to compare aspects of the monitored clock signal to corresponding expected values, and to output a failure detection signal indicating whether the expected values are met. Expected values may be read from a fuse set. The delay of the delay line may be programmatically adjusted. The clock monitor circuit may be combined with a circuit that detects narrow glitches in the monitored clock signal. Devices and systems with one or more monitored clock signals, and methods of clock signal monitoring, are also described.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 18, 2025
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Alan Scott Fiedler
  • Patent number: 12255436
    Abstract: A driver electronic circuit for a pulse amplitude modulation transmitter includes a plurality of transmission lanes. Each transmission lane is configured to independently generate a current output corresponding to data input into each transmission lanes. The driver electronic circuit also includes a summing node configured to sum the output currents from the plurality of transmission lanes. The driver electronic circuit further includes one feedback loop circuit coupled to the plurality of transmission lanes configured to control the currents of each said current outputs. The driver electronic circuit may be configured to drive a vertical-cavity surface-emitting laser for optical communication.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: March 18, 2025
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Eric Iozsef, Dario Soltesz
  • Patent number: 12255649
    Abstract: Methods and devices for reading and programming a state of a switch device are presented. The programming of the state of the switch device is performed by providing driving pulses to the switch device. The amplitude and the width of the driving pulses are a function of one or more of a) temperature of the switch device, b) desired state of the switch device, and c) operational time of the switch device. The described devices include a device to store the data demonstrating the functional relation between the amplitude and the width of the driving pulses and the temperature of the switch device. Such device can be a lookup table or an arithmetic logic unit (ALU). The disclosed switch devices can be PCM switches.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: March 18, 2025
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Jeffrey A. Dykstra, Rodd E. Novak
  • Patent number: 12249749
    Abstract: A directional coupler includes a primary transmission line electrically coupled in series between an input port and an output port of the coupler, and an asymmetric, meander-shaped, secondary transmission line, which is electrically coupled in series between a coupling port and an isolation port of the coupler. The secondary transmission line includes a first coupling segment, which is reactively coupled to a first portion of the primary transmission line, and a second coupling segment, which is reactively coupled to a second portion of the primary transmission line, and is spaced closer to, or farther from, the primary transmission line relative to the first coupling segment, such that an asymmetry in reactive coupling is present between the first and second portions of the primary transmission line and the secondary transmission line. An intermediate segment is provided, which is electrically coupled in series between the first and second coupling segments.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: March 11, 2025
    Assignee: Outdoor Wireless Networks LLC
    Inventors: Huan Wang, Jin Jiang, Qiaozhi Chen, XiaoHua Hou
  • Patent number: 12249832
    Abstract: A power converter includes: an input unit configured to be electrically connected to a device; a voltage charge unit configured to change voltage; a voltage adjustment unit configured to adjust the voltage supplied to a transmission line; a target setting unit configured to set a first target value of the voltage change unit; a voltage monitoring unit configured to observe the voltage of the transmission line; and a threshold determination mechanism configured to calculate a second target value of the voltage adjustment unit in accordance with voltage of the transmission line. The target setting unit of the power converter is configured to generate the first target value as an output target of the voltage charge unit in accordance with the voltage observed by the voltage monitoring unit. The first target value has characteristics to change a threshold voltage for controlling output of the voltage adjustment unit depending on time.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: March 11, 2025
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masahiro Rikiso, Asuka Abe
  • Patent number: 12244154
    Abstract: A charger includes a power receiving unit, a power storage unit, and a power transmission unit. The power receiving unit is configured to receive, through wireless power supply via radio waves, power transmitted from a power transmitting device disposed in a vehicle. The power storage unit is configured to be supplied and charged with the power received by the power receiving unit. The power transmission unit is configured to transmit, through wireless power supply via electromagnetic induction, the power stored in the power storage unit to an electrical device that is to be charged.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: March 4, 2025
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Teppei Abe, Shinichiro Fuki, Tomokazu Sakai, Shigeo Takeda, Yuki Tokuyama
  • Patent number: 12244048
    Abstract: Methods and apparatus for providing a frequency selective limiters (FSL) having a free-standing Yttrium Iron Garnet (YIG) film with first and second opposing surfaces. A metal plane is disposed on one surface of the YIG film to provide the YIG film with a metalized surface. At least one transducer is disposed on the other surface of the YIG film with a respective ends coupled to the metalized surface of the YIG film.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 4, 2025
    Assignee: Metamagnetics Inc.
    Inventor: Michael Geiler
  • Patent number: 12244287
    Abstract: A filter device includes an unbalanced terminal, balanced terminals, and first and second resonant circuits. The first resonant circuit is connected to the unbalanced terminal. The second resonant circuit is connected to the balanced terminals and electromagnetically coupled with the first resonant circuit. The first resonant circuit includes a resonator in which an inductor and a capacitor are connected in parallel between the unbalanced terminal and a reference potential. The second resonant circuit includes a resonator including an inductor connected between the balanced terminals and capacitors connected in series between the balanced terminals.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: March 4, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takuya Sato, Masahiro Teramoto, Keisuke Ogawa
  • Patent number: 12233794
    Abstract: Responsive to a magnitude of current associated with power from a vehicle being supplied to upfitter loads approaching a predefined threshold, a controller discontinues supply of power to vehicle loads according to a user defined priority order of the vehicle loads such that the vehicle loads of lowest priority among the priority order of the vehicle loads are sequentially shed to maintain the magnitude less than the predefined threshold.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: February 25, 2025
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Stuart C. Salter, Anthony Gerald King, Kevin Thomas Hille, David Celinske, John Anthony DeMarco, Todd Ansbacher
  • Patent number: 12237837
    Abstract: A signal generation apparatus includes a glitch rejection circuit including n m-stage inverters coupled in series, and configured to receive an input signal and perform an inverting operation on the input signal, based on a plurality of voltage signals, to generate an output signal and adjust switching threshold voltages of the m-stage inverters, based on the plurality of voltage signals, to generate the glitch-removed output signal, when a glitch occurs in the input signal, a level detection circuit to detect a logic level of the output signal provided from the glitch rejection circuit to generate a level detection signal and a complementary level detection signal, and a voltage signal generation circuit configured to receive the input signal, a complementary input signal, the level detection signal, and the complementary level detection signal to generate the plurality of voltage signals and provide the plurality of voltage signals to the glitch rejection circuit.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: February 25, 2025
    Assignee: SK hynix Inc.
    Inventors: Jaehyeong Hong, Junseo Jang, In Seok Kong, Soon Sung An, Dae Ho Yang, Kwan Su Shon, Yo Han Jeong
  • Patent number: 12237672
    Abstract: A control system may include a direct-current (DC) power bus for charging (e.g., trickle charging) internal energy storage elements in control devices of the control system. For example, the control devices may be motorized window treatments configured to adjust a position of a covering material to control the amount of daylight entering a space. The system may include a DC power supply that may generate a DC voltage on the DC power bus. For example, the DC power bus may extend from the DC power supply around the perimeter of a floor of the building and may be connected to all of the motorized window treatments on the floor (e.g., in a daisy-chain configuration). Wiring the DC power bus in such a manner may dramatically reduce the installation labor and wiring costs of an installation, as well as decreasing the chance of a miswire.
    Type: Grant
    Filed: December 18, 2023
    Date of Patent: February 25, 2025
    Assignee: Lutron Technology Company LLC
    Inventors: Edward J. Blair, John H. Bull, Samuel F. Chambers, Stuart W. DeJonge, Joseph R. Parks
  • Patent number: 12237710
    Abstract: A method of charging an energy storage element; wherein the energy storage element comprises a plurality of energy storage units arranged for storing electrical energy; wherein the method comprises: determining a voltage of each of the plurality of energy storage units; determining a state-of-the-charge, SoC, of each of the plurality of energy storage units; determining a maximum power voltage, Vmp, of a solar power source; selecting (one or more) energy storage units of the plurality of energy storage units to form a charging set comprising a series and/or a parallel combination of the selected (one or more) energy storage units; wherein the selection is based on the determined maximum power voltage, Vmp, and on a first time period and a second time period associated with a first sun irradiance level and a second sun irradiance level respectively.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: February 25, 2025
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Sumit Dalal, Manoj Kumar, Mukesh Kumar, Debasish Mukherjee
  • Patent number: 12230967
    Abstract: A method for energy management in a mobile medical unit, including: using a microgrid assessment tool to capture both granular load profiles and power quality data for a mobile medical unit powered by a microgrid; modeling a plurality of scenarios, using the data captured by the microgrid assessment tool to determine hybrid power system optimization; and supplying power to the mobile medical unit from one or more of a plurality of energy sources in the hybrid microgrid based on the optimization results. The plurality of energy sources includes at least one renewable energy source and at least one non-renewable energy source. A mobile medical system that includes a mobile medical unit and a hybrid microgrid configured to provide power to the mobile medical unit. The hybrid microgrid includes a measurement, verification, and control module, at least one renewable energy source, at least one energy storage device, and a generator.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: February 18, 2025
    Inventors: Kevon R. Makell, Brian Johnson, David R. Ellis, Myron Williams
  • Patent number: 12228670
    Abstract: A communication unit includes a plurality of cascaded devices that include at least one master device and at least one slave device configured in a master-slave arrangement. The at least one master device and at least one slave device each include: a demodulator circuit configured to receive a distributed reference clock signal and re-create a system clock signal therefrom; a clock generation circuit that includes an internally-generated reference phase locked loop configured to receive the re-created system clock signal to create a master-slave clock signal; and an analog-to-digital converter, ADC, coupled to the reference phase locked loop and configured to use a same master-slave clock signal to align respective sampling instants between each ADC of the at least one master device and at least one slave device.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: February 18, 2025
    Assignee: NXP USA, Inc.
    Inventors: Olivier Doaré, Didier Salle, Cristian Pavao Moreira, Julien Orlando, Jean-Stephane Vigier, Andres Barrilado Gonzalez