Patents Examined by Marc Duncan
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Patent number: 12386689Abstract: In some implementations, a memory device may detect a first read failure associated with a page type and a memory section of the memory device. The memory device may perform multiple read recovery operations in a first order defined by a first sequence of read recovery operations. The memory device may identify a read recovery operation that results in successful recovery from the first read failure. The memory device may reorder the first sequence of read recovery operations to generate a second sequence of read recovery operations that prioritizes the read recovery operation. The memory device may detect a second read failure associated with the page type and the memory section. The memory device may perform one or more read recovery operations to recover from the second read failure in a second order defined by the second sequence of read recovery operations.Type: GrantFiled: March 21, 2024Date of Patent: August 12, 2025Assignee: Micron Technology, Inc.Inventors: Naveen Bolisetty, Tingjun Xie
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Patent number: 12373132Abstract: Methods, systems, and devices for techniques for detecting a state of a bus are described. A memory device may receive an access command transmitted to the memory device via a bus. The memory device may transmit data requested by the access command over data lines and a control signal that indicates the bus is in an active state over a control line. The control signal may be transmitted during a first unit interval of a read operation. The control signal may be configured to have a first voltage when the bus is in an idle state and a second voltage when the bus is in the active state. The control line may be configured to have or trend toward the first voltage when the bus is in the idle state.Type: GrantFiled: April 19, 2024Date of Patent: July 29, 2025Assignee: Micron Technology, Inc.Inventor: Scott E. Schaefer
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Patent number: 12360871Abstract: A device may generate a link training and status state machine (LTSSM) test configuration that includes states and paths connecting the states, and may provide the LTSSM test configuration for tracing through by a device under test. The device may receive results associated with tracing through of the LTSSM test configuration by the device under test, and may modify, based on the results, one of the paths of the LTSSM test configuration to include a different one of the states and to generate a modified LTSSM test configuration. The device may provide the modified LTSSM test configuration for tracing through by the device under test.Type: GrantFiled: December 14, 2023Date of Patent: July 15, 2025Assignee: VIAVI Solutions Inc.Inventors: Tarik Rostum, Marc Werz
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Patent number: 12360874Abstract: Described embodiments include methods and systems for managing client-side services. An intermediary may receive metadata from a first client device of the plurality of client devices. The metadata can include runtime characteristics of a first instance of a service that is incorporated into a client-side application or a web application. The first instance may execute on the first client device and request service data from the at least one server. The intermediary can detect an anomaly in the operation of the first instance of the service. The intermediary can identify an operation of the first instance of the service causing the detected anomaly. The intermediary can, responsive to the detected anomaly, cause delay, removal or modification of operations corresponding to the identified operation, in other instances of the service executing on the plurality of client devices.Type: GrantFiled: December 2, 2021Date of Patent: July 15, 2025Assignee: Yottaa, Inc.Inventor: Robert Buffone
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Patent number: 12353304Abstract: A solid-state disk access control method and apparatus, a computer device, and a storage medium are provided. The method includes: detecting controller nodes connected to a Peripheral Component Interconnect Express (PCIe) switch and Non-Volatile Memory Express (NVMe) solid-state disks connected to the PCIe switch; setting a first mapping connection relationship to be formed between each NVMe solid-state disk and one of the controller nodes, and setting second mapping connection relationships to be formed between each NVMe solid-state disk and the remaining controller nodes; and under a condition that any NVMe solid-state disk is accessed, in response to a determination that the first mapping connection relationship is abnormal, selecting one of the remaining controller nodes as a standby controller of the accessed NVMe solid-state disk, and modifying the second mapping connection relationship between the standby controller and the accessed NVMe solid-state disk to the first mapping connection relationship.Type: GrantFiled: December 16, 2024Date of Patent: July 8, 2025Assignee: Suzhou MetaBrain Intelligent Technology Co., Ltd.Inventors: Yunwu Peng, Yu Zou, Bo Jiang
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Patent number: 12346217Abstract: A conflict resolution component uses data change measure to resolve conflicts when data assets with the same priority tags arrive simultaneously for protection processing. The data change measure quantifies the extent of modifications or updates made to the asset since a last backup. Assets with a higher data change measure are assigned a higher priority and processed ahead of others with the same priority tag. This reprioritization ensures that backup objects with more significant data changes are handled first. Such a system overcomes the issues associated with present methods backup queueing methods including random scheduling of data having the same priority tags or classifications.Type: GrantFiled: July 16, 2023Date of Patent: July 1, 2025Assignee: Dell Products L.P.Inventors: Mahesh Reddy Av, Avinash Kumar, Terry O'Callaghan
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Patent number: 12346195Abstract: A method comprising: detecting an event that is indicative of an error that has occurred in a first computing system; identifying a subsystem and an object that are associated with the event; identifying one or more log files that are associated with the subsystem and object; generating a first event report that is associated with the event, the first event report including the one or more log files, the first event report identifying the subsystem and the object that are associated with the event; identifying a support team that is associated with the event based on the object and subsystem; and routing the first event report to the support team.Type: GrantFiled: September 15, 2023Date of Patent: July 1, 2025Assignee: Dell Products L.P.Inventors: Kumaravel Palanisamy, Rashmi Shashidhar, Kiran Kumar Grandhi, Vijay Srinivasan
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Patent number: 12332744Abstract: In some aspects, a method may include identifying, by one or more processors, a presence of an error in a plurality of data storage units in a range of data storage units of an error bitmap of a redundant array of independent disks (RAID). The method may include generating, by the one or more processors, a parity RAID request format (PRRQ) frame, the PRRQ frame identifying the range of data storage units, where at least one data storage unit has an error, the range of data storage units identified at least in the plurality of data storage units. The method may include communicating, by the one or more processors, the PRRQ frame to a controller, the controller is configured, responsive to the PRRQ frame, to recover the data in the range of data storage units in the plurality of data storage units.Type: GrantFiled: September 22, 2023Date of Patent: June 17, 2025Assignee: Avago Technologies International Sales Pte. LimitedInventor: Sumalatha Kori
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Patent number: 12326780Abstract: Methods of boot process monitoring include receiving, by a service processor, a notice that a boot process for a server has started, monitoring a video buffer of a console of the server, and identifying, based on the monitoring, a potential error in the boot process.Type: GrantFiled: June 8, 2023Date of Patent: June 10, 2025Assignee: LENOVO GLOBAL TECHNOLOGY (UNITED STATES) INC.Inventors: Caihong Zhang, Fred Allison Bower, III
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Patent number: 12326776Abstract: A computing platform may be installed with software technology for creating and executing user-defined anomaly detection rules that configures the computing platform to: (1) receive, from a client device, data defining a given anomaly detection rule that has been created by a user, wherein the given anomaly detection rule comprises at least one anomaly condition that is to be applied to at least one streaming event queue, (2) store a data representation of the given anomaly detection rule in a data store, (3) convert the data representation of the given anomaly detection rule to a streaming query statement, (4) iteratively apply the streaming query statement to the at least one streaming event queue, and (5) while iteratively applying the streaming query statement, make at least one determination that the at least one anomaly condition is satisfied and then cause at least one anomaly notification to be issued to the user.Type: GrantFiled: January 29, 2024Date of Patent: June 10, 2025Assignee: Discover Financial ServicesInventors: Dhineshkumar Pachamuthu, Abdul Nafeez Mohammad, Vivek Mathew, Sara Bonefas, Brendan Sturm
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Patent number: 12326795Abstract: A machine learning module is trained by receiving inputs comprising attributes of a computing environment, where the attributes affect a likelihood of failure in the computing environment. In response to an event occurring in the computing environment, a risk score that indicates a predicted likelihood of failure in the computing environment is generated via forward propagation through a plurality of layers of the machine learning module. A margin of error is calculated based on comparing the generated risk score to an expected risk score, where the expected risk score indicates an expected likelihood of failure in the computing environment corresponding to the event. An adjustment is made of weights of links that interconnect nodes of the plurality of layers via back propagation to reduce the margin of error, to improve the predicted likelihood of failure in the computing environment.Type: GrantFiled: November 15, 2021Date of Patent: June 10, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James E. Olson, Micah Robison, Matthew G. Borlick, Lokesh M. Gupta, Richard P. Oubre, Jr., Usman Ahmed, Richard H. Hopkins
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Patent number: 12327035Abstract: Technologies for memory mirroring across an interconnect are disclosed. In the illustrative embodiment, a primary memory agent that controls a single memory channel can implement memory mirroring by sending mirrored memory operations to a secondary memory agent over an interconnect. In the illustrative embodiment, the secondary memory agent may not be aware that it is performing mirrored memory operations. The primary memory agent may handle error recovery, scrubbing, and failover to the secondary memory agent.Type: GrantFiled: September 24, 2021Date of Patent: June 10, 2025Assignee: Intel CorporationInventors: Nishant Singh, Daniel W. Liu, Sharada Venkateswaran
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Patent number: 12314156Abstract: A system automatically generates resiliency tests to detect the resiliency of an application implemented over multiple machines. In operation, one or more services operating on a plurality of machines is automatically identified. Fault targets are then automatically created based on the identified one or more services. The generation of the fault targets may be based on the identified services, user input, or past performance of the plurality of machines. Experiments may then be conducted, based on the created targets, on the one or more services. The experiments may insert faults into resources associated with the services. The resources may include CPU resources, memory, networking resources, and APIs. A resiliency score may be generated based on the experiments.Type: GrantFiled: August 30, 2023Date of Patent: May 27, 2025Assignee: Harness Inc.Inventors: Umasankar Mukkara, Karthik Satchitanand, Harish Doddala
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Patent number: 12314120Abstract: Methods and systems for managing data processing systems based on indications of a failure are disclosed. A data processing system may include and depend on the operation of hardware and/or software components. To manage the operation of the data processing system, a data processing system manager may obtain logs for components of the data processing system that reflect the historical and/or current operation of these components. Inference models may be implemented to predict future system infrastructure issues (e.g., future component failures) using information recorded in the logs. The inference models may also predict times-to-failures associated with the future failures by assigning attribution scores to portions of logs. Further analysis of attribution scores may be performed to generate health scores for the data processing system, providing additional information for the determination of remedial actions that may reduce the likelihood of the data processing system becoming impaired.Type: GrantFiled: January 30, 2023Date of Patent: May 27, 2025Assignee: Dell Products L.P.Inventors: Dale Wang, Min Gong, Ashok Narayanan Potti
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Patent number: 12277042Abstract: Embodiments relate to determining legal positions as candidate positions for inserting a memory device in memory devices and determining a namespace range migration cost for the candidate positions based on a balanced state for a namespace range distributed across the memory devices. An insertion position to insert the memory device in the memory devices is selectable from the candidate positions. A given candidate position is selected with a minimum namespace range migration cost corresponding to a requirement to transfer data between the memory devices to result in the balanced state for the namespace range across the memory devices. The given candidate position is the insertion position to insert the memory device in the memory devices. Responsive to inserting the memory device at the insertion position in the memory devices, a transfer occurs of the data in the memory devices in accordance with the insertion position of the memory device.Type: GrantFiled: October 19, 2023Date of Patent: April 15, 2025Assignee: International Business Machines CorporationInventor: Huiying Xu
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Patent number: 12272164Abstract: A method for performing automated GUI-driven OpROM validation starts with a processor executing an automated test script; and in response to executing the automated test script, the processor is caused to remotely accessing a memory sub-system using a web driver and an interface. The processor causes a BIOS terminal window of the memory sub-system to be displayed on a display screen. The processor captures a screenshot of the BIOS terminal window and generating an image based on the screenshot. The processor converts the image to text using OCR and generates an output comprising BIOS configuration details based on the text using a machine-learning algorithm. The processor then analyzes the output to validate the memory sub-system when no errors are detected in the output or to flag the memory sub-system when errors are detected in the output. Other embodiments are described herein.Type: GrantFiled: August 17, 2023Date of Patent: April 8, 2025Assignee: Micron Technology, Inc.Inventors: Shiva Pahwa, Harsha Vardhana Gonchigara Vemanna, Sathyashankara Bhat Muguli
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Patent number: 12259799Abstract: Disclosed are various embodiments for identifying fault injection impact zones. A test for an application can be received from a test service. An application schema can then be created that represents the systems or services that are involved in the execution of the application. Applications with a similar application schema are then identified using a first machine-learning model. A subset of the plurality of applications that have experienced a similar test are then identified with a second machine-learning model. Log files associated with each of the subset of applications are then analyzed to identify errors that occurred during the similar test. Each of the identified errors are then provided to the test service in response to receipt of the test.Type: GrantFiled: March 27, 2023Date of Patent: March 25, 2025Assignee: Amazon Technologies, Inc.Inventors: Adrian John Hornsby, Laura Wingert Thomson, Warren Robert Russell, Alan O'Leary, Serafin Antonio Sedano Arenas
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Patent number: 12253926Abstract: Methods and systems for performing efficient integration tests on mobile device for contactless data transfers are described. Rather than performing contactless communications with a variety of test user devices (e.g., test smart cards), which may be time consuming and may present physical difficulty, a mobile device can simulate the result of these communications using a simulator application operating on the mobile device. A contactless communication application, also operating on the mobile device, can communicate with the simulator application in order to generate interaction payloads based on stored data records corresponding to the test user devices. These interaction payloads can then be transmitted by the mobile device to a processing computer. Later, the mobile device may receive a response from the processing computer or another computer system, indicating if the interaction payloads were successfully received and interpreted. This in turn may indicate if the integration test was successful.Type: GrantFiled: December 17, 2021Date of Patent: March 18, 2025Assignee: Visa International Service AssociationInventors: Yuexi Chen, Marc Kekicheff, Christian Aabye, Alexandre Pierre
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Patent number: 12248373Abstract: A data storage device and method for enhanced recovery through data storage device discrete-component-hardware-reset are provided. In one embodiment, the data storage device determines that a subset of a plurality of memory dies is non-responsive, sends a request to a host to accept longer delays associated with the subset of the plurality of memory dies, power-cycles the subset of the plurality of memory dies, and then informs the host that the latency associated with those dies has been restored to normal latency or that the subset of the plurality of memory dies are inactive (in case of unsuccessful recovery). Other embodiments are possible, and each of the embodiments can be used alone or together in combination.Type: GrantFiled: July 18, 2023Date of Patent: March 11, 2025Assignee: Sandisk Technologies, Inc.Inventors: Karin Inbar, Avichay Hodes, Alexander Bazarsky
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Patent number: 12242335Abstract: A fault indication from a fault source is to be provided to a demultiplexer which is configured to output the fault indication. The demultiplexer is configurable to output the fault indication to an OR gate of a plurality of OR gates coupled to a respective fault channel of a plurality of fault channels based on an application which uses the fault source as a resource. A reaction to the fault indication is performed based on the fault channel which received the fault indication.Type: GrantFiled: June 15, 2023Date of Patent: March 4, 2025Assignee: NXP B.V.Inventors: Aarul Jain, Hemant Nautiyal, Ashu Gupta