Patents Examined by Marc Duncan
  • Patent number: 10417072
    Abstract: Techniques to detect backup-related anomalies are disclosed. In various embodiments, a processor is used to generate based at least in part on backup log data associated with a training period a predictive model. The predictive model is to detect, using the processor, anomalies in corresponding backup log data associated with a detection period.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 17, 2019
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Chunsheng Fang, Derek Lin
  • Patent number: 10409664
    Abstract: A method, a computer system, and a computer program product for clustering operational parameter values in a micro-service architecture used in a computing infrastructure. The computer system measures a plurality of operational parameter values of elements of the computing infrastructure and logs identifiers for elements having caused a problem situation and related problem resolution times. The computer system clusters the operational parameter values of the elements having caused the problem situation, according to a correlation function. The computer system orders the operational parameter values within a cluster and the elements having caused the problem situation. The computer system periodically performs the clustering and the ordering such that a sequence of the operational parameter values and the elements having caused the problem situation is indicative of a resolution time required for a new problem situation.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: September 10, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bartlomiej Malecki, Piotr Padkowski, Marek Peszt, Piotr Józef Walczak
  • Patent number: 10409742
    Abstract: Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, an integrated circuit (IC) memory component is disclosed that includes a memory core, a primary interface, and a secondary interface. The primary interface includes data input/output (I/O) circuitry and control/address (C/A) input circuitry, and accesses the memory core during a normal mode of operation. The secondary interface accesses the memory core during a fault mode of operation.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: September 10, 2019
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Kenneth L. Wright
  • Patent number: 10409667
    Abstract: An online system identifies an assignment for a computer program error indicated in an error message by applying an assignment model to token sequences identified in the error message. The error message includes a sequence of execution paths of the computer program. Each execution path indicates a function call active in computer memory when the error was generated. In other words, the error message allows tracking of the sequence of nested paths up to the point where the error was generated. In one example, the error message is a stack trace message that reports active stack frames in computer memory during the execution of the program.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: September 10, 2019
    Assignee: salesforce.com, inc.
    Inventors: J. Justin Donaldson, Hormoz Tarevern, Sadiya Hameed, Siddharth Srivastava, Feifei Jiang
  • Patent number: 10402090
    Abstract: A system and method for providing data protection services and lifecycle management in a Platform as a Service (PaaS) platform having cloud-based applications and data, by discovering an application installed on the PaaS platform using mechanisms native to the PaaS platform, associating the application and an associated data service used by the application to identify data created by the application, and performing a backup/restore operation on the application and the identified data in accordance with a defined schedule. The native mechanisms may comprise application programming interfaces (APIs) provided by the PaaS platform, or metadata associated with containers used by the PaaS platform. The schedule may be defined by RTO and RPO requirements of a user.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: September 3, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Ynn-Pyng Tsaur, Sameer Lokray, Biju Pillai, Xiaoqiong Wu, Peng Liu
  • Patent number: 10402291
    Abstract: A checking device for a data preparation unit, including a preparation element for preparing sensor data for a data transmission; and a comparator for comparing the sensor data with the prepared sensor data; a fault of the data preparation unit being detected in the event that the prepared sensor data do not match the sensor data.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: September 3, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Matthias Kalisch, Ali Abbas Husaini, Christian Pfahler
  • Patent number: 10387272
    Abstract: Provided are a computer program product, system, and method for restoring tracks in cache. A restore operation is initiated to restore a track in the cache from a non-volatile storage to which tracks in the cache are backed-up. The non-volatile storage includes a current version of the track and wherein a previous version of the track subject to the restore operation is stored in a first location in the cache. A second location in the cache is allocated for the current version of the track to restore from the non-volatile storage. The data for the current version of the track is transferred from the non-volatile storage to the second location in the cache. Data for the track is merged from the second location into the first location in the cache to complete restoring to the current version of the track in the first location from the non-volatile storage.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: August 20, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta
  • Patent number: 10372558
    Abstract: An operating method of a storage device that includes a nonvolatile memory device and a controller configured to control the nonvolatile memory device, the method including: detecting, by the controller, a fault of the nonvolatile memory device or the controller, notifying, by the controller, a host device of the fault, notifying, by the controller, the host device of one or more recovery schemes for recovering the fault, and recovering, by the controller, the fault in response to a recovery scheme selected by the host device.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hyung Park, HyunJung Shin, Isaac Baek, Jeonguk Kang, Minseok Ko
  • Patent number: 10372584
    Abstract: While the effectiveness of a model inspection method as a means for detecting software defects is known, large-scale software cannot be handled due to great amounts of calculation required for inspection. According to the present invention, after a model inspection problem of software is attributed to be a satisfiability determination problem, the problem is converted to a type that can be solved by a solver used for solving a notification optimization problem having constrained conditions, and the satisfiability is determined in a numerically analytical manner.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: August 6, 2019
    Assignee: HITACHI, LTD.
    Inventor: Masataka Nishi
  • Patent number: 10372570
    Abstract: Embodiments include a method of a test system that comprises a host device and at least one storage device having multiple ports connected to the host device through a multi-port connection, the method comprising: issuing, by a test program at the host device, a first command; generating, by a device driver at the host device, a plurality of second commands in response to the first command; and simultaneously transferring, by the host device, the second commands to each of the at least one storage device.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: KyuYeul Wang
  • Patent number: 10365959
    Abstract: A computer-implemented method for providing crash results for a computer system on a graphical user interface is disclosed. A component access control feature is displayed on a graphic user interface. The component access control feature enables a user to select a component and view crash results pertaining to the component. A graphical representation for display on the graphic user interface is generated. The graphical representation includes at least a portion of a signature back trace corresponding to a crash associated with the component.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: July 30, 2019
    Assignee: VMware, Inc.
    Inventors: Sowgandh Sunil Gadi, Ayoob Khan, Travis Finch, Kali Gaddam
  • Patent number: 10365983
    Abstract: A technique for managing RAID (Redundant Array of Independent Disks) storage includes maintaining active-stripe metadata that stores, for each of multiple stripes that have been written by a RAID system, an entry that identifies the stripe and identifies a respective configuration plan in effect a last time the stripe was written. In response to a disk drive failure, the technique further includes generating a set of new plans that specify disk drive elements to be used in place of damaged ones and performing a selective repair operation. The selective repair operation iterates over a set of entries in the active-stripe metadata, performs a comparison between the identified plan for each stripe and a current plan implemented by the RAID system for writing to that stripe, and repairs the stripe when the identified plan and the current plan are different.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: July 30, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Robert P. Foley, Peter Puhov
  • Patent number: 10360112
    Abstract: Consistency groups are asynchronously copied to a remote computational device, from a local computational device, wherein point in time copy operations are performed at the local computational device while the consistency groups are being asynchronously copied to the remote computational device. Indicators are stored at the remote computational device to identify those point in time copy operations that are to be restored as part of a recovery operation performed at the remote computational device in response to a failure of the local computational device.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: July 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Theresa M. Brown, Nicolas M. Clayton, Nedlaya Y. Francisco, Theodore T. Harris, Jr., Kevin Lin, Gregory E. McBride, Carol S. Mellgren, Raul E. Saba, Matthew Sanchez
  • Patent number: 10356203
    Abstract: In an embodiment of the present invention, a method receives, at a first node of multiple nodes, each node connected to a common network bus, a health message from a second node. The health message includes a log of health messages from other nodes. Each node sends health messages at a frequency known to the plurality of nodes. The method further compares, at the first node, the log of messages from other nodes in the received health message to a log of health messages previously received from other nodes stored by the first node. Based on the comparison, determining a health status of each node. Using embodiments of the present method and system, computing units can form dynamic fault-tolerant groups.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: July 16, 2019
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventor: Samuel Beilin
  • Patent number: 10353613
    Abstract: When mounting hardware which is coupled to another portion by a plurality of paths with different applications, despite the hardware being a single device, and a failure occurs in any of the paths, there is a risk that the failure may propagate to other components unless the other paths are also blocked. In order to solve the problem described above, in a storage apparatus to which a device coupled by a plurality of coupling paths with different applications can be mounted, the present invention determines a block range at the time of an occurrence of a failure to be a device and a plurality of coupling paths coupled to the device, manages the block range, and upon an occurrence of a failure, executes failure handling which involves blocking an appropriate block range determined in advance by referring to the information.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: July 16, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Araki, Yusuke Nonaka, Masanori Takada, Naoya Okada
  • Patent number: 10346242
    Abstract: The invention relates to a time-controlled distribution unit (30, 31) for the distribution of messages in a distributed computer system for safety-critical applications. Said distribution unit is designed as a self-testing functional unit and comprises input channels (201 . . . 222) for receiving time-controlled periodic input messages from node computers (20, 21, 22) upstream in the data flow, and output channels (301 . . . 333) for transmitting time-controlled periodic output messages to the node computers (50, 51, 52) downstream in the data flow, a computer (40) being provided in the distribution unit and being designed to analyze, by means of a “simple” software, useful information contained in the input messages, and to decide whether output messages are output and, if so, which useful information is contained in the output messages.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: July 9, 2019
    Assignee: TTTech Computertechnik AG
    Inventors: Stefan Poledna, Hermann Kopetz
  • Patent number: 10346270
    Abstract: A method for high-availability operation is provided. The method includes communicating state information from each of a plurality of network elements to at least a first master network controller. The method includes communicating transformed state information from the first master network controller to the plurality of network elements and to each of a plurality of follower network controllers. The method includes continuing the high-availability operation with a new master network controller selected from among the plurality of follower network controllers as a failover, using the transformed state information in the new master network controller and in the plurality of network elements, responsive to a failure of the first master network controller. A network controller system is also provided.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 9, 2019
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Justin Costa-Roberts, Karthik Subraveti, Thejesh Panchappa, Gagandeep Arneja, Andre Pech
  • Patent number: 10346238
    Abstract: Embodiments of the present disclosure provide a method, a computer program product and an apparatus for determining a failure location in a storage system by obtaining performance information of a disk; in response to the performance information indicating that at least one or more performance indices exceed a corresponding predetermined threshold, determining whether a health condition of the disk is normal based on at least one or more performance indices; and in response to determining that the health condition of the disk is normal, determining a failure location based on the health condition information of at least one or more elements in a communication path of the disk, and it may be diagnosed whether a failure occurs to the disk per se or in its communication path, and before a potential failure occurs to the disk, it may also predict the failure thereby preventing data loss.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: July 9, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Man Lv, Chris Zirui Liu, Colin Yong Zou
  • Patent number: 10346239
    Abstract: A system is described wherein power degradation can be used in conjunction with predictive failure analysis in order to accurately determine when a hardware component might fail. In one example, printed circuit boards (PCBs) can unexpectedly malfunction due to a variety of reasons including silicon power variation or air mover speed. Other hardware components can include silicon or an integrated circuit. In order to accurately monitor the hardware component, telemetry is used to automatically receive communications regarding measurements of data associated with the hardware component, such as power-related data or temperature data. The different temperature data can include junction temperature or ambient air temperature to determine an expected power usage. The actual power usage is then compared to the expected power usage to determine whether the hardware component can soon fail.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: July 9, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Felipe Enrique Ortega Gutierrez, Gavin Akira Ebisuzaki, Christopher James BeSerra
  • Patent number: 10331547
    Abstract: The present disclosure relates to a method for reusing a debugging workspace in an electronic design environment. Embodiments may include performing, using a processor, a verification of an electronic design and identifying at least one triggered property associated with the electronic design. Embodiments may further include identifying at least one fan-in signal associated with the at least one triggered property of the electronic design. Embodiments may also include determining a start point debug location based upon, at least in part, the at least one fan-in signal, wherein the start point debug location includes at least one of signal information, cycle information, and event time information. Embodiments may further include generating a debug workspace, wherein generating includes adding at least one additional debug location and storing a cycle of the additional debug location as a relative cycle that is relative to another debug location associated with the debug workspace.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: June 25, 2019
    Assignee: Cadence Design Systems, Inc.
    Inventors: Chien-Liang Lin, Chung-Wah Norris Ip