Abstract: A semiconductor package device may include a first package substrate, a first semiconductor chip on the first package substrate, an interposer on the first semiconductor chip, a warpage prevention member on the interposer, a molding member on the interposer and the first package substrate, and a second package substrate on the molding member. At least a portion of a top surface of the molding member may be spaced apart from a bottom surface of the second package substrate.

Abstract: A layout for measuring an overlapping state includes a layout region, a first dummy active area region, and dummy component regions. The first dummy active area region is located in the layout region. The dummy component regions are stacked in the layout region. At the moment when one of the dummy component regions is formed on the first dummy active area region, the one of the dummy component regions and the first dummy active area region have a first overlapping region, and the first overlapping region does not include other dummy component regions among the dummy component regions.

Abstract: A light-emitting diode display having sub-pixel regions is provided. Each of the sub-pixel region includes a substrate, first and second electrodes, a light-emitting diode, and at least one blocking wall. The substrate has an active device. The first and second electrodes are separately disposed on the substrate. The first electrode is electrically connected to the active device, and a horizontal distance between the first and second electrodes is W1. The light-emitting diode is disposed on the substrate and includes a semiconductor stack, and first and second pads. The first pad contacts the first electrode, the second pad contacts the second electrode, and a maximum thickness of the semiconductor stack is H1. The blocking wall is disposed on the substrate and located between the first and second pads to prevent a contact therebetween. A height of the blocking wall is H2 and a width thereof is W2. H2?½H1, and W2?W1.

Abstract: A light emitting device includes a first light emitting element, a second light emitting element, a first light-transmissive member, and a first wavelength converting member. The first light emitting element has a first light emitting element first surface at which a first n-side electrode and a first p-side electrode are disposed, and a first light emitting element second surface. The second light emitting element has a second light emitting element first surface at which a second n-side electrode and a second p-side electrode are disposed, and a second light emitting element second surface. The first light-transmissive member covers the first light emitting element fourth surface of the first light emitting element and a second light emitting element fourth surface of the second light emitting element. The first wavelength converting member is disposed on the first light-transmissive member.

Abstract: A chip package structure including a substrate, a redistribution layer (RDL), a chip and an encapsulant is provided. The RDL is disposed on the substrate. The chip is disposed on the RDL and is electrically connected with the RDL. The encapsulant is disposed on the RDL and encapsulates the chip. The chip is located in the high stress region. From a top view, the chip is located in the high stress region, and the low stress region surrounds the high stress region. The RDL includes at least one first device located in the high stress region. From the top view, the extending direction of the at least one first device is parallel to a stress direction at a position thereof.

Abstract: A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

Abstract: The light emitting device package disclosed in the embodiment includes a package body including first and second frames, and a first body disposed between the first and second frames; a second body disposed on the package body and including a cavity and a sub-cavity spaced apart from the cavity; a light emitting device disposed in the cavity and including first and second bonding portions; and a protection device disposed in the sub-cavity, wherein the package body and the second body may be coupled to an adhesive member.

Abstract: A light emitting diode including a lead frame unit and a light source unit disposed on the lead frame unit, in which the lead frame unit includes a body portion having a first surface contacting the light source unit and a second surface opposite to the first surface, at least one solder hole recessed from the second surface of the body portion, a first conductive layer disposed on the first surface of the body portion and including a circular portion having a substantially circular shape and an elongated portion provided integrally with the circular portion and elongating in one direction from the circular portion, a second conductive layer disposed on the second surface of the body portion, and a connection portion disposed between the first conductive layer and the second conductive layer and penetrating through the body portion.

Abstract: A method includes forming a silicon layer on a wafer, forming an oxide layer in contact with the silicon layer, and, after the oxide layer is formed, annealing the wafer in an environment comprising ammonia (NH3) to form a dielectric barrier layer between, and in contact with, the silicon layer and the oxide layer. The dielectric barrier layer comprises silicon and nitrogen.

Abstract: In a method of manufacturing a vertical memory device, a first sacrificial layer including a nitride is formed on a substrate. A mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer is formed. The insulation layer and the second sacrificial layer include a first oxide and a second oxide, respectively. A channel is formed through the mold and the first sacrificial layer. An opening is formed through the mold and the first sacrificial layer to expose an upper surface of the substrate. The first sacrificial layer is removed through the opening to form a first gap. A channel connecting pattern is formed to fill the first gap. The second sacrificial layer is replaced with a gate electrode.

Abstract: In one example, an electronic device structure includes a substrate having a conductive structure adjacent to a surface. The conductive structure can include a plurality of conductive pads. First and second electronic devices are disposed adjacent to the top surface. The first electronic device is interposed between a first conductive pad and a second conductive pad, and the second electronic device is interposed between the second conductive pad and a third conductive pad.

Abstract: Methods for reducing manufacturing cost and improving the reliability of non-volatile memories using NAND strings with polysilicon channels and p-type doped source lines are described. A NAND string may include a polysilicon channel that is orthogonal to a substrate and connects to a boron doped source line at a source-side end of the NAND string. To reduce the likelihood of the polysilicon channel being cut-off or pinched near the source-side end of the NAND string, a thicker polysilicon channel may be formed near the source-side end of the NAND string while a thinner polysilicon channel may be formed for the remainder of the NAND string by diffusing boron into a first portion of the polysilicon channel corresponding with the thicker polysilicon channel and then etching the polysilicon channel with etchants that exhibit a reduction in their etch rate at a boron concentration above a threshold concentration.

Abstract: A light emitting device package disclosed in an embodiment of the invention includes a substrate including first and second frames; a light emitting device including a first bonding portion facing the first frame and a second bonding portion facing the second frame; a phosphor layer on the light emitting device; a first resin disposed around the upper surface of the substrate and the light emitting device; a second resin between the first resin and side surfaces of the light emitting device; and an adhesive layer between the phosphor layer and the light emitting device, wherein the adhesive layer includes a thickness thinner than a thickness of the phosphor layer, and the first resin comprises a reflective resin material and is disposed on the side surface of the phosphor layer. The second resin may include a transparent resin material, and the second resin may include a curved surface with an outer surface facing the first resin.

Abstract: Disclosed is a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a replacement metal gate (RMG) structure that includes a first section, which traverses a semiconductor body at a channel region in a first-type well, and a second section, which is adjacent to the first section and which traverses the semiconductor body at a drain drift region in a second-type well. The RMG structure includes, in both sections, a first-type work function layer and a second-type work function layer on the first-type work function layer. However, the thickness of the first-type work function layer in the first section is greater than the thickness in the second section such that the RMG structure is asymmetric. Thus, threshold voltage (Vt) at the first section is greater than Vt at the second section and the LDMOSFET has a relatively high breakdown voltage (BV). Also disclosed are methods for forming the LDMOSFET.

Abstract: An LED module includes a first metal layer disposed on a base surface and an LED chip disposed on the first metal layer. The first metal layer includes a first end portion forming a contour away from the base surface, and a curved portion between a region overlapping the LED chip and the first end portion.

Abstract: In various embodiments, bilayers are formed in electronic devices at least in part by anodization of metal-alloy base layers.

Abstract: A micro light emitting diode (LED), including a first semiconductor layer doped with an n-type dopant; a second semiconductor layer doped with a p-type dopant; an active layer arranged between the first semiconductor layer and the second semiconductor layer, and configured to provide light; a first side surface including a vertical side surface of the first semiconductor layer; a second side surface tilted with respect to the first side surface, and including a first tilted side surface of the active layer and a second tilted side surface of the second semiconductor layer; an insulating layer arranged to surround the first side surface and the second side surface; and a reflective layer arranged to partially surround the insulating layer in an area of the insulating layer corresponding to the second side surface.

Abstract: A light-emitting device includes a base member including a first lead, a second lead, and a securing member securing the first lead and the second lead, a light-emitting element mounted on an upper surface of the base member, a frame disposed on the upper surface of the base member to surround the light-emitting element, a first member covering at least a portion of an upper surface of the securing member exposed at an outer peripheral side of the frame in a top view, the first member being in contact with an outer lateral surface of the frame and containing a reflective material, and a second member covering the light-emitting element, the frame, and the first member. The first member has an inclined region in a cross-sectional view. A maximum height of the inclined region is less than a height of an upper end of the frame.

Abstract: A semiconductor device package includes a light emitting device disposed on a body, and at least one resin disposed between the body and the light emitting device. The body may include first and second opening parts passing through the body from the upper surface of the body, and at least one recess concavely provided from the upper surface of the body towards the lower surface of the body. The light emitting device may include a first bonding part disposed on the first opening part, and a second bonding part disposed on the second opening part. The at least one recess may be disposed between the first and second opening parts, and along the circumferences of the first and second opening parts. The at least one resin may be provided to the at least one recess. The at least one resin may include a reflective material.

Abstract: A memory package structure includes a substrate, a memory chip and a plurality of resistors. The substrate has a plurality of pins. The pins include a plurality of data pins used to transfer data signal. The memory chip is located on the substrate. A plurality of bonding pads is located on the memory chip. The bonding pads include a plurality of data pads used to receive the data signal from data pins or transfer the data signal from the memory chip. The resistors is located on the substrate. Each data pad is connected to a corresponding one of the data pins through a corresponding one of the resistors.