Patents Examined by Mark Wardas
  • Patent number: 5477161
    Abstract: A test clip, or test adapter, is provided for connecting leads of a tester to terminals on a packaged integrated circuit. Spacers on the test clip, which act to precisely separate the contact pins, are formed separately using a stamping process. Spacers may be formed having a thickness which can be controlled to approximately one mil. Each of the individual spacers is sandwiched between two contact pins to provide precise spacing of the contact pins. A bar is inserted through a hole in each of the spacers and contact pins to form a linear array of contact pins and spacers. Two or four (as appropriate) of the linear arrays of contact pins/spacers are then mounted on a test clip body sized for a specific integrated circuit package. Each of the spacers may include an L-shaped extension which is urged under the integrated circuit package when the test clip is pressed onto the package so as to firmly secure the test clip to the package.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: December 19, 1995
    Assignee: Emulation Technology, Inc.
    Inventors: Gabor Kardos, Norma J. Kardos
  • Patent number: 5477162
    Abstract: A method of determining a short-circuit inductance in an asynchronous machine even during operation of the machine includes the steps of causing a step change in the stator voltage (u.sub.s); measuring both the stator voltage (u.sub.s) and the stator current derivative (i'.sub.s) both before and after the step change in the stator voltage; determining the difference between the measured stator voltages (u.sub.s (t.sub.1), u.sub.s (t.sub.2)) and the difference between the measured stator current derivatives (i'.sub.s (t.sub.1), i'.sub.s (t.sub.2)); and determining the quotient of the difference between the stator voltages and the difference between the stator current derivatives for obtaining a short-circuit inductance (.sigma.L.sub.s).
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: December 19, 1995
    Assignee: ABB Industry Oy
    Inventor: Samuli Heikkila
  • Patent number: 5475318
    Abstract: A microprobe comprises a base, a microcantilever extending in a plane from the base, and a probe tip projecting from the microcantilever out of the plane. The microcantilever is a bimorph structure comprising first and second layers made from materials having different coefficients of thermal expansion, and an integrated heated element for supplying heat to the microcantilever. The probe tip is made from silicon and comes to a radius that can be controlled to atomic sharpness (<1 nm) if desired. Alternatively, the probe tip is a planar structure. Desirably, the microcantilever is made from a metal, such as aluminum, and silicon oxide as the materials of the two layers. The heating element comprises a line or ribbon of a conductive material, such as polysilicon which is in contact with one of the two layers, and supplies heat, thereby causing the probe tip to traverse an arc and bring it into contact with a material under investigation.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: December 12, 1995
    Assignees: Robert B. Marcus, Roxburgh Ltd.
    Inventors: Robert B. Marcus, William N. Carr
  • Patent number: 5475316
    Abstract: An emission microscope is mounted on a transportable structure for use on a test floor and encloses or garages an entire automatic test equipment head to facilitate high-speed testing. Test procedures allow development of static/fixed defects over time. A video mask can be developed based on emission sites on known good devices so that only emission from defect sites of bad devices under test are shown.
    Type: Grant
    Filed: December 27, 1993
    Date of Patent: December 12, 1995
    Assignee: Hypervision, Inc.
    Inventors: Daniel T. Hurley, Ching-Lang Chiang, Neeraj Khurana
  • Patent number: 5471148
    Abstract: A prober tester interface system is described which includes a carriage having a plurality of cam followers on its perimeter and a cam ring having a plurality of cam grooves on its interior. Positioning means are detachably coupled to the carriage for positioning the cam followers in the cam grooves. Rotating means are coupled to the cam ring for rotating the cam ring, thereby causing the cam followers to track in the cam grooves and move the carriage in a direction substantially perpendicular to the plane of the cam ring. A method is also described in which a carriage having a probe card disposed therein and a plurality of cam followers on its perimeter is positioned in a cam ring having a plurality of cam grooves located on its interior to engage the cam followers in the cam grooves. The probe card is equipped with a plurality of test pins.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: November 28, 1995
    Assignee: Xandex, Inc.
    Inventors: Roger Sinsheimer, James Anderson
  • Patent number: 5469072
    Abstract: An integrated circuit test system provides a quick change flexible circuit membrane (214). The flexible circuit membrane is a quadrant based design which allows steep launch angles away from a rectangular die under test (112). The flexible circuit membrane is edge guided (308,309) for positioning and concentric alignment in a probe tooling fixture (212). The system may include a focusing force member (528) focusing force only at the test point locations in line with the die pad contact positions (512) which allows greater force to be concentrated on the contact area, and helps to alleviate the debris tracking or "dust mop" effect. Additionally, a relieved area (620) may be provided on the pressure applicator (616) to prevent membrane droop or the pillowing effects.
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: November 21, 1995
    Assignee: Motorola, Inc.
    Inventors: William M. Williams, Anthony Angelo, Gregory L. Westbrook
  • Patent number: 5467012
    Abstract: Electrical power monitoring apparatus comprises a loop and a first conductor. A current sensor coupled to the first conductor provides a current signal that is representative of the current in the first conductor. A voltage sensor coupled at least to the first conductor provides a voltage signal that is representative of the voltage on the first conductor relative to that on a reference terminal. A multiplier coupled to the current sensor and voltage sensor has a power output which provides a power signal that is proportional to the instantaneous value of electrical power carried by the first conductor. A calibration circuit in the loop has an input coupled to the power output and has an adjustable output. A current regulator in the loop has an input coupled to the adjustable output to maintain the current in the loop between predetermined minimum and maximum loop current values.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: November 14, 1995
    Assignee: Load Controls Incorporated
    Inventor: Robert W. Nystrom
  • Patent number: 5463311
    Abstract: A test system 100 for performing electrical testing in a high voltage or inhospitable or inconvenient environment 150 electrically isolates a measurement detector 130 located within the environment from an externally located measurement result display and selector 110. Electrical isolation is accomplished using a non-conducting fiber optic link 120 for communicating the measurement results.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: October 31, 1995
    Assignee: NEC Electronics, Inc.
    Inventor: Steve Toy
  • Patent number: 5461324
    Abstract: A fixture is provided for locating open conditions within circuits and short conditions between adjacent circuits on a flexible substrate having circuits extending along each side, as well as individual circuits extending along both sides. In one station of the fixture, the flexible circuit extends against a conductive backing plate, and conductivity measurements, to detect open conditions, are made between two probes moving among test points on the first side of the substrate, which is opposite the backing plate, and between one of these probes and the conductive backing plate. The latter type of measurement is used particularly to detect an open condition in a via extending through the substrate.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: October 24, 1995
    Assignee: International Business Machines Corporation
    Inventors: James E. Boyette, Christopher M. Fleck, James C. Mahlbacher, Michael Servedio
  • Patent number: 5461306
    Abstract: A system for detecting the presence of an average dc current component in a load comprising a current transformer 10 for supplying a signal representative of the current, and a comparison means 12 and 13, for example a microprocessor and associated RAM, for comparing values of the current taken at time intervals corresponding to a phase interval of substantially n.pi., where n.pi. is an odd integer, of the ac periodic supply signal, so as to determine the presence of a dc current component caused by rectification of the supply. In one embodiment, the signal from a voltage detecting means 14-18 can be used to synchronise the sampling of the current at the correct phase.
    Type: Grant
    Filed: December 28, 1993
    Date of Patent: October 24, 1995
    Assignee: Schlumberger Industries, Inc.
    Inventor: Rex Niven
  • Patent number: 5461327
    Abstract: A probe apparatus tests the electrical characteristics of chips formed on a semiconductor wafer by bringing probes into contact with pads of each chip. The probes, which include ones for power supply potentials, signals, and ground potential, are mounted vertically penetrating a ring block which is attached to the center of a main PCB of a probe card. A tray containing a number of fuses is mounted over the probe card by means of struts. The fuses in the tray connect wires of the main PCB, to which the supply potential of a DC power source is applied, and their corresponding probes. The fuses and the tray can be collectively removed from the probe card to be replaced with new ones.
    Type: Grant
    Filed: August 31, 1993
    Date of Patent: October 24, 1995
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Junichiro Shibata, Hiroshi Marumo, Gakuji Sasamoto
  • Patent number: 5457380
    Abstract: In a fixture (24) are mounted a plurality of probes (28) so disposed as to enable them simultaneously to contact test points on a circuit board (26) to be subjected to an in-circuit test. Wiring (30) connects the probes (28) to respective fixture pins (22) that mate with the system pins (20) by which a general-purpose tester (12) provides connections to various test instruments (14). The wiring (20) is so provided that certain of the probes (28) are wired together and thus require fewer system pins (20) than there are probes (28).
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: October 10, 1995
    Assignee: GenRad, Inc.
    Inventor: Steven M. Blumenau
  • Patent number: 5457402
    Abstract: A method and apparatus for determining the resistance of the coils and commutator connections in an armature of an electric motor wherein a current is generated between a first commutator segment and a commutator segment located at least three segments beyond said first segment, a first voltage is measured across the first commutator segment and an adjacent second commutator segment, a second voltage is measured across the second commutator segment and an adjacent third commutator segment, and a third voltage is measured across a pair of commutator segments which are adjacent to the first commutator segment. After the three voltages are measured, the current is disconnected, and a voltage is generated across two commutator segments spaced at least three segments beyond the first segment. The generated voltage is adjusted so that the voltage measured across the second and third commutator segments equals the previous measurement, and the voltages are remeasured.
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: October 10, 1995
    Assignee: Odawara Engineering Co., Ltd.
    Inventor: Akira Sato
  • Patent number: 5453703
    Abstract: A method is provided for determining the minority carrier surface recombination lifetime constant (t.sub.s) of a specimen of semiconductor material. The specimen is positioned between a pair of electrodes, the specimen being disposed on one of the electrodes and being spaced form the other electrode. A signal is provided corresponding to the capacitance between the specimen and the electrode spaced from the specimen. A region of the surface of the specimen is illuminated with a beam of light of predetermined wavelengths and which is intensity modulated at a predetermined frequency and varying in intensity over a predetermined range. A fixed bias voltage V.sub.g applied between the pair of electrodes, the fixed bias voltage being of a value such that the semiconductor surface is in a state of depletion or inversion,. A signal is provided representing the ac photocurrent induced at the region of the specimen illuminated by the light beam.
    Type: Grant
    Filed: November 29, 1993
    Date of Patent: September 26, 1995
    Assignee: Semitest Inc.
    Inventor: William C. Goldfarb
  • Patent number: 5453702
    Abstract: An automatic fixture loading apparatus which provides for the rapid loading of probes into the bottom plate of a test fixture comprising a replenish station, an elevator storage station having means for storage of at least four (4) cassettes and a fixture loading station having a means for gimballing a mated cassette and fixture. All stations are connected via a trolley which automatically moves cassettes between the stations. The loading station provides for a means for providing a gimbal movement to a fixture having a cassette mated thereon to provide for the loading of probes into fixtures in angles of up to 12.degree. and in a non-grid-dependent manner. The cassette having cavities of at least 0.50 inch by 0.50 inch capable of holding of up to one hundred (100) probes.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: September 26, 1995
    Assignee: Methode Electronics, Inc.
    Inventor: Joseph M. Creeden
  • Patent number: 5451865
    Abstract: A current sensor includes first and second branches interconnected by a center conductor magnetically coupled to an annular current comparator for producing an output signal related, in magnitude and phase, to an input current. The input current divides, according to a predetermined relationship, between the first and second branches such that the current in the center conductor interconnecting the first and second branches is also related to the input current. A current is induced in the annular current comparator in relation to the current in the center conductor and, thus, in relation to the input current. Secondary windings are wound about and magnetically coupled to the annular current comparator for producing an output signal responsive to the current induced within the annular current comparator.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: September 19, 1995
    Assignee: General Electric Company
    Inventor: David C. Coburn
  • Patent number: 5451885
    Abstract: This disclosure describes an Interconnect Stress Testing (IST) system and a printed wiring board test coupon which is used with the IST system. The system includes a computer device and a cabinet which is used for mounting the test coupon as well as housing a number of the other components that make up the system. During a pre-cycling phase, the system determines the correct current that should be passed through the coupon in order to heat it to a predetermined temperature. After that test current value is determined the system actually stress tests the coupon by passing the determined test current through the coupon. It does so for a selected number of cycles, and monitors resistance changes in the coupon during testing while recording test data. This disclosure also describes the test coupon, which is designed to uniformly dissipate the heat created during stress cycling.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: September 19, 1995
    Assignee: Digital Equipment Corporation
    Inventors: Stephen M. Birch, Gerard M. Gavrel, Zaffar I. Memon
  • Patent number: 5451886
    Abstract: A method of and apparatus for evaluating the lifetime of a semiconductor material which is capable of measuring, in a non-contact and non-destructive manner, the lifetime of a surface thin-layer portion so as to evaluate the quality of a semiconductor device formed of an epitaxial wafer or a thin device-forming material. Light within a short-wavelength region is radiated for a short period of time on the surface of a semiconductor material to be evaluated, thereby generating carriers effectively on the surface and in a surface thin-layer. An electromagnetic wave within a millimeter to sub-millimeter wave region is projected onto the surface, and a wave reflected from the surface is measured to obtain a decay curve of the carriers. On the basis of the carrier decay curve, the lifetime of the surface as well as a surface thin-layer portion of the semiconductor material is evaluated.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: September 19, 1995
    Assignees: School Judicial Person Ikutoku Gakuen, Semitex Co., Ltd.
    Inventors: Yoichiro Ogita, Tateo Kusama
  • Patent number: 5450007
    Abstract: A method for generating a product of signals proportional to the voltage of an electrical supply and the current flowing through a load connected thereto, comprises the steps of deriving a first signal proportional to the said supply voltage, deriving a second signal proportional to the load current, frequency modulating two constant frequency carrier signals by the said first and second signals to produce third and fourth signals respectively, normalizing the third and fourth signals with reference to frequencies corresponding to zero voltage and zero current, and multiplying the two normalized third and fourth signals to form a product signal which is proportional to the power being absorbed by the load connected to the electrical supply. The third and fourth signals comprise pulse trains whose instantaneous pulse repetition rate is proportional to the voltage and current. Apparatus is described for performing this method. A 555 timer device is employed for voltage to frequency conversation.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: September 12, 1995
    Assignee: Ampy Automation-Digilog Limited
    Inventors: Kenneth Payne, Roger H. King, David A. Watson
  • Patent number: 5450018
    Abstract: Device for testing electrical modules. At least one container is provided which includes openings through each of which one module can be inserted into the container so that the opening can be closed in a substantially sealing manner, with the container having at least one entrance which is connectable with an exit of an aggregate which in turn is suitable for the release of a medium having a selectable temperature and/or humidity content. The device permits the function testing of the module while temperature gradients are being run or while further tests are in progress.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: September 12, 1995
    Assignee: Sieba AG
    Inventors: Hansjorg Rieser, Peter Schmoker, Herbert Staubli