Abstract: A semiconductor device includes a first fin, a second fin, and a third fin protruding above a substrate, where the third fin is between the first fin and the second fin; a gate dielectric layer over the first fin, the second fin, and the third fin; a first work function layer over and contacting the gate dielectric layer, where the first work function layer extends along first sidewalls and a first upper surface of the first fin; a second work function layer over and contacting the gate dielectric layer, where the second work function layer extends along second sidewalls and a second upper surface of the second fin, where the first work function layer and the second work function layer comprise different materials; and a first gate electrode over the first fin, a second gate electrode over the second fin, and a third gate electrode over the third fin.

Abstract: A display device includes: a base substrate having a display area and a frame area, the display area to display an image, the frame area surrounding the display area; a light-emitting element in the display area; and a sealing film provided in the display area and the frame area so as to cover the light-emitting element, the sealing film including a first inorganic film, an organic film, and a second inorganic film, wherein the first inorganic film covers the light-emitting element, a third inorganic film is provided between the first inorganic film and the organic film, the third inorganic film having higher wettability for a liquid drop, the organic film on the first inorganic film covers the third inorganic film, and the second inorganic film covers the peripheral end portion of the first inorganic film and the organic film.

Abstract: An OLED display including first, second, and third color pixels on a substrate, each including a first electrode, an organic emission layer, a second electrode, and a capping layer, in which the first color pixel emits green light, and each of the second and third color pixels emits a color of light other than green, the organic emission layer of the first color pixel includes first and second emission layers that emit light, the organic emission layer of the second or third color pixel includes a third emission layer that emit light, the second and third emission layers include both a host and a dopant, the first emission layer includes the host, but not any dopants therein, and the second emission layer is disposed on the first electrode, and the first emission layer is disposed on the second emission layer.

Abstract: A method of manufacturing a display apparatus includes: forming a plurality of displays including a light-emitting diode on a surface of a first mother substrate; preparing a second mother substrate; forming a first sealed area on a surface of at least one of the first mother substrate or the second mother substrate, wherein the first sealed area surrounds each of the plurality of displays and includes a frit; firstly bonding the first mother substrate to the second mother substrate by melting the frit in the first sealed area by radiating a first laser beam; and secondly bonding the first mother substrate to the second mother substrate by forming a second sealed area in which the frit and the first mother substrate, and/or the frit and the second mother substrate, are melted and mixed with each other by radiating a second laser beam partially in the first sealed area.

Abstract: A display substrate (10) includes a first base substrate (101) including a plurality of pixel units (101a) arranged in an array, at least one of the plurality of pixel units (101a) including at least two sub-pixel units and a transparent area (TA). The at least two sub-pixel units includes a first sub-pixel unit that is arranged between transparent areas (TA) of adjacent pixel units (101a) in a first direction. An orthographic projection of a pixel drive circuit (105) electrically coupled to the first sub-electrode (102a) corresponding to the first sub-pixel unit on the first base substrate (101) partially overlaps with an orthographic projection of a first sub-electrode (102a) positionally corresponding to another sub-pixel unit on the first base substrate (101).

Abstract: An integrated circuit includes a circuit module storing sensitive data. An electrically conductive body at a floating potential is located in the integrated circuit and holds an initial amount of electric charge. In response to an attack attempting to access the sensitive data, electric charge is collected on the electrically conductive body. A protection circuit is configured to ground an output of the circuit module, and thus preclude access to the sensitive data, in response to collected amount of electric charge on the electrically conductive body differing from the initial amount and exceeding a threshold.

Abstract: The present disclosure provides a method of forming a semiconductor structure with a metal gate. The semiconductor structure is formed by first fabricating fins over a semiconductor substrate, followed by a formation of a source and a drain recess. A source and a drain region may then be deposited into the source and the drain recess. The gate structure may be deposited into the region between the fins. The gate structure includes dielectric and metallic layers. In the regions between the fins, the gate structure is isolated from the source and the drain region by an insulating layer.

Abstract: A display panel is provided with a deep hole area in a lower frame area of an array substrate, so that the lower frame area is bent back along the deep hole area, thereby achieving a narrow frame of the display panel. Simultaneously a stress relief hole is provided in the display area, which is used to release the stress generated when the display area is bent, so that the entire array substrate is less likely to be cracked or broken when bent, and the bending performance of the display panel is greatly improved.

Abstract: In one aspect, a method of fabricating a transistor includes implanting ions into a first portion of a second epitaxial layer to form a recombination region, depositing a second portion of the second epitaxial layer having an n-type dopant on the recombination region, and forming trenches in the second portion of the second epitaxial layer.

Abstract: A display apparatus includes a first pixel, a second pixel, and a third pixel which emit light of different colors from one another, a first insulating layer on a first display element of the first pixel, and a second insulating layer on the first insulating layer. The first insulating layer defines a first opening portion corresponding to the first display element, the second insulating layer defines a first opening corresponding to the first opening portion, and the first opening portion has a first extension portion which extends in a first direction and at least partially exposes the second insulating layer.

Abstract: A display module and manufacturing method and electronic device thereof are provided. The manufacturing method includes forming a first bonding layer on a side of a first display panel; bonding a second display panel on a side of the first display panel where the first bonding layer is formed; forming a second bonding layer on a side of the first display panel or the second display panel away from the first bonding layer; and forming a covering layer on a side of the first display panel or the second display panel away from the first bonding layer.

Abstract: A pixel array substrate has a plurality of sub-pixel regions, wherein a pixel structure of an individual sub-pixel region includes a first signal line, a second signal line, a first contact pad, a second contact pad, a light-emitting diode, a first conductive structure, and a flux structure layer. The first contact pad and the second contact pad are respectively electrically connected with the first signal line and the second signal line. The light-emitting diode is disposed on the first contact pad. A portion of the first conductive structure is disposed between the first contact pad and a first electrode of the light-emitting diode. The flux structure layer partially surrounds the first conductive structure and the light-emitting diode. A top portion of the flux structure layer is higher than a top surface of the first electrode and is lower than a bottom surface of a light-emitting layer of the light-emitting diode.

Abstract: Disclosed is a display device, a manufacturing method thereof and a display apparatus. The display device includes a carrier having a first surface and a second surface opposite to each other, and at least one nanotube in the carrier. Each nanotube includes a tube wall and a receiving cavity surrounded by the tube wall. The receiving cavity includes a first open end at the first surface and a second open end at the second surface. The display device further includes a first electrode at the first open end, a second electrode at the second open end and a light-emitting layer between the first electrode and the second electrode.

Abstract: A compound semiconductor substrate includes a SiC (silicon carbide) layer, a AlN (aluminum nitride) buffer layer formed on the SiC layer, an Al (aluminum) nitride semiconductor layer formed on the AlN buffer layer, a composite layer formed on the Al nitride semiconductor layer, a GaN (gallium nitride) layer as an electron transition layer formed on the composite layer, and an Al nitride semiconductor layer as a barrier layer formed on the GaN layer. The composite layer includes C—GaN layers stacked in a vertical direction, and an AlN layer formed between the C—GaN layers.

Abstract: An electroluminescent display apparatus can include a substrate including a first subpixel and a second subpixel, a planarization layer on the substrate, a first electrode in each of the first subpixel and the second subpixel on the planarization layer, a bank between the first electrode of the first subpixel and the first electrode of the second subpixel, a light emitting layer on the first electrode and the bank, and a second electrode on the light emitting layer. The planarization layer includes a plurality of grooves in a region overlapping the bank, the bank includes a bank hole in a region overlapping some of the plurality of grooves, and the bank hole extends along a boundary between the first subpixel and the second subpixel.

Abstract: The present disclosure provides a display panel. In order to reduce a parasitic capacitance that may occur between a data line and a semiconductor layer and a crosstalk caused by the parasitic capacitance, a display panel includes a substrate, a driving thin film transistor on the substrate, including a driving semiconductor layer and a driving gate electrode, a compensation thin film transistor on the substrate, including a compensation semiconductor layer and a compensation gate electrode, a node connection line electrically connecting the driving thin film transistor to the compensation thin film transistor, a scan line extending in a first direction on the substrate, and a gate connection line electrically connected to the scan line, which includes the compensation gate electrode, wherein the compensation semiconductor layer is closer to the driving semiconductor layer than the scan line when viewed on a plane.

Abstract: A display device is provided. A display device includes a plurality of pixels arranged in a row axis and in a column axis that intersects the row axis, a first substrate on which a light-emitting element disposed in each of the pixels is disposed, a second substrate which faces the first substrate, and a first wavelength conversion pattern disposed on the second substrate in a first pixel column and which converts wavelength of light emitted from the light-emitting element. The first wavelength conversion pattern includes a first main pattern part arranged in a stripe fashion along the column axis and a protruding pattern part projected from the first main pattern part toward at least one of first and second directions of the row axis.

Abstract: An electroluminescent display panel and manufacturing method thereof, and a display device are provided. The electroluminescent display panel includes a base substrate, pixel structures disposed on the base substrate; and an encapsulating layer disposed on the pixel structures. The pixel structures are arranged in an array, the pixel structure including a plurality of sub-pixels arranged in an array, the pixel structure array has a first direction and a second direction intersected with each other, the edge of the sub-pixel including a first portion gradually away from a straight line where the first direction lies, and an extending direction of the first portion does not coincide with the second direction.

Abstract: Provided is a display panel including a substrate, a plurality of pixels arranged on a display area of the substrate, a plurality of dummy pixels arranged on a non-display area of the substrate and emitting no light, and a plurality of signal lines configured to electrically connect the plurality of pixels to the plurality of dummy pixels, wherein some of the plurality of dummy pixels are arranged between a first region and a second region of the substrate. Accordingly, when static electricity is generated around the first region and/or the second region, the dummy pixels serves as a buffer to prevent a large voltage transmitted to the pixels to protect the display device.

Abstract: Chamfer-less via interconnects and techniques for fabrication thereof with a protective dielectric arch are provided. In one aspect, a method of forming an interconnect includes: forming metal lines in a first dielectric; depositing an etch stop liner onto the first dielectric; depositing a second dielectric on the etch stop liner; patterning vias and a trench in the second dielectric, wherein the vias are present over at least one of the metal lines, and wherein the patterning forms patterned portions of the second dielectric/etch stop liner over at least another one of the metal lines; forming a protective dielectric arch over the at least another one of the metal lines; and filling the vias/trench with a metal(s) to form the interconnect which, due to the protective dielectric arch, is in a non-contact position with the at least another one of the metal lines. An interconnect structure is also provided.