Patents Examined by Michael Alsip
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Patent number: 12651151Abstract: A method includes: generating a first sum value at least by a first resistor; generating a first shifted sum value based on the first sum value and a nonlinear function; generating a pulse number based on the first shifted sum value; and changing the first resistor based on the pulse number to adjust the first sum value.Type: GrantFiled: October 10, 2022Date of Patent: June 9, 2026Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Tuo-Hung Hou, Chih-Cheng Chang
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Patent number: 12645365Abstract: Examples of the present disclosure provide a memory system and operation method thereof, a memory device and operation method thereof. In one example, the operation method for the memory system includes: obtaining a wear value of a system area and a wear value of a user area within a first period of time; and determining whether to reallocate virtual blocks in a first reserved area of the system area and a second reserved area of the user area based on a result of comparison between the wear value of the system area and the wear value of the user area. Other examples are shown and described.Type: GrantFiled: December 30, 2022Date of Patent: June 2, 2026Assignee: Yangtze Memory Technologies Co., Ltd.Inventor: Jingsheng Liu
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Patent number: 12645374Abstract: A method of circuit conception of a computational memory circuit including a memory having memory cells, the method including: receiving an indication of the memory storage size and an indication of an instruction frequency of the instructions to be executed by the computational memory circuit; evaluating for a plurality of candidate types of memory cells, a number representing an average number of cycles of the memory of the computational memory circuit per instruction to be executed; determining, for each of the plurality of candidate types of memory cells, a minimum operating frequency of the computational memory circuit based on the number N and on the memory storage size; selecting one of the plurality of candidate types of memory cells based on the determined minimum operating frequency; and performing the circuit conception based on the selected type of candidate memory cell.Type: GrantFiled: February 5, 2021Date of Patent: June 2, 2026Assignee: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Jean-Philippe Noel, Valentin Egloff, Bastien Giraud, Antoine Philippe
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Patent number: 12645658Abstract: The description relates to adaptive data storage management. An example manages data within a database system using dynamically adjustable mini-pages within a buffer pool. The example involves receiving a request for a data item, adjusting mini-page sizes based on the request, and determining the data item's presence within these mini-pages. Upon locating the item, the request is executed on the relevant mini-page. The example also updates a mapping table to correlate mini-page identifiers with their locations in the database, and selectively caches or evicts the data item based on probabilities and access patterns.Type: GrantFiled: May 23, 2024Date of Patent: June 2, 2026Assignee: Microsoft Technology Licensing, LLCInventors: Badrish Chandramouli, Xiangpeng Hao
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Patent number: 12645974Abstract: A computing system is provided, including a processor configured to receive a standardized stabilizer instrument specification including an input Clifford unitary, an output Clifford unitary, and a plurality of stabilizer instrument bit matrices. The processor is further configured to receive a logical instrument input error correction code and a logical instrument output error correction code. The processor is further configured to compute a logical instrument specification based at least in part on the standardized stabilizer instrument specification, the logical instrument input error correction code, and the logical instrument output error correction code. The logical instrument specification includes a logical input Clifford unitary, a logical output Clifford unitary, a plurality of logical instrument bit matrices, and a logical instrument relabeling matrix. The processor is further configured to store the logical instrument specification in memory.Type: GrantFiled: December 16, 2022Date of Patent: June 2, 2026Assignee: Microsoft Technology Licensing, LLCInventors: Vadym Kliuchnikov, Michael Edward Beverland, Adam Edward Paetznick
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Patent number: 12645276Abstract: Disclosed techniques relate to limiting a data rate of communications on fabric circuitry proportionally to a violation of a power-related threshold. Toggle rate detector circuitry, measuring a toggle rate between a given interface circuit and the fabric circuitry, may be distributed at interfaces that couple the fabric circuitry and multiple client circuits. Power control circuitry may generate an estimate of electrical current use by a given client circuit based on a toggle rate between the client circuit's interface and the fabric circuitry and based on a communication event. The power control circuitry may detect, based on the estimates of electrical current use, a violation of an electrical current threshold. Additionally, the power control circuitry may limit the data rate of communications on the fabric circuitry, proportionally to a magnitude of the violation. Disclosed techniques may mitigate violations with reduced impacts on performance relative to traditional techniques.Type: GrantFiled: September 12, 2024Date of Patent: June 2, 2026Assignee: Apple Inc.Inventors: Alexander Gendler, Samer Nassar, Lior Zimet, Tzach Zemer
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Patent number: 12632176Abstract: A data storage technique involves detecting that candidate data is deduplicatable within a storage array. The technique further involves, in response to detecting that the candidate data is deduplicatable within the storage array, evaluating whether to perform a compression operation on the candidate data in place of performing a deduplication operation on the candidate data and providing an optimization decision indicating whether to perform the deduplication operation on the candidate data in place of performing the deduplication operation on the candidate data. The technique further involves performing, within the storage array, a storage optimization operation on the candidate data based on the optimization decision, the storage optimization operation including one of the deduplication operation to deduplicate the candidate data and the compression operation to compress the candidate data.Type: GrantFiled: March 19, 2024Date of Patent: May 19, 2026Assignee: Dell Products L.P.Inventors: Rachel Fraenkel-Saban, Uri Shabi, Aleksey Kabishcher
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Patent number: 12632193Abstract: A data storage device includes a relocation management system that determines whether to perform a relocation operation based on an operating temperature, performance metrics and/or energy metrics associated with the data storage device. The relocation management system uses the operating temperature to identify a performance threshold and an energy threshold. Each threshold indicates whether the relocation operation is a first relocation method or a second relocation method. If the validity count of a memory block included in the relocation operation is below each threshold, the first relocation method is selected. If the validity count of the memory block is above both thresholds, the second relocation method is selected. However, if the validity count of the memory block is in a tradeoff range, the relocation management system selects a relocation method based on a tradeoff between performance metrics and energy consumption metrics.Type: GrantFiled: April 30, 2024Date of Patent: May 19, 2026Assignee: Sandisk Technologies, Inc.Inventors: Bishwajit Dutta, Saifullah Nalatwad
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Patent number: 12622627Abstract: An electroencephalogram (EEG) signal classification method and apparatus, a device, a storage medium, and a program product are provided, and relate to the field of signal processing technologies. The method includes: obtaining a first EEG signal; obtaining time-frequency feature maps of at least two electrode signals in the first EEG signal; performing feature extraction based on the time-frequency feature maps of the at least two electrode signals to obtain a first extracted feature map; performing weighting processing based on an attention mechanism on the first extracted feature map to obtain an attention feature map; and obtaining a motor imagery type of the first EEG signal based on the attention feature map.Type: GrantFiled: October 31, 2022Date of Patent: May 12, 2026Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LTDInventors: Luyan Liu, Kai Ma, Yefeng Zheng
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Patent number: 12619546Abstract: A system and method for efficient data storage, transfer, synchronization, and security using automated model monitoring and training. The system analyzes test datasets to detect data drift, retraining encoding and decoding algorithms as needed. New data sourceblocks are created and assigned codewords, compiling an updated codebook for distribution to connected devices. A novel dyadic distribution subsystem simultaneously compresses and encrypts data by transforming input streams into a dyadic distribution. This process generates a compressed main data stream and a secondary stream of transformation information, which are combined into a secure output. The system includes a network device manager for optimizing codebook distribution based on device resource usage. Operating in both lossless and lossy modes, the system offers flexible, efficient, and secure data handling across various network configurations.Type: GrantFiled: March 24, 2025Date of Patent: May 5, 2026Assignee: ATOMBEAM TECHNOLOGIES INC.Inventors: Joshua Cooper, Grant Fickes, Charles Yeomans
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Patent number: 12596685Abstract: A system and methods for bandwidth-efficient data encoding comprising a sequence analyzer configured to: analyze a received sequence dataset to determine a sequence dataset file type, scan the sequence dataset to maintain a count of unique characters contained therein, identify positions where the unique character count increases by a power of two, deconstruct the sequence dataset into a plurality of sourceblocks at the identified positions, and encode the plurality of sourceblocks using a data deconstruction engine and library management module to assign each sourceblock a reference code.Type: GrantFiled: October 11, 2024Date of Patent: April 7, 2026Assignee: ATOMBEAM TECHNOLOGIES INC.Inventors: Joshua Cooper, Aliasghar Riahi
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Patent number: 12591518Abstract: Methods, systems, and devices for validity mapping techniques are described. A memory device may use a change log to update a mapping that indicates whether data stored at respective physical addresses is valid. For example, the memory device may receive a command associated with data having a corresponding set of addresses (whether logical block addresses or physical addresses). The memory device may set an entry of the change log based on whether the set of addresses are consecutive. For example, the memory device may identify whether the set of addresses are consecutive and may set a flag in the entry of the change log to indicate whether the addresses are consecutive. Then, the memory device may update one or more entries of the mapping corresponding to the entry of the change log to indicate whether the addresses corresponding to the one or more entries of the mapping store valid data.Type: GrantFiled: September 16, 2024Date of Patent: March 31, 2026Assignee: Micron Technology, Inc.Inventors: Xing Wang, Zhen Gu, Xu Zhang, Liping Xu
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Patent number: 12591545Abstract: A system and method for securing high-speed communications between processing units on computer chips, wherein a training data set is used to find patterns and associated smaller indices, or codewords, which are stored in a reference codebook library, and where reconstruction and deconstruction algorithms are used to encode and decode data as it is received. The codebook and algorithms may be stored in the firmware of a semiconductor which enable reduced resources and cost when transmitting data between or among devices that utilize such semiconductors.Type: GrantFiled: October 2, 2024Date of Patent: March 31, 2026Assignee: ATOM BEAM TECHNOLOGIES INC.Inventors: Joshua Cooper, Charles Yeomans, Aliasghar Riahi, Gregory Caltabiano, Mojgan Haddad
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Patent number: 12585950Abstract: A method by which an electronic device performs a DNN operation includes performing a first modified operation including extending a channel of an output of a first layer with respect to a feature map input into the first layer, the first layer being one of a plurality of layers of a DNN, wherein the first modified operation includes a space-to-depth transformation operation, performing a neural network operation corresponding to layers between the first layer and a second layer as a channel-extended neural network operation, wherein the second layer is a layer of the plurality of layers of the DNN after the first layer, performing a second modified operation including reducing a channel of an output of the second layer with respect to a channel-extended feature map input into the second layer, wherein the second modified operation includes a depth-to-space transformation operation, and outputting a result of the DNN operation.Type: GrantFiled: December 9, 2022Date of Patent: March 24, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Cheongyo Bahk, Eunji Jeong, Jonghun Lee
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Patent number: 12578856Abstract: A system and method for encoding data using a plurality of encoding libraries with pre-coding and complexity estimation. Portions of the data are encoded by different encoding libraries, depending on which library provides the greatest compaction for a given portion of the data. This methodology not only provides substantial improvements in data compaction over use of a single data compaction algorithm with the highest average compaction, but provides substantial additional security in that multiple decoding libraries must be used to decode the data. In some embodiments, each portion of data may further be encoded using different data block sizes, providing further security enhancements as decoding requires multiple decoding libraries and knowledge of the data block size used for each portion of the data. In some embodiments, encoding libraries may be randomly or pseudo-randomly rotated to provide additional security.Type: GrantFiled: February 10, 2023Date of Patent: March 17, 2026Assignee: ATOMBEAM TECHNOLOGIES INC.Inventors: Joshua Cooper, Aliasghar Riahi, Mojgan Haddad, Ryan Kourosh Riahi, Razmin Riahi, Charles Yeomans
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Patent number: 12578857Abstract: A system for operating system virtualization using codebook encoding to improve entropy encoding methods. Training data sets are analyzed to determine occurrence frequency of each sourceblock in the data sets. A mismatch probability estimate is calculated at which any given data sourceblock received will not have a codeword in the codebook. Entropy encoding is used to generate codebooks comprising codewords for sourceblocks based on the frequency of occurrence of each. A “mismatch codeword” is inserted into the codebook to represent those cases when a block of data does not have a codeword.Type: GrantFiled: November 1, 2023Date of Patent: March 17, 2026Assignee: ATOMBEAM TECHNOLOGIES INC.Inventors: Joshua Cooper, Charles Yeomans
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Patent number: 12566548Abstract: A system and method for data compression using a two-codebook approach. The system creates and maintains two distinct codebooks: a data codebook containing codewords for encoding and decoding data, and a behavior codebook containing rules and configuration parameters that control how the data codebook is used. During encoding operations, both codebooks are required—the behavior codebook controls how the data codebook compresses the data. However, during decoding operations, only the data codebook is needed. This asymmetric architecture allows for secure distribution of decoding capabilities while maintaining control over encoding operations. The system can dynamically add new sourceblocks to the data codebook based on received data and supports machine learning optimization of encoding rules. This approach enables efficient data compression while providing granular control over encoding operations through the separate behavior codebook.Type: GrantFiled: February 23, 2025Date of Patent: March 3, 2026Assignee: ATOMBEAM TECHNOLOGIES INC.Inventor: Joshua Cooper
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Patent number: 12561093Abstract: A redundant array of independent drives (RAID) stripe is formed across a set of storage controllers of a plurality of storage controllers, wherein the RAID stripe comprises two or more of a plurality of modular storage devices of at least one of the set of storage controllers. The RAID stripe is written across the set of storage controllers.Type: GrantFiled: June 23, 2023Date of Patent: February 24, 2026Assignee: PURE STORAGE, INC.Inventors: Hari Kannan, Robert Lee, Yuhong Mao, Ronald Karr, Boris Feigin
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Patent number: 12561064Abstract: A memory management method, a memory storage device, and a memory control circuit unit are provided. The method includes: detecting a first temperature status of a rewritable non-volatile memory module; performing a first write operation on a first physical unit under the first temperature status to store first data to the first physical unit; after performing the first write operation, detecting a second temperature status of the rewritable non-volatile memory module; in response to the first temperature status and the second temperature status meeting a first condition, performing a data refresh operation on the first physical unit under the second temperature status to re-store the first data to a second physical unit different from the first physical unit.Type: GrantFiled: October 12, 2021Date of Patent: February 24, 2026Assignee: PHISON ELECTRONICS CORP.Inventors: Jia-Fan Chien, Wei Lin, Yu-Cheng Hsu, Yu-Siang Yang
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Patent number: 12554428Abstract: A computer-implemented method, according to one embodiment, includes: receiving one or more suggestions which correspond to placement of data in storage. The one or more suggestions are used to identify portions of actual data stored in actual storage which correspond to the one or more suggestions. The first tier is configured to stripe data across the two or more shared nodes. For each of the identified portions of the actual data stored in the first tier, the one or more suggestions is further used to determine whether to transfer the given identified portion of the actual data to the second tier. Moreover, in response to a determination to transfer at least one of the identified portions of the actual data to the second tier, one or more instructions are sent to transfer the at least one of the identified portions of the actual data from the first tier to the second tier.Type: GrantFiled: February 6, 2023Date of Patent: February 17, 2026Assignee: International Business Machines CorporationInventors: Sandeep R. Patil, Sasikanth Eda, Abhishek Jain, Digvijay Ukirde