Patents Examined by Michael Alsip
  • Patent number: 11734195
    Abstract: A first set of memory access operations is performed at a memory sub-system based on first operation settings that are configured based on a first operating environment of a host system. A detection is made that the host system is operating in a second operating environment that is different from the first operating environment. A level of impact that each operating requirement of a set of operating requirements of the memory sub-system has on a performance of the memory sub-system in view of the second operating environment. A second set of memory access operations is determined based on a respective priority for each operating requirement of the set of operating requirements. A second set of memory access operations is performed at the memory sub-system based on the second set of memory access operation settings.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: August 22, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Christopher Bueb, Poorna Kale
  • Patent number: 11734231
    Abstract: A system and methods for bandwidth-efficient encoding of genome and bioinformatic sequence datasets comprising a sequence analyzer configured to: analyze a received sequence dataset to determine a sequence dataset file type, scan the sequence dataset to maintain a count of unique characters contained therein, identify positions where the unique character count increases by a power of two, deconstruct the sequence dataset into a plurality of sourceblocks at the identified positions, and encode the plurality of sourceblocks using a data deconstruction engine and library management module to assign each sourceblock a reference code.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: August 22, 2023
    Assignee: ATOMBEAM TECHNOLOGIES INC.
    Inventors: Joshua Cooper, Aliasghar Riahi
  • Patent number: 11714572
    Abstract: A redundant array of independent drives (RAID) stripe is formed across a set of storage controllers of a plurality of storage controllers, wherein the RAID stripe comprises two or more of a plurality of modular storage devices of at least one of the set of storage controllers. The RAID stripe is written across the set of storage controllers.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: August 1, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Hari Kannan, Robert Lee, Yuhong Mao, Ronald Karr, Boris Feigin
  • Patent number: 11705191
    Abstract: Exemplary methods and apparatus are provided for implementing a deep learning accelerator (DLA) or other neural network components within the die of a non-volatile memory (NVM) apparatus using, for example, under-the-array circuit components within the die. Some aspects disclosed herein relate to configuring the under-the-array components to implement feedforward DLA operations. Other aspects relate to backpropagation operations. Still other aspects relate to using an NAND-based on-chip copy with update function to facilitate updating synaptic weights of a neural network stored on a die. Other aspects disclosed herein relate to configuring a solid state device (SSD) controller for use with the NVM. In some aspects, the SSD controller includes flash translation layer (FTL) tables configured specifically for use with neural network data stored in the NVM.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: July 18, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rami Rom, Ofir Pele, Alexander Bazarsky, Tomer Tzvi Eliash, Ran Zamir, Karin Inbar
  • Patent number: 11693787
    Abstract: In an example, a device includes a memory and a processor core coupled to the memory via a memory management unit (MMU). The device also includes a system MMU (SMMU) cross-referencing virtual addresses (VAs) with intermediate physical addresses (IPAs) and IPAs with physical addresses (PAs). The device further includes a physical address table (PAT) cross-referencing IPAs with each other and cross-referencing PAs with each other. The device also includes a peripheral virtualization unit (PVU) cross-referencing IPAs with PAs, and a routing circuit coupled to the memory, the SMMU, the PAT, and the PVU. The routing circuit is configured to receive a request comprising an address and an attribute and to route the request through at least one of the SMMU, the PAT, or the PVU based on the address and the attribute.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: July 4, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Sriramakrishnan Govindarajan, Gregory Raymond Shurtz, Mihir Narendra Mody, Charles Lance Fuoco, Donald E. Steiss, Jonathan Elliot Bergsagel, Jason A.T. Jones
  • Patent number: 11693561
    Abstract: The present disclosure includes apparatuses and methods for simultaneous in data path compute operations. An apparatus can include a memory device having an array of memory cells and sensing circuitry selectably coupled to the array. A plurality of shared I/O lines can be configured to move data from the array of memory cells to a first portion of logic stripes and a second portion of logic stripes for in data path compute operations associated with the array. The first portion of logic stripes can perform a first number of operations on a first portion of data moved from the array of memory cells to the first portion of logic stripes while the second portion of logic stripes perform a second number of operations on a second portion of data moved from the array of memory cells to the second portion of logic stripes during a first time period.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: July 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Perry V. Lea, Glen E. Hush
  • Patent number: 11693777
    Abstract: A network interface device comprises a programmable interface configured to provide a device interface with at least one bus between the network interface device and a host device. The programmable interface is programmable to support a plurality of different types of a device interface.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: July 4, 2023
    Assignee: Xilinx, Inc.
    Inventors: Steven L. Pope, Dmitri Kitariev, David J. Riddoch, Derek Roberts, Neil Turton
  • Patent number: 11687278
    Abstract: A data storage system can connect a data storage controller to a host and a data storage device. A first reference state corresponding to a first zone of the data storage device can be incremented in response to a first version of data being assigned to the first zone by the data storage controller. A second version of the data may be written to a second zone of the data storage device prior to populating a recently freed list with the first zone having an incorrect reference state. The first zone can be allocated by the data storage controller for new data without altering the incorrect reference state that is subsequently written to the first zone as directed by the data storage controller.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 27, 2023
    Assignee: Seagate Technology LLC
    Inventors: Douglas Dewey, Ian Davies, Ryan Phillips
  • Patent number: 11687241
    Abstract: A system and method for compacting data that uses mismatch probability estimation to improve entropy encoding methods to account for, and efficiently handle, previously-unseen data in data to be compacted. Training data sets are analyzed to determine the frequency of occurrence of each sourceblock in the training data sets. A mismatch probability estimate is calculated comprising an estimated frequency at which any given data sourceblock received during encoding will not have a codeword in the codebook. Entropy encoding is used to generate codebooks comprising codewords for data sourceblocks based on the frequency of occurrence of each sourceblock. A “mismatch codeword” is inserted into the codebook based on the mismatch probability estimate to represent those cases when a block of data to be encoded does not have a codeword in the codebook. During encoding, if a mismatch occurs, a secondary encoding process is used to encode the mismatched sourceblock.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: June 27, 2023
    Assignee: ATOMBEAM TECHNOLOGIES INC.
    Inventors: Joshua Cooper, Aliasghar Riahi, Mojgan Haddad, Ryan Kourosh Riahi, Razmin Riahi, Charles Yeomans
  • Patent number: 11687266
    Abstract: Deduplication operations can be managed based on a likelihood of duplicability. For example, a computing device can generate, by a container of a storage system, an indication of duplicability corresponding to a likelihood of duplicability for the data unit in the storage system. The computing device can transmit the indication of duplicability to a storage node of the storage system for performing an operation based on the indication of duplicability.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: June 27, 2023
    Assignee: RED HAT, INC.
    Inventors: Gabriel Zvi BenHanokh, Orit Wasserman
  • Patent number: 11669250
    Abstract: Techniques manage a wear degree of a storage system. Such techniques involve: receiving respectively, for multiple storage devices in the storage system, multiple access histories of the multiple storage devices in a previous time period; determining respectively multiple wear increments of the multiple storage devices at a future time point based on the multiple access histories of the multiple storage devices; acquiring a wear balance degree of the storage system at the future time point based on the multiple wear increments of the multiple storage devices at the future time point; and migrating data among the multiple storage devices in response to determining that the wear balance degree satisfies a preset condition. Accordingly, it is possible to determine the wear degree of each storage device in the storage system more accurately and ensure that the wear degree of each storage device is in a balanced state.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: June 6, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Chi Chen, Huijuan Fan
  • Patent number: 11669410
    Abstract: The selection of an optimal restore instance type based on a customer's speed/cost tradeoff resolution is disclosed. An automated restore activity may be performed on a baseline test VM of a predefined size using different restore instance types. The number of calibration runs or evaluations needed to identify an optimal restore instance type in terms of performance and price, with respect to bandwidth or other constraining factor, is performed on less than all of the restore instance types.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: June 6, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Jehuda Shemer, Boris Shpilyuck
  • Patent number: 11656780
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving one or more suggestions which correspond to placement of data in storage, where the one or more suggestions are based on data workload characteristics. The one or more suggestions are used to identify portions of actual data stored in actual storage which correspond to the one or more suggestions. For each of the identified portions of the actual data stored in the first tier, the one or more suggestions is further used to determine whether to transfer the given identified portion of the actual data to the second tier. Moreover, in response to determining to transfer at least one of the identified portions of the actual data to the second tier, one or more instructions are sent to transfer the at least one of the identified portions of the actual data from the first tier to the second tier.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: May 23, 2023
    Assignee: International Business Machines Corporation
    Inventors: Sandeep R. Patil, Sasikanth Eda, Abhishek Jain, Digvijay Ukirde
  • Patent number: 11650944
    Abstract: A memory controller interfaces with one or more memory devices having configurable width data buses and configurable connectivity between data pins of the memory devices and data pins of the memory controller. Upon initialization of the memory devices, the memory controller automatically discovers the connectivity configuration of the one or more memory devices, including both individually selected and jointly selected devices. After discovering connectivity of the connected devices, the memory controller configures the memory devices according to the discovered connectivity and assigns unique addresses to jointly selected devices.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: May 16, 2023
    Assignee: Rambus Inc.
    Inventor: John Eric Linstadt
  • Patent number: 11645211
    Abstract: Methods, systems, and computer-readable media for augmenting storage functionality using emulation of storage characteristics are disclosed. An access request for a data set is received. The access request is formatted according to a first protocol associated with a first data store, and the first data store is associated with first storage characteristics. The access request is translated into a translated access request. The translated access request is formatted according to a second protocol associated with a second data store, and the second data store is associated with second storage characteristics differing at least in part from the first storage characteristics. The translated access request is sent to the second data store. The translated access request is performed by the second data store on the data set using emulation of one or more of the first storage characteristics not included in the second storage characteristics.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: May 9, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Gracjan Maciej Polak, Kanika Kalra, Vinayak Sundar Raghuvamshi, Syed Sajid Nizami, Per Weinberger, Amit Chhabra, Chaiwat Shuetrakoonpaiboon, Chen Zhou, Muhammad Usman, Jacob Shannan Carr, Nimit Kumar Garg, Jazarine Jamal, Reza Shahidi-Nejad
  • Patent number: 11640338
    Abstract: The systems and methods herein permit storage systems to correctly perform data recovery, such as direct access recovery, of Network Data Management Protocol (“NDMP”) backup data that was modified prior to being stored in secondary storage media, such as tape. The systems and methods permit NDMP backup data to be encrypted, compressed, deduplicated, and/or otherwise modified prior to storage. The systems and methods herein also permit a user to perform a precautionary snapshot of the current state of data (e.g., primary data) prior to reverting data to a previous state using point-in-time data.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: May 2, 2023
    Assignee: Commvault Systems, Inc.
    Inventors: Duncan Alden Littlefield, Vimal Kumar Nallathambi, Girish Chanchlani
  • Patent number: 11625179
    Abstract: A cache storage system indexing method is provided that indexes a data address in a cache storage system based on a data fingerprint of the cached data, wherein the data fingerprint is generated by a deduplication fingerprint function used for referencing deduplication of data in the cache storage system. A computer-implemented method of data operations to a cache storage system is also provided including: obtaining a data fingerprint for the data of the data operation, either by applying a deduplication fingerprinting function to data of a write operation or by accessing deduplication metadata for a read operation to obtain the data fingerprint generated by using a deduplication fingerprinting function used for deduplication of data in the cache storage system; and using an indexing service to the cache storage system having an address schema based on the data fingerprints of the data.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: April 11, 2023
    Assignee: International Business Machines Corporation
    Inventors: Lee Jason Sanders, Ben Sasson, Gordon Douglas Hutchison
  • Patent number: 11620079
    Abstract: A storage system includes a controller and block-based storage device(s) that include LSA blocks arranged as a log structured array (LSA). The controller creates a first and second LUN, each including LBA locations. The controller assigns the first LUN to a first host and the second LUN to a second host, accumulates first host data associated with a first LBA location of the first LUN, writes a block-size worth of such data to a first LSA block, and maps the first LBA location to the first LSA block. In response to receiving an ODX Copy Offload instruction, the controller determines the first host data should be migrated to a target LBA location in the second LUN, determines the first and second LUN are exclusively mappable to the same LSA, maps the target LBA location to the first LSA block, and unmaps the first LBA location from the first LSA block.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: April 4, 2023
    Assignee: International Business Machines Corporation
    Inventors: Wendy Lyn Henson, Robert E. Jose, Kushal S. Patel, Sarvesh S. Patel
  • Patent number: 11620051
    Abstract: A system and method for encoding data using a plurality of encoding libraries. Portions of the data are encoded by different encoding libraries, depending on which library provides the greatest compaction for a given portion of the data. This methodology not only provides substantial improvements in data compaction over use of a single data compaction algorithm with the highest average compaction, but provides substantial additional security in that multiple decoding libraries must be used to decode the data. In some embodiments, each portion of data may further be encoded using different sourceblock sizes, providing further security enhancements as decoding requires multiple decoding libraries and knowledge of the sourceblock size used for each portion of the data. In some embodiments, encoding libraries may be randomly or pseudo-randomly rotated to provide additional security.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: April 4, 2023
    Assignee: ATOMBEAM TECHNOLOGIES INC.
    Inventors: Joshua Cooper, Aliasghar Riahi, Mojgan Haddad, Ryan Kourosh Riahi, Razmin Riahi, Charles Yeomans
  • Patent number: 11609881
    Abstract: A system and method for file type identification involving extraction of a file-print of a file, the file-print being a unique or practically-unique representation of statistical characteristics associated with the distribution of bits in the binary contents of the file, similar to a fingerprint. The file-print is then passed to a machine learning algorithm that has been trained to recognize file types from their file-prints. The machine learning algorithm returns a predicted file type and, in some cases, a probability of correctness of the prediction. The file may then be encoded using an encoding algorithm chosen based on the predicted file type.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: March 21, 2023
    Assignee: ATOMBEAM TECHNOLOGIES INC
    Inventors: Joshua Cooper, Aliasghar Riahi, Mojgan Haddad, Ryan Kourosh Riahi, Razmin Riahi, Charles Yeomans