Abstract: An integrated variable voltage diode capacitor topology applied to a circuit providing a variable voltage load for controlling variable capacitance. The topology includes a first pair of anti-series varactor diodes, wherein the diode power-law exponent n for the first pair of anti-series varactor diodes in the circuit is equal or greater than 0.5, and the first pair of anti-series varactor diodes have an unequal size ratio that is set to control third-order distortion. The topology also includes a center tap between the first pair anti-series varactor diodes for application of the variable voltage load. In preferred embodiments, a second pair of anti-series varactor diodes is arranged anti-parallel to the first pair of anti-series varactor diodes so the combination of the first pair of anti-series varactor diodes and the second pair of anti-series varactor diodes control second-order distortion as well.

Abstract: A semiconductor device in the present invention comprises pair transistors composed of a first transistor and a second transistor. The pair transistors are arrayed in a repeating pattern in the row direction. The first transistor and the second transistor are mutually related to each other so that the drain of one transistor is connected to the gate of the other transistor. The gate of the first transistor and the gate of the second transistor are offset in the row direction. The first transistor and the second transistor are in a diagonal positional relationship.

Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.

Abstract: Increasing the input common-mode range of a circuit which accepts differential signals as inputs. Such an increase may be attained by correcting an input signal at continuous levels or at 2 or more discrete levels) without changing the strength represented by the input signal. In an embodiment, the common-mode component of an input signal is measured, and a correction voltage proportional to the difference between the measured common-mode component and a reference voltage, is generated. The correction voltage is coupled to the input terminals of the differential circuit to correct for any deviations from a desired level of common-mode voltage at the input terminals of the differential circuit. The approaches are applied to a switched-capacitor differential amplifier used in a sample-and-hold portion of an ADC.

Abstract: A solid-state imaging device comprises a solid-state imaging element including a photo-reception portion and electrode pads, and optical glass bonded onto the solid-state imaging element through a bonding layer, wherein penetrating electrodes which reach the rear face of the solid-state imaging element are formed below the electrode pads of the solid-state imaging element.

Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.

Abstract: A bipolar device is integrated in an active layer, wherein delimitation trenches surround respective active areas housing bipolar transistors of complementary types. Each active area accommodates a buried layer; a well region extending on top of the buried layer; a top sinker region extending between the surface of the device and the well region; a buried collector region extending on top of the well region and laterally with respect to the top sinker region; a base region, extending on top of the buried collector region laterally with respect to the top sinker region; and an emitter region extending inside the base region. The homologous regions of the complementary transistors have a similar doping level, being obtained by ion-implantation of epitaxial layers wherein the concentration of dopant added during the growth is very low, possibly zero.

Abstract: A method and circuit are provided wherein the magnitude of an RF signal provided by RF circuit is used to derive a control set point of the RF circuit via an intermediate controller circuit. This controller circuit having the specific function of providing the actual voltage applied to the control point of the RF circuit, via the use of a charge pump, regulator or combination thereof. In this manner the controller limits the maximum applicable voltage set by the limiting characteristics of the charge pump, voltage regulator, or combination thereof. Such limiting characteristics allow the control of the RF circuit to be stabilized against a variety of external factors such as ambient temperature, battery voltage, circuit aging, amongst other factors in a manner exploiting a minimum of additional electronics thereby providing for such performance enhancements with minimum additional die footprint and power consumption.

Abstract: The subject invention pertains to a piezoelectric device structure for improved acoustic wave sensing and/or generation, and process for making same. The piezoelectric thin film field effect transducer can be a thin film transistor (TFT) with either a piezoelectric film gate or a composite gate having a dielectric film and a piezoelectric film. The TFT structure can be either a top gate device or a bottom gate device. In an embodiment, the piezoelectric device structure can be used to form an array of piezoelectric thin film field effect transducers. A TFT switch can drive each piezoelectric transducer in the array. The piezoelectric transducers can both generate and sense acoustic waves. In a sensing mode, a signal from an acoustic wave can be collected at a readout terminal of the piezoelectric transducer. In a generating mode, an excitation signal can be applied across the piezoelectric transducer while the switch is ‘on’.

Abstract: Apparatus for suppressing noise and electromagnetic coupling in the printed circuit board of an electronic device includes an upper conductive plate and an array of conductive coplanar patches positioned a distance t2 from the upper conductive plate. The distance t2 is chosen to optimize capacitance between the conductive coplanar patches and the upper conductive plate for suppression of noise or electromagnetic coupling. The apparatus further includes a lower conductive plate a distance t1 from the array of conductive coplanar patches and conductive rods extending from respective patches to the lower conductive plate.

Abstract: Considering further promotion of high output and miniaturization of a sensor element, it is an object of the present invention to form a plurality of elements in a limited area so that an area occupied by the element is reduced for integration. It is another object to provide a process which improves the yield of a sensor element. According to the present invention, a sensor element using an amorphous silicon film and an output amplifier circuit constituted by a thin film transistor are formed over a substrate having an insulating surface. In addition, a metal layer for protecting an exposed wire when a photoelectric conversion layer of the sensor element is patterned is provided between the photoelectric conversion layer and the wire connected to the thin film transistor.

Abstract: A differential amplifier, which has good linearity and noise performance, includes a first side that includes first, second, third, and fourth transistors and an inductor. The first and second transistors are coupled as a first cascode pair, and the third and fourth transistors are coupled as a second cascode pair. The third transistor has its gate coupled to the source of the second transistor, and the fourth transistor has its drain coupled to the drain of the second transistor. The first transistor provides signal amplification. The second transistor provides load isolation and generates an intermediate signal for the third transistor. The third transistor generates distortion components used to cancel third order distortion component generated by the first transistor. The inductor provides source degeneration for the first transistor and improves distortion cancellation. The sizes of the second and third transistors are selected to reduce gain loss and achieve good linearity for the amplifier.

Abstract: An operational amplifier and a method for amplifying a signal. Embodiments provide a convenient and effective mechanism for reducing die area, design time and design verification time by sharing compensation components between the common-mode and differential feedback networks of the operational amplifier. As such, fewer compensation components are required, thereby reducing component die area. Additionally, given that the compensation components are shared between the common-mode and differential feedback networks, the feedback networks can be stabilized together with fewer compensation components to specify and verify, thereby reducing design and design verification time. Further, embodiments provide a compensation component coupling which does not couple directly to virtual ground, thereby reducing the noise of the operational amplifier.

Abstract: A solid-state image sensor capable of improving detection sensitivity for an output signal is provided. This solid-state image sensor comprises a first gate electrode formed on a semiconductor substrate, a first impurity region formed on the semiconductor substrate at a first distance from the first gate electrode for receiving the signal charges and a second gate electrode formed at a second distance from the first impurity region for discharging unnecessary signal charges after extraction of a voltage signal from the first impurity region. The first distance between the first impurity region and the first gate electrode is larger than the second distance between the first impurity region and the second gate electrode.

Abstract: An on-chip inductor structure for a DC-DC power regulator circuit merges the switching transistor metallization with the inductor. Thick top level conductor metal that is used to strap the transistor array and to lower its on-state resistance is also used to extend the power inductor into the transistor array. Thus, the structure includes three basic components: a power inductor that spirals around the transistor array, the transistor array itself, and the transistor array metallization that is used to form a distributed inductance situated over the transistor array.

Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.

Abstract: A semiconductor device includes a first transistor unit including first field effect transistors with first gate electrodes electrically connected together, first sources electrically connected together, and first drains electrically connected together, the first gate electrodes being electrically connected to the first drains, a second transistor unit including second field effect transistors with second gate electrodes electrically connected together, second sources electrically connected together, and second drains electrically connected together, the second gate electrodes being electrically connected to the first gate electrodes, and dummy gate electrodes electrically isolated from the first gate electrodes and the second gate electrodes. The first gate electrodes, the second gate electrodes, and the dummy gate electrodes are arranged parallel to one another, and at least one dummy gate electrode is located between any one of the first gate electrodes and any one of the second gate electrodes.

Abstract: There is provided an amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output. The amplifier includes a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits; a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line of an electrical length other than ?/4. The second amplifying device is connected to the summing node via an output matching circuit and a second impedance transformer containing a transmission line.

Abstract: Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function.

Abstract: An integrated circuit device includes a high-speed I/F circuit block which transfers data through a serial bus, and a driver logic circuit block which generates a display control signal. A first-conductivity-type transistor included in the high-speed I/F circuit block is formed in a second-conductivity-type well, and a second-conductivity-type transistor included in the high-speed I/F circuit block is formed in a first-conductivity-type well formed in a second-conductivity-type substrate to enclose the second-conductivity-type well. A first-conductivity-type transistor and a second-conductivity-type transistor included in the driver logic circuit block are formed in a region other than a region of the first-conductivity-type well for the high-speed interface circuit block.