Patents Examined by Michael Krofcheck
  • Patent number: 10067874
    Abstract: It is determined that a cache operation relating to the transfer of data between a cache memory and a data storage system is required. A state of a utilization model is received, the utilization model including requirements for utilization of resources of the data storage system over a time period, and the state indicating a cost of resource utilization associated with cache operations in the current time period. It is determined whether to perform the cache operation, based on the utilization requirements and the state of a utilization model. If the cache operation is not to be performed, and if the cache operation is a write operation, it is determined whether the cache memory is full. If so, the cache operation is managed according to an emergency cache management process; if not, the data associated with the cache operation is maintained in the cache memory.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: John P. Agombar, Ian Boden, Gordon D. Hutchison, Lee J. Sanders
  • Patent number: 10042867
    Abstract: A method is provided to integrate a ticketing system into a storage management system. In such method, tickets are opened and translated to a set of recommended operations automatically, notifying and showing to a storage administrator the recommended operations as a set of actions and forms. The storage administrator is offered the ability including changing a step of the set of actions and re-ordering the set of actions.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Barak Davidov, Rotem Klein, Nadav Parag, Avraham S. Sabzerou, Moshe Weiss
  • Patent number: 10042565
    Abstract: A computer-implemented method for storing and caching data in an all-flash-array includes erasing a TLC-NAND flash cell and programming the cell with a binary value multiple times in sequence corresponding to multiple sequential stages between erasures. The method also includes processing the binary value in relation to a respective threshold voltage at each of the multiple sequential stages. The method further includes storing metadata corresponding to a current stage associated with the number of times the TLC-NAND flash cell has been programmed since being erased.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: August 7, 2018
    Assignee: Futurewei Technologies, Inc.
    Inventor: Xiaobing Lee
  • Patent number: 10037142
    Abstract: Various embodiments of a tape storage system having a physical control unit configured to support multiple logical control units are provided. Each logical control unit supports communication with a single tape drive model type up to a maximum number of drives. A customer obtains a number N of logical control units through purchase, lease or other legitimate avenues. Based on the number of tape drive model types L and the number of tape drives for each type QL, the model types are mapped to the N LCUs. In general, mapping priority is given to the newer generation model types and the model types in which the number of attached tape drives QL exceeds the capacity M of a single LCU.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joel K. Lyman, Arthur W. Stillwell, Spencer G. Mower
  • Patent number: 10025511
    Abstract: Sorting and storing a dataset, the dataset comprising at least one attribute. The method includes defining a set of data blocks and assigning to each data block a predefined maximum number of entries or a predefined maximum amount of storage, dividing the dataset into a sequence of multiple sub-datasets each having one value or a range of values of the attribute, wherein each pair of successive sub-datasets of the sequence are non-overlapping or overlapping at their respective extremum value of the attribute, for each sub-dataset of the multiple sub-datasets: in case the sub-dataset fully or partially fits into a data block of the defined data blocks storing the sub-dataset into at least the data block, the sub-dataset that partially fits into the data block comprising a number of entries that is smaller than a predefined maximum threshold.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: July 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Thomas F. Boehme, Andreas Brodt, Namik Hrle, Oliver Schiller
  • Patent number: 10025509
    Abstract: Described is a technology by which a virtual hard disk is migrated from a source storage location to a target storage location without needing any shared physical storage, in which a machine may continue to use the virtual hard disk during migration. This facilitates use the virtual hard disk in conjunction with live-migrating a virtual machine. Virtual hard disk migration may occur fully before or after the virtual machine is migrated to the target host, or partially before and partially after virtual machine migration. Background copying, sending of write-through data, and/or servicing read requests may be used in the migration. Also described is throttling data writes and/or data communication to manage the migration of the virtual hard disk.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: July 17, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dustin L. Green, Jacob K. Oshins, Lars Reuther
  • Patent number: 10013196
    Abstract: Described are techniques for provisioning storage for a logical device including receiving at least one capability profile identifying a first set of storage resource configurations; receiving a request to provision storage for the logical device, the request including a policy profile identifying a second set storage resource configurations; determining a third set of zero or more storage resource configurations, the third set being a set intersection of the first set and the second set; determining whether the third set includes at least one storage resource configuration; and if it is determined that the third set includes at least one storage resource configuration, selecting one of the storage resource configurations of the third set and provisioning storage of the logical device in accordance with the selected storage resource configuration of the third set.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: July 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Dmitry Nikolayevich Tylik, Sergey Alexandrovich Alexeev, Alexey Vladimirovich Shusharin
  • Patent number: 9997246
    Abstract: Methods including performing an access operation on a memory device using trims corresponding to trim settings, receiving a command to suspend the access operation, loading updated trim settings into a particular trim register of the memory device, setting updated trims for the access operation in response to the updated trim settings of the particular trim register, and resuming the access operation using the updated trims. Apparatus including an external controller and a memory device having an internal controller configured to set trims in response to trim settings and to perform an access operation on an array of memory cells using the trims in response to receiving the access command, wherein the external controller is configured to select trim settings corresponding to a desired mode of operation, and to transmit the selected trim settings to the memory device.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: June 12, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Terry Grunzke
  • Patent number: 9977733
    Abstract: When a data utilization ratio R which is a utilization ratio of sectors in one page is not lower than a threshold value Rth1 and when write data is not frequently-rewritten data, a flash memory is controlled such that the write data is stored into the flash memory. When the data utilization ratio R which is the utilization ratio of sectors in one page is lower than the threshold value Rth1 or when the write data is frequently-rewritten data although the data utilization ratio R is not lower than the threshold value Rth1, a ReRAM is controlled such that the write data is stored into the ReRAM. This suppresses deterioration of the flash memory.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: May 22, 2018
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Ken Takeuchi, Kousuke Miyaji, Koh Johguchi, Hiroki Fujii
  • Patent number: 9965218
    Abstract: Described are techniques for processing service level objectives. A first service level objective specified for a storage group of devices may include a first value denoting a first target level of performance for I/O operations. A second service level objective specified for a first portion of the storage group may include a second value denoting a second target level of performance for I/O operations directed to the first portion. The second value may denote a higher level of performance than the first value. It may be determined whether there is a violation of any of the first service level objective and the second level objective. Responsive to determining there is the violation of any of the first service level objective and the second level objective, one or more data movements in accordance with the violation may be performed.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: May 8, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Owen Martin, Malak Alshawabkeh, Hui Wang, Xiaomei Liu, Sean C. Dolan, Adnan Sahin
  • Patent number: 9959049
    Abstract: Techniques for aggregating background processing in a data storage system. Blocks are identified having contents on which a data operation was not performed in-line. The background data operation is prevented for blocks that will no longer be accessed by the host computer because they are only mapped to files implementing data objects that are scheduled for future deletion. A region of blocks may be selected that meets a criteria for performing a background free space operation, and the background data operation may be performed on the contents of blocks in the selected region while the contents of those blocks are being relocated to other blocks while performing the background free space operation. While performing the background data operation, blocks may be freed from files that implement data objects scheduled for future deletion.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: May 1, 2018
    Assignee: EMC IP Holding Company LLC
    Inventor: Philippe Armangau
  • Patent number: 9959060
    Abstract: A plurality of traffic profiles is determined for a plurality of traffic groups where each traffic profile includes a share of traffic and an address footprint size associated with a corresponding traffic group. A host write is received from a host and the traffic group that the host write belongs to is identified. Write data associated with the host write is stored in the solid state storage allocated to the traffic group that the host write is identified as belonging to where the amount of solid state storage allocated to each of the plurality of traffic groups is based at least in part on the traffic profile of a given traffic group.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: May 1, 2018
    Assignee: SK Hynix Inc.
    Inventors: Xiangyu Tang, Lingqi Zeng
  • Patent number: 9952971
    Abstract: Systems and methods that aggregate memory capacity of multiple computers into a single unified cache, via a layering arrangement. Such layering arrangement is scalable to a plurality of machines and includes a data manager component, an object manager component and a distributed object manager component, which can be implemented in a modular fashion. Moreover, the layering arrangement can provide for an explicit cache tier (e.g., cache-aside architecture) that applications are aware about, wherein decision are made explicitly which objects to put/remove in such applications (as opposed to an implicit cache wherein application do not know the existence of the cache).
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: April 24, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Muralidhar Krishnaprasad, Anil K. Nori, Subramanian Muralidhar
  • Patent number: 9952974
    Abstract: A dual-server based storage system maintains a first cache and a first non-volatile storage (NVS) in a first server, and a second cache and a second NVS in a second server, where data in the first cache is also written in the second NVS and data in the second cache is also written in the first NVS. In response to a failure of the first server, a determination is made as to whether space exists in the second NVS to accommodate the data stored in the second cache. In response to determining that space exists in the second NVS to accommodate the data stored in the second cache, the data is transferred from the second cache to the second NVS.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: April 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 9952940
    Abstract: Operating a shared nothing cluster system (SNCS) in order to perform a backup of a data element. The SNCS includes at least a first and a second storage node connected via a first network of the SNCS. The first and second storage nodes are configured to store a first set and a second set of blocks, respectively, in which the first and second set of blocks form a single data element. A backup server is connected to the first and second storage nodes, and the backup server includes a backup information table. The first and second storage nodes are configured to act as backup clients in a client-server configuration involving the backup server, upon receiving at the first and the second storage nodes a request to backup the data element. For each node of the first and second storage nodes, the node identifies one or more block sequences of consecutive blocks in a set of blocks of the data element stored in the node.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Christian Bolik, Nils Haustein, Dominic Mueller-Wicke, Thomas Schreiber
  • Patent number: 9946658
    Abstract: An improved memory interface design is provided. In some implementations, an integrated circuit includes a first cache memory unit, a second cache memory unit located in parallel with the first cache memory unit, and a floorsweeping module configured to be able to select between the first cache memory unit and the second cache memory unit for cache requests, wherein the selection is based at least partially on the presence or absence of one or more manufacturing defects in the first cache memory unit or the second cache memory unit.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: April 17, 2018
    Assignee: NVIDIA Corporation
    Inventors: Michael Asbury Woodmansee, J. Arjun Prabhu
  • Patent number: 9940243
    Abstract: In order to optimize efficiency of deserialization, a serialization cache is maintained at an object server. The serialization cache is maintained in conjunction with an object cache and stores serialized forms of objects cached within the object cache. When an inbound request is received, a serialized object received in the request is compared to the serialization cache. If the serialized byte stream is present in the serialization cache, then the equivalent object is retrieved from the object cache, thereby avoiding deserialization of the received serialized object. If the serialized byte stream is not present in the serialization cache, then the serialized byte stream is deserialized, the deserialized object is cached in the object cache, and the serialized object is cached in the serialization cache.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: April 10, 2018
    Assignee: RED HAT, INC.
    Inventors: Deren George Ebdon, Robert W. Peterson
  • Patent number: 9933943
    Abstract: A tape storage system having a physical control unit configured to support multiple logical control units is provided. Each logical control unit supports communication with a single tape drive model type up to a maximum number of drives. A customer obtains a number N of logical control units through purchase, lease or other legitimate avenues. Based on the number of tape drive model types L and the number of tape drives for each type QL, the model types are mapped to the N LCUs. In general, mapping priority is given to the newer generation model types and the model types in which the number of attached tape drives QL exceeds the capacity M of a single LCU. An exception being that the oldest model type is ensured a mapping to an LCU. The LCUs may be reconfigured and the model types remapped on the physical CU if the customer adds different model types to the storage system or obtains a different number of LCUs.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joel K. Lyman, Spencer G. Mower, Arthur W. Stillwell
  • Patent number: 9904567
    Abstract: A hypervisor identifies a set of pages to be polled for updates made by a guest operating system, each page having a write protection attribute that causes an exit to a hypervisor upon a guest operating system attempt to update a corresponding page. The hypervisor modifies the write protection attribute for each page of the set of pages to avoid the exit to the hypervisor upon the guest attempt to update the corresponding page. The hypervisor then initiates polling of the set of pages to detect updated pages, wherein detecting updated pages comprises detecting a status indicator set to a first value. The hypervisor then logs a modification of each updated page, and resets the status indicator to a second value to indicate that the modification to each updated page has been logged.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: February 27, 2018
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 9875031
    Abstract: Data is received for storage in at least one memory of a Data Storage Device (DSD) and metadata associated with the received data is generated. The received data and the generated metadata are stored in the at least one memory and the retention of the received data is managed based on the generated metadata.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 23, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert L. Horn