Abstract: A multilayer ceramic capacitor includes a ceramic body including a dielectric layer, a first internal electrode and a second internal electrode, disposed to oppose each other with the dielectric layer interposed therebetween, and a first external electrode and a second external electrode. The ceramic body further includes first and second margin portions and first and second cover portions, disposed on upper and lower surfaces of a capacitance formation portion and the first and second margin portions, respectively. The first and second cover portions each include a first cover layer adjacent to an internal electrode, disposed on an outermost side among the first and second internal electrodes, and a second cover layer disposed on the first cover layer, and an interface at which the first cover layer and the second cover layer are in contact with each other.

Abstract: A dielectric composition includes a dielectric grain including a perovskite compound and a first segregation phase including at least Ca, Al, Si, and O.

Abstract: A capacitor component includes a body, including a dielectric layer and an internal electrode layer, and an external electrode disposed on the body and connected to the internal electrode layer. The internal electrode layer includes zirconium (Zr) and germanium (Ge). A ratio of a sum of contents (at %) of zirconium (Zr) and germanium (Ge), contained in the internal electrode layer, to an entirety of the internal electrode layer is 3.3 at % or more to 3.7 at % or less.

Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.

Abstract: An electronic device including a shield structure is provided. The electronic device includes a first device including a first magnetic substance, a second device including a second magnetic substance, and a shield structure configured to shield at least part of a magnetic force generated between the first magnetic substance and the second magnetic substance, wherein the shield structure includes a shield member disposed between the first device and the second device and including a property of a magnetic substance, and a connecting member physically connected to at least part of the shield member and including a property of a nonmagnetic substance, wherein at least part of the connecting member is physically connected to a circuit board.

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, base electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers and each including glass and copper, and plated layers respectively provided on an outer side of the base electrode layers. A protective layer including sulfur is provided between the glass included in the base electrode layers and the plated layers.

Abstract: An electric connection member comprises a conductive member, a fixing member which brings the conductive member into contact with a connection target member and holds the conductive member in a state of compression in a thickness direction Z. The conductive member has a compressive stress of 1.0 N/mm2 or more and 15.0 N/mm2 or less when compressed by 25% in the thickness direction. The fixing member has an elongation of 400 ?m or less when drawn at 96 kPa for 30 minutes in a direction along the thickness direction Z.

Abstract: A ceramic electronic device includes a plurality of dielectric layers of which a main component is a ceramic having a perovskite structure, and a plurality of internal electrode layers, each of which is stacked through each of the plurality of dielectric layers and includes a co-material which is inactive against the main component of the plurality of dielectric layers.

Abstract: A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Au. Each of the plurality of internal electrode layers includes an Au-containing layer of which an Au concentration with respect to all detected elements is 5 at % or more, on an interface between the each of the plurality of internal electrode layers and a dielectric layer next to the each of the plurality of internal electrode layers. A relationship of C?500×t/T is satisfied when a thickness of the each of the plurality of internal electrode layers is T nm, a thickness of the Au-containing layer is t nm, and an Au concentration with respect to a total of Ni and Au in a whole of the each of the plurality of internal electrode layers is C at %.

Abstract: A hybrid polymer aluminum electrolytic capacitor and a method for manufacturing a capacitor are disclosed. In an embodiment a method for manufacturing a capacitor includes winding an anode foil, separators and a cathode foil around an axis to form a winding element, flooding the winding element with a polymer dispersion, wherein the polymer dispersion contains electrically conductive solid polymer particles or a polymer powder and a solvent and applying pulses of overpressure to the flooded winding element.

Abstract: A capacitor component includes a body including a dielectric layer and an internal electrode layer; and an external electrode disposed on one surface of the body, wherein the external electrode includes first electrode layers disposed on the one surface of the body to be spaced apart from each other, and covering a region of the one surface of the body through which the internal electrode layer is exposed; a second electrode layer including a base resin and a conductive connection portion disposed in the base resin, and disposed on the one surface of the body to cover the first electrode layers; and an intermetallic compound disposed only between each of the first electrode layers and the second electrode layer.

Abstract: An electronic component includes a laminate in which first internal electrodes and second internal electrodes are alternately laminated in a lamination direction with dielectric layers interposed therebetween, the laminate including a first main surface and a second main surface opposite to each other in the lamination direction, a first side surface and a second side surface opposite to each other in a width direction, and a first end surface and a second end surface opposite to each other in a length direction, a first external electrode provided on a surface of the laminate and electrically connected to the first internal electrodes, a second external electrode provided on a surface of the laminate and electrically connected to the second internal electrodes, and side margin portions each including a dielectric including Ca, Zr, and Ti.

Abstract: A ceramic electronic component including: a ceramic element body including an end surface extending along a first axis, and a side surface extending along a second axis and intersecting the end surface; an end-face electrode formed on the end surface of the ceramic element body; and a lead terminal connected to the end-face electrode by soldering. The lead terminal includes: an adjacent part overlapping the end-face electrode in a side view from the second axis; and an extension part extending from an end of the adjacent part in a direction away from a plane including the side surface. A first recess is formed at the extension part and is recessed in a direction away from a plane including the end surface, and the first recess exists at a position close to the end of the adjacent part.

Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including dielectric layers and internal electrode layers alternately laminated therein, two outer layer portions respectively provided on both sides of the inner layer portion in a lamination direction, and two side gap portions respectively provided on both side surfaces of the inner layer portion and the outer layer portions, in a width direction intersecting the lamination direction, and external electrodes respectively provided on both end surfaces of the multilayer body in a length direction intersecting the lamination direction and the width direction, and each connected to the internal electrode layers, wherein nickel and magnesium are segregated between the side gap portions and the outer layer portions.

Abstract: A film capacitor that includes: a dielectric resin film; and a metal layer on at least one surface of the dielectric resin film. The dielectric resin film contains at least one skeleton selected from the group consisting of a biphenyl skeleton, a bisphenol acetophenone skeleton, a bisphenol fluorene skeleton, a bisphenol S skeleton, a bisphenol cyclohexanone skeleton, and an epoxy-modified bisphenol A skeleton.

Abstract: A multilayer ceramic capacitor includes a base body including first and second main surfaces, first and second side surfaces, first and second end surfaces, and dielectric layers and internal electrode layers, and external electrodes at the first and second end surfaces, and electrically connected to the internal electrode layers. The base body includes an inner layer, first and second outer layers, first and second side margin portions. The dielectric layers in the inner layer and the first and second outer layers include main crystal grains including barium and titanium, and with respect to 100 parts by mol of titanium, nickel in an amount of about 0.2 to about 3.0 parts by mol, and at least one rare earth element selected from yttrium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium in an amount of about 0.6 parts to about 2.0 parts by mol.

Abstract: The present invention discloses a dielectric ceramic formula enabling one to obtain a multilayer ceramic capacitor by alternatively stacking the ceramic dielectric layers and base metal internal electrodes. The dielectric ceramic composition comprises a primary ingredient: [(Na1-xKx)sA1-s]m[(Nb1-yTay)uB1vB2w)]O3 wherein: A, B1, B2, x, y, s, u, v, w and m are defined.

Abstract: A multilayer electronic component includes: a body including dielectric layers; side margin portions disposed on side surfaces of the body, respectively; and external electrodes disposed on end surfaces of the body, respectively. The body includes a capacitance forming portion including internal electrodes disposed alternately with the dielectric layers and cover portions disposed on upper and lower surfaces of the capacitance forming portion, respectively. Ga2/Ga1 is 0.8 or more and less than 1.0 and Ga2/Gc1 is 0.8 or more and less than 1.0. a1 is a central portion of the capacitance forming portion, a2 is a boundary portion between the capacitance forming portion and the cover portion in the capacitance forming portion, and c1 is a boundary portion between the capacitance forming portion and the cover portion in the cover portion. Ga1, Ga2, and Gc1 are average sizes of dielectric grains at a1, a2, and c1, respectively.

Abstract: A mounting structure of a multilayer ceramic capacitor includes a substrate, and a multilayer ceramic capacitor connected to the substrate and including a laminate including dielectric layers and internal electrode layers, and external electrodes on main surfaces of the laminate. The laminate further includes first, second, third, and fourth via conductors connecting the internal electrode layers and the external electrodes. The external electrodes include first, second, third, and fourth external electrodes, each connected to respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less.

Abstract: A flexible circuit board and an electronic device including a flexible circuit board are provided. The flexible circuit board may include a substrate having a bending area and a non-bending area, a wiring pattern layer provided on the bending area and the non-bending area, a plating layer provided on the wiring pattern layer and including an open area in an area corresponding to the bending area, and a protective layer that directly contacts one surface of the wiring pattern layer exposed at the open area and a side surface of the plating layer. The protective layer may have a larger thickness than a thickness of the plating layer.