Abstract: A pixel circuit includes a first transistor, a second transistor for applying a data voltage to the first transistor, a third transistor for diode-connecting the first transistor, a fourth transistor for applying a first power voltage to a first electrode of the first transistor, a fifth transistor for connecting a second electrode of the first transistor and a fourth node, a sixth transistor for applying an initialization voltage, a seventh transistor, an eighth transistor for applying the data voltage to a fifth node in response to a second scan signal, a tenth transistor for applying a second power voltage to the fifth node, a twelfth transistor for applying the initialization voltage to the fourth node and a light emitting element. A sweep signal is applied to a control electrode of the first transistor, and the sweep signal is a global signal which has same timing across at least two pixel-rows.

Abstract: A method for generating bistable ferroelectric liquid crystal drive signals may include storing, by an array of latches, colorfield data. The method may additionally include manipulating, by the array of latches and in response to a plurality of clock signals that include one or more outputs of the array of latches, the colorfield data. The method may also include providing, by one or more gates, one or more internal drive signals by comparing the one or more outputs of the array of latches. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A method for correcting dimensional distortion when viewing a display at an angle is disclosed. In one embodiment, such a method identifies a line of sight of a user relative to a display. The method determines an angle of the line of sight relative to the display and a displacement of the user relative to the display. Using the angle and the displacement, the method determines an adjustment needed to reduce dimensional distortion of content on the display caused by the angle and the displacement. The method applies the adjustment to the content. In certain embodiments, applying the adjustment includes one or more of altering a size of the content on the display, altering proportions of the content on the display, and altering an orientation of the content on the display. A corresponding system and computer program product are also disclosed.

Abstract: A control method includes following operations: outputting a first control signal to a first switch coupled to a first sub-pixel of a display panel; outputting a second control signal to a second switch coupled to a second sub-pixel of the display panel; and outputting a driving voltage of display data according to a data output enable signal. The data output enable signal has a plurality of pulses, and a first time interval between a first pulse of the plurality of pulses and a second pulse of the plurality of pulses is shorter than a second time interval between the second pulse of the plurality of pulses and a third pulse of the plurality of pulses.

Abstract: In a voltage setting method of an electronic device, in which a plurality of sub-pixels are in a display device, and an anode initialization voltage applied to the plurality of sub-pixels is set, the voltage setting method includes: setting a data voltage for displaying an image having a black grayscale to an a-th level in the plurality of sub-pixels; applying the anode initialization voltage having a first level; determining whether a black floating phenomenon has been observed; decreasing the anode initialization voltage by a second level based on the black floating phenomenon being observed; applying the set anode initialization voltage; and writing a level of the set anode initialization voltage to the display device based on a determination that the black floating phenomenon has not been observed.

Abstract: A drive circuit, a display drive chip, a display apparatus, and an electronic apparatus are provided. The drive circuit includes a first stage circuit, a second stage circuit and an auxiliary circuit. The first stage circuit is configured to receive and amplify a first input signal and a second input signal to acquire a first output signal and a second output signal and output the first output signal and the second output signal to the second stage circuit. The second stage circuit is configured to output a third output signal based on the first output signal and the second output signal to drive a load. The second stage circuit is further connected to the first stage circuit via a Miller capacitor. The auxiliary circuit is connected to the first stage circuit and the second stage circuit for reducing an output impedance of the first stage circuit.

Abstract: The invention relates to an input device, in particular for an electronic unit, preferably for a game controller, comprising an actuation element for the actuation of the input device by a user, having an actuation section accessible from outside the input device, wherein the actuation element can be brought into multiple actuation positions, which define an actuation range, by the user. Here, the actuation element can be displaced into the actuation positions by displacement in one or more displacement directions, which in particular lie substantially in a displacement plane. The input device furthermore comprises electronic position detection means which directly or indirectly detect an instantaneous actuation position of the actuation element.

Abstract: A display device is disclosed that includes a display panel including a display area in which pixels are disposed and a non-display area surrounding the display area, a level shifter disposed at at least one side of the non-display area and configured to generate a gate clock signal and an inverted signal having and a phase opposite to that of the gate clock signal, a control signal line configured to transmit the gate clock signal output from the level shifter to the pixels, and an inverted signal line configured to receive the inverted signal from the level shifter, wherein the inverted signal line is disposed in a closed loop shape surrounding the display area in the non-display area.

Abstract: A gate signal masking circuit includes a first switching element including a control electrode connected to a masking control node, a first electrode connected to a first node and a second electrode connected to a control node, a second switching element including a control electrode connected to a second node, a first electrode receiving a first power and a second electrode connected to an intermediate node, a third switching element receiving an enable signal and connected to the intermediate node and a second intermediate node, a fourth switching element receiving the enable signal and connected to the second intermediate node and a third intermediate node, a fifth switching element connected to a third node and the third intermediate node and receiving a second power and a floating switching element receiving a floating control signal and connected to the masking control node and the third intermediate node.

Abstract: The application relates to a detection method and a debugging method for a display panel, and a display panel. The method includes: obtaining a first node voltage and a second node voltage corresponding to target color pixel circuits in a target pixel column; adjusting, based on the first node voltage and the second node voltage, a data voltage inputted to each target color pixel circuit in the target pixel column, so that preset voltages of a plurality of target color pixel circuits are the same, where the preset voltage is a difference between the data voltage inputted to the target color pixel circuit and a voltage at a connection node between the target color pixel circuit and a detection signal line; and detecting the plurality of target color pixel circuits in the target pixel column, to obtain detected data of each target color pixel circuit.

Abstract: A delay control circuit generates output timing signals that cause pixel drive signals to be output at timings after elapse of different delay times. The delay control circuit includes: first to sth delay timing signal generation circuits, generating first to kth delay timing signals that bring about output timings increasing in delay time; a control signal generation circuit, supplying a start pulse signal that initiates generation of the first to kth delay timing signals to the first to sth delay timing signal generation circuits; and a delay signal selection circuit, for each output channel with respect to first to sth delay timing signal groups each including the first to kth delay timing signals, selecting from among s delay timing signals the delay timing signal that brings about an earliest output timing, and setting the delay timing signals as the first to kth output timing signals.

Abstract: A display device comprises: a display panel including a display area and a bezel area around the display area; a gate driving circuit driving a plurality of gate lines in the display area; an output line extending from the gate driving circuit; a jumping part in the bezel area and connecting the output line with a gate line of the plurality of gate lines; an output transistor in the gate driving circuit and connected to the output line; an output capacitor in the gate driving circuit between the output transistor and the jumping part, the output capacitor including a first electrode connected to a gate electrode of the output transistor and a second electrode partially overlapping the first electrode and the second electrode connected to a drain electrode of the output transistor and the output line, the first electrode including an extension region non-overlapping with the second electrode.

Abstract: An electro-optical device includes a plurality of video signal lines and a plurality of pull-in video signal lines traversing a data line drive circuit. The pull-in video signal line includes a first pull-in video signal line having a shortest first wiring length and a second pull-in video signal line having a longest second wiring length. The video signal line includes a first video signal line electrically coupled to the first pull-in video signal line and a second video signal line electrically coupled to the second pull-in video signal line. A length from a first coupling point to one end of the first video signal line is a third wiring length. A length from the first coupling point to the other end of the first video signal line is a fourth wiring length.

Abstract: A laptop computer includes a display portion comprising a primary display and a base portion coupled to the display portion. The base portion includes a keyboard and a light-transmissive cover defining a first touch-sensitive input region along a first side of the keyboard and a second touch-sensitive input region along a second side of the keyboard. The base portion also includes a first display under the first touch-sensitive input region and a second display under the second touch-sensitive input region.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, and the pixel circuit provides a driving current for the light-emitting element. The display panel includes a power supply voltage terminal, and the power supply voltage terminal provides a power supply voltage signal for the pixel circuit. The display panel includes a light emission stage and a non-light emission stage. In the light emission stage, the power supply voltage terminal provides a first voltage V1, and in the non-light emission stage, the power supply voltage terminal provides a second voltage V2, V1?V2.

Abstract: A circuit includes: a receiving circuit, having a first input terminal for inputting a first signal transmitted via a first capacitive element, and a second input terminal for inputting a second signal transmitted via a second capacitive element and having a potential that changes complementarily to the first signal, and outputting a first logic signal corresponding to a potential of the first signal and a second logic signal corresponding to a potential of the second signal; and a signal supply circuit, supplying a first guarantee signal having a potential corresponding to a value of the first logic signal to the first input terminal as a signal for guaranteeing a potential of the first signal, and supplying a second guarantee signal having a potential that changes complementarily to the first guarantee signal to the second input terminal as a signal for guaranteeing a potential of the second signal.

Abstract: A display driving integrated circuit includes: a gamma voltage generator outputs a plurality of gamma voltages at a first voltage level based on a first control signal in a first time period among a plurality of time periods, outputs a plurality of gamma voltages at a second voltage level based on a second control signal in a second time period among the plurality of time periods, and outputs a reference voltage that swings between a third voltage level lower than the first voltage level and a fourth voltage level higher than the second voltage level in the plurality of time periods; and a source block circuit receives input data in response to a first clock signal in the first time period, selects a first gamma voltage among the plurality of gamma voltages of the first voltage level based on the input data, and compares the first gamma voltage and the reference voltage.

Abstract: An electronic apparatus includes a memory storing instructions and a processor configured to execute the instructions to identify a display environment of an image, correct characteristics of a test image provided to identify a user's visual perception for characteristics of the image to correspond to the identified display environment, display the test image having the corrected characteristics on a display, and correct the characteristics of the image based on the user's adjustment input for the characteristics of the displayed test image.

Abstract: A common electrode driver includes an operational amplifier, a resistor, one end of which is connected to an inverting input terminal of the operational amplifier and the other end of which is connected to an output terminal of the operational amplifier, and an adjustment circuit that is configured to be able to adjust an internal combined resistance value in accordance with an applied polarity inversion driving method. The combined resistance value obtained when a one-column inversion driving method is applied is caused to be smaller than the combined resistance value obtained when a two-column inversion driving method is applied.

Abstract: A display device including: a display panel that includes a plurality of blocks, wherein pixels are arranged in each block; and an afterimage compensation circuit configured to receive input image signals and generate compensation image signals by compensating the input image signals based on deterioration information for each of the plurality of blocks, and wherein the afterimage compensation circuit includes: a nonvolatile memory including a first storage area where deterioration data for each of the plurality of blocks is accumulated at each of a plurality of backup times in a preset backup period, and a second storage area where information about a final backup time among the backup times is stored; and a compensation unit configured to receive accumulated deterioration data stored in the first storage area as the deterioration information and to compensate the input image signals based on the accumulated deterioration data to generate the compensation image signals.