Abstract: Power conversion systems and a controller thereof include a processing system that generates inverter switching control signals at a switching frequency, and transitions the switching frequency from a starting frequency to a target frequency over an integer number N blocks. The individual blocks include an integer number M subblocks with a starting frequency subblock in which the processing system generates the switching control signals at the starting frequency, and a target frequency subblock in which the processing system generates the switching control signals at the target frequency. The processing system operates the inverter at multiple demanded voltage values for multiple characterized switching frequencies, measures and records a corresponding inverter output current value for each of the demanded voltage values, creates and stores a lookup table for adjusted demand voltages at each of the characterized switching frequencies, and operate the inverter according to the adjusted demand voltages.

Abstract: A power supply circuit and a photovoltaic power generation system comprising same. The power supply circuit utilizes the condition that a voltage output by discharge of a capacitor is a direct-current voltage which decreases with time, a CCFL conversion circuit is connected behind the capacitor, the CCFL conversion circuit converts the input direct-current voltage which decreases which time into a sinusoidal alternating-current for output. Since the CCFL conversion circuit operates in an open-loop mode, a peak-to-peak value of the sinusoidal alternating-current output by the CCFL conversion circuit is in direct proportion to an operating voltage of the CCFL conversion circuit, the voltage decreases with time, that is, the peak-to-peak valve of the sinusoidal alternating-current output by the CCFL conversion circuit decreases with time, thus, an effective value of the sinusoidal alternating-current decreases with time, and an attenuated sinusoidal alternating-current voltage is obtained.

Abstract: To improve control characteristics of an inverter while suppressing manufacturing cost. An inverter control device 10 is a device for controlling an inverter device 1 having a plurality of switching elements.

Abstract: Circuit comprising: a first switch (1S) having: a first side (FS) connected to an input node (IN); and a second side (SS); a first capacitor (FC) having: FS connected to SS of 1S; and SS; a second switch having: FS connected to SS of FC; and SS connected to a voltage level node; a third switch having: FS connected to SS of FC; and SS connected to a voltage output node; a fourth switch (4S) having: FS connected to IN; and SS; a second capacitor (SC) having: FS connected to SS of 4S; and SS; a fifth switch having: FS connected to SS of SC; and SS connected to the voltage level node; a sixth switch having: FS connected to SS of SC; and SS connected to the voltage output node; a first connection node connected to FS of FC; and a second connection node connected to FS of SC.

Abstract: A circuit for providing input surge protection in a digital input module, the circuit comprising a surge protection input stage, including a bridge rectifier coupled to receive the bidirectional input signal, and coupled to the unidirectional input of the digital input module. The bridge rectifier comprises TVS rectifiers TVS1 and TVS2, and diode rectifiers D2 and D3, intercoupled in a bridge rectifier configuration in which: TVS1 and TVS4 are transient voltage suppression diodes; and rectifiers D2 and D3 are rectifier diodes. Diodes TVS1 and TVS4 can be implemented as either respective unidirectional TVS diodes; or a single bidirectional TVS diode. The digital input module can be a digital input receiver, or a opto-isolator/coupler, or other digital input module.

Abstract: A linear regulator circuit having fast transient response includes an error amplifier (EA) circuit and an output stage circuit. The EA circuit amplifies a difference between a feedback signal and a reference signal to generate an error amplified signal. The output stage circuit includes at least one output power switch which is controlled by the error amplified signal to generate an output signal at an output node. The EA circuit includes at least one pre-stage amplifier circuit which includes a current source circuit, a differential input circuit, a first, a second and a third current mirror circuits and at least one feedback capacitor. One differential transistor of the differential input circuit, the first and the second current mirror circuit form a positive potential feedback (PPFB) loop. The feedback capacitor is coupled between the output node and at least one inverting node at the PPFB loop.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.

Abstract: A hybrid modular multilevel converter having fault blocking capability, and a control method thereof are disclosed. The hybrid modular multilevel converter has an ABC three-phase structure, each phase includes an identical upper arm and lower arm, and the upper arm and the lower arm are each composed of N submodules, including M unipolar full bridge submodules and N-M half bridge submodules, which are connected in series; two identical arm inductors are connected in series between a lower end of the upper arm and an upper end of the lower arm in a same phase; and upper arms and lower arms of three phases are connected in a staggered manner through six thyristor branches, the upper ends of the upper arms of the three phases are short-circuited and are connected to a DC side via a first isolating switch.

Abstract: A system and method of protecting the input components of a power supply. An input overcurrent protection module is provided, which may be implemented in firmware, which monitors the input current through an input interface of the power supply. When the input current exceeds a threshold current (i.e., a current above the maximum rating of an input component, such as an input cable), the input current protection module determines whether an input overcurrent event is occurring. When it is determined that an input overcurrent event has occurred, the input current protection module disables the output circuitry of the power supply and triggers a few timers. The input overcurrent protection module continues to monitor the input and, if the input current continues to exceed the threshold current, is configured to shut down the power supply. In this way, input components may be protected from overcurrent issues in high-power systems.

Abstract: A CR snubber element includes a first resistance part, a first capacitance part, a second resistance part, and a second capacitance part. The first capacitance part is connected in series to the first resistance part. The second resistance part is connected in series to the first resistance part and the first capacitance part and the second capacitance part is connected in parallel to the second resistance part. The CR snubber element is configured such that the second resistance part is disconnected when the first capacitance part is short-circuited.

Abstract: A peak-buck peak-boost current mode control structure and scheme for a synchronous four-switch and non-synchronous two-switch buck-boost regulators sense input and output voltages to smoothly transition between buck mode, buck-boost mode, and boost mode for high power efficiency and low output ripples. With the inductor current sensing, the control scheme achieves the best performance in continuous conduction and discontinuous condition mode operations.

Abstract: A surge protection circuit includes: a power supply unit configured to supply first power, a filter unit configured to filter noise of the first power while a current corresponding to a surge flows through the filter unit, a motor unit provided with at least one motor, a control unit configured to control the motor unit according to an operation mode, and a rectification unit provided with at least one protection capacitor and configured to rectify the filtered first power into second power. The filter unit is connected with a ground to thereby apply the current to the filter unit through the ground. A first impedance is generated by the filter unit and the rectification unit and a second impedance is generated by the control unit and the motor unit and a value of the first impedance is less than a value of the second impedance.

Abstract: A zero-sequence current balancer for a controlling zero-sequence current in a three-phase power system includes a cascade multilevel modular inverter (CMMI) coupled to the three-phase power system, wherein the CMMI has a plurality of modules, each module having a module capacitor, and a real power injector circuit provided between the three-phase power system and the CMMI, wherein the real power injector circuit is structured and configured to cause real power to injected into and/or absorbed from the CMMI to regulate a voltage of one or more of the module capacitors.

Abstract: An example apparatus is for use with an electronic circuit breaker having a plurality of current paths connected between a connection terminal to a power source and a load terminal. The apparatus includes power access circuitry and control circuitry. The power access circuitry monitors circuit access of power via the power source by modulating use of the plurality of current paths of the electronic circuit breaker while assessing actual usage of the power source via a power-related parameter relative to expected usage of the power source. The control circuitry responds to the assessment by generating a signal indicative of a diagnostic result associated with operation of the electronic circuit breaker.

Abstract: A converter system includes a DC bus for each phase of an input AC power signal; a first switching cell for each phase, including first two active switches coupled in series across the DC bus and forming a first switching cell AC pole therebetween, the first switching cell AC pole being coupled to a respective phase; and a second switching cell for each phase, including second two active switches coupled in series across the DC bus and forming a second switching cell AC pole therebetween. The second switching cell AC poles are coupled to each other to form a flying neutral. One of the first switching cell and the second switching cell switches at a frequency at least an order of magnitude greater than the line frequency. The other of the first switching cell and the second switching cell switches at a frequency approximately equal to the line frequency.

Abstract: A device is for reactive power compensation in a high-voltage network having a phase conductor. The device has a first high-voltage terminal, which is configured to be connected to the phase conductor. For each first high-voltage terminal, a first and a second core section, which are part of a magnetic circuit, a first high-voltage winding, which encloses the first core section, and a second high-voltage winding are provided. Moreover, the device has a saturation switching branch, which saturates the core sections and has controllable power semiconductor switches. A control unit is used to control the power semiconductor switches. The first and the second high-voltage windings are connected by the high-voltage end to the associated first high-voltage terminal and on the low-voltage side can be connected to one or the saturation switching branch. To be able to be connected in series into the high-voltage network, a second high-voltage terminal is provided.

Abstract: Voltage reference with temperature compensation. At least one example embodiment is a method of producing a compensate voltage reference, the method comprising: driving a reference current through a reference current path of a current mirror, and driving a mirror current through a mirror current path of the current mirror; driving the reference current through a first reference transistor having a control input, and driving the mirror current though a second reference transistor having a control input; equalizing the reference current flow through the first reference transistor to the mirror current flow through the second reference transistor by adjusting a control voltage on the control inputs of the first and second reference transistors; producing a reference voltage proportional to the control voltage; and compensating the reference voltage for temperature effects by adjusting a mirror ratio of the current mirror.

Abstract: A voltage reference includes a flipped gate transistor configured to receive a first current. The voltage reference further includes a first transistor configured to receive a second current, the first transistor having a first leakage current, wherein the first transistor is connected with the flipped gate transistor in a Vgs subtractive arrangement. The voltage reference further includes an output node configured to output a reference voltage, the output node connected to the first transistor. The voltage reference further includes a second transistor connected to the output node, the second transistor having a second leakage current, wherein the first leakage current is substantially equal to the second leakage current.

Abstract: A first surge absorber has a low resistance when a surge voltage which is greater than or equal to a first operating voltage is applied to a power supply line, and has a high resistance when the surge voltage which is greater than or equal to the first operating voltage is not applied. A detector outputs a detection signal indicating that the surge voltage is greater than or equal to the first operating voltage when the surge voltage is greater than or equal to the first operating voltage. A second surge absorber becomes a low resistance when a surge voltage greater than or equal to a second operating voltage is applied, and becomes a high resistance when a surge voltage greater than or equal to the second operating voltage is not applied.

Abstract: A micro-electrical-mechanical system (MEMS) assembly includes a stationary stage, a rigid stage, at least one flexure configured to slidably couple the stationary stage and the rigid stage, at least one flexible electrode coupled and essentially orthogonal to one of the stationary stage and the rigid stage, and at least one rigid electrode coupled and essentially orthogonal to the other of the stationary stage and the rigid stage.