Patents Examined by Paul Dinh
  • Patent number: 11685280
    Abstract: A DC-DC converter includes an inverter converting a DC supply voltage to a time varying signal. A transformer has a primary winding coupled to the inverter through an LC-tank circuit. A diode structure includes a first diode pair coupled in series between a high-voltage bus and a negative output, and a second diode pair coupled in series between the high-voltage bus and the negative output. The transformer has a secondary winding with a first terminal coupled to a tap between the first diode pair and a second terminal coupled to a tap between the second diode pair. A high-voltage bus transistor selectively couples the high-voltage bus to a positive output in response to a high-voltage bus gate drive signal. A low-voltage bus transistor selectively couples a low-voltage bus at a center tap of the secondary winding to the positive output in response to a low-voltage bus gate drive signal.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: June 27, 2023
    Assignee: STMicroelectronics International N.V.
    Inventor: Ranajay Mallik
  • Patent number: 11681849
    Abstract: A method for optimizing a patterning device pattern, the method including obtaining an initial design pattern having a plurality of polygons, causing at least some of the polygons to be effectively connected with each other, placing evaluation features outside the boundaries of the polygons, and creating a patterning device pattern spanning across the connected polygons based on the evaluation features.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: June 20, 2023
    Inventors: Duan-Fu Stephen Hsu, Xiaoyang Jason Li
  • Patent number: 11675943
    Abstract: Embodiments are directed towards a method to create a reconfigurable interconnect framework in an integrated circuit. The method includes accessing a configuration template directed toward the reconfigurable interconnect framework, editing parameters of the configuration template, functionally combining the configuration template with a plurality of modules from an IP library to produce a register transfer level (RTL) circuit model, generating at least one automated test-bench function, and generating at least one logic synthesis script. Editing parameters of the configuration template includes confirming a first number of output ports of a reconfigurable stream switch and confirming a second number of input ports of the reconfigurable stream switch. Each output port and each input port has a respective architectural composition. The output port architectural composition is defined by a plurality of N data paths including A data outputs and B control outputs.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: June 13, 2023
    Inventors: Thomas Boesch, Giuseppe Desoli
  • Patent number: 11677257
    Abstract: A vehicle-side charging circuit includes an AC-voltage interface, a rectifier connected thereto and at least one first and one second DC-to-DC converter. The DC-to-DC converters are electrically isolating, and each have at least one intermediate circuit capacitor and at least one switch unit. The charging circuit also includes an on-board electrical system connection. The rectifier is connected to the on-board electrical system connection by way of the DC-to-DC converters. The charging circuit has a switch device which connects the DC-to-DC converters so as to be switchable between one another. In a first switching state, the switching device connects the two intermediate circuit capacitors and the switching units of the DC-to-DC converters in parallel and, in a second switching state, connects the intermediate circuit capacitors and the switch units in series.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: June 13, 2023
    Assignee: Vitesco Technologies GmbH
    Inventors: Franz Pfeilschifter, Martin Goetzenberger, Manuel Brunner
  • Patent number: 11675951
    Abstract: Method and system for assisting electronic chip design, comprising: receiving netlist data for a proposed electronic chip design, the netlist data including a list of circuit elements and a list of interconnections between the circuit elements; converting the netlist data to a graph that represents at least some of the circuit elements as nodes and represents the interconnections between the circuit elements as edges; extracting network embeddings for the nodes based on a graph topology represented by the edges; extracting degree features for the nodes based on the graph topology; and computing, using a graph neural network, a congestion prediction for the circuit elements that are represented as nodes based on the extracted network embeddings and the extracted degree features.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: June 13, 2023
    Inventors: Amur Ghose, Yingxue Zhang, Zhanguang Zhang
  • Patent number: 11667204
    Abstract: A vehicle charging circuit includes an AC voltage connection that has a plurality of potentials, a switch device, a plurality of rectifiers that are each in the form of a bridge rectifier, a plurality of step-up converters, and a plurality of galvanically isolating DC-DC converters. Inputs of the rectifiers are connected to one other. The interconnected inputs of the rectifiers are connected to the AC voltage connection via the switch device. The rectifiers each have an output, downstream of each of which is connected one of the step-up converters. The step-up converters are connected to a rechargeable battery connection of the vehicle charging circuit.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: June 6, 2023
    Assignee: Vitesco Technologies GmbH
    Inventors: Franz Pfeilschifter, Martin Götzenberger
  • Patent number: 11669670
    Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout, the initial layout comprising a first pattern and a second pattern; decomposing the initial layout into a first layout including the first pattern and a second layout including the second pattern; inserting a third pattern into the first layout; overlapping the first layout including the first pattern and the third pattern to the second layout including the second pattern; increasing a width of the third pattern in the first layout overlapping the second pattern in the second layout to form a fourth pattern in the first layout; and outputting the first layout comprising the first pattern, the third pattern and the fourth pattern into a first photomask.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 6, 2023
    Inventors: Chin-Min Huang, Ching-Hung Lai, Jia-Guei Jou, Yin-Chuan Chen, Chi-Ming Tsai
  • Patent number: 11660975
    Abstract: A method for AC-charging an intelligent battery pack, which is connected to a charging column and has at least two battery modules, which each comprise at least one energy storage element and at least two power semiconductor switches, which interconnect the respective battery module in series or in parallel with another battery module. The battery pack is connected for charging with alternating current provided by the charging column by a charging circuit, which includes a filter and a rectifier. According to the method, a state of each individual energy storage element is monitored. In accordance with a continued evaluation of the states of the respective energy storage elements, a terminal voltage of the battery pack is adjusted by way of dynamic actuation of the power semiconductor switches to a voltage provided by the rectifier.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: May 30, 2023
    Inventors: Malte Jaensch, Jan Kacetl, Tomas Kacetl, Stefan Götz
  • Patent number: 11657202
    Abstract: A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: May 23, 2023
    Assignee: Texas Instmments Incorporated
    Inventors: Sumanth Somashekar, Shaibal Barua, Padman Sooryamoorthy
  • Patent number: 11658049
    Abstract: A method for evaluating a heat sensitive structure involving identifying a heat sensitive structure in an integrated circuit design layout, the heat sensitive structure characterized by a nominal temperature, identifying a heat generating structure within a thermal coupling range of the heat sensitive structure, calculating an operating temperature of the first heat generating structure; calculating a temperature increase or the heat sensitive structure induced by thermal coupling to the heat generating structure at the operating temperature; and performing an electromigration (EM) analysis of the heat sensitive structure at an evaluation temperature obtained by adjusting the nominal temperature by the temperature increase induced by the heat generating structure.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: May 23, 2023
    Inventors: Hsien Yu Tseng, Sheng-Feng Liu
  • Patent number: 11657206
    Abstract: Disclosed is an artificial intelligence-based semiconductor design method performed by a computing device. The artificial intelligence-based semiconductor design method includes: inputting state map information related to a connection relationship between semiconductor devices to a Convolutional Neural Network (CNN) of a semiconductor placement model; placing the semiconductor device based on an output of the convolutional neural network; and training the semiconductor placement model based on the placement of the semiconductor devices.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: May 23, 2023
    Assignee: MakinaRocks Co., Ltd.
    Inventor: Wooshik Myung
  • Patent number: 11652481
    Abstract: One example of the present disclosure is an integrated circuit (IC). The IC includes an inverter with an input and an output, a clock transmission gate coupled to the output of the inverter; and a plurality of storage cells. The clock transmission gate is coupled to each of the plurality of storage cells, wherein each of the plurality of storage cells comprises a plurality of nodes arranged based on a minimum spacing.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: May 16, 2023
    Assignee: XILINX, INC.
    Inventors: Pierre Maillard, Betty Lau, Yanran Chen, Jun Liu, Martin L. Voogel
  • Patent number: 11651207
    Abstract: A method of generating training spectra for training of a neural network includes measuring a first plurality of training spectra from one or more sample substrates, measuring a characterizing value for each training spectra of the plurality of training spectra to generate a plurality of characterizing values with each training spectrum having an associated characterizing value, measuring a plurality of dummy spectra during processing of one or more dummy substrates, and generating a second plurality of training spectra by combining the first plurality of training spectra and the plurality of dummy spectra, there being a greater number of spectra in the second plurality of training spectra than in the first plurality of training spectra. Each training spectrum of the second plurality of training spectra having an associated characterizing value.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: May 16, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Benjamin Cherian, Nicholas Wiswell, Jun Qian, Thomas H. Osterheld
  • Patent number: 11635477
    Abstract: An article of manufacture for providing an onboard vehicle recharging environment according to the present invention is disclosed. A Continuous Onboard Recharging Environment (CORE) translates mechanical rotational energy obtained from the rotating axles of a vehicle to a form of sufficient voltage and load amperage to facilitate the charging of an Electric Vehicle's battery system while the vehicle is in operation, thus reducing or removing the need for external charging.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: April 25, 2023
    Inventor: Raymond Folk
  • Patent number: 11628732
    Abstract: Various disclosed embodiments include illustrative controller units, direct current fast charging (DCFC) units, and methods. In an illustrative embodiment, a controller unit includes a controller and a memory configured to store computer-executable instructions. The computer-executable instructions are configured to cause the controller to determine status of a power electronics module (PEM) of a direct current fast charging (DCFC) unit, and instruct the PEM to control power quality of a three-phase alternating current (AC) grid power signal in response to the determined status being available.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: April 18, 2023
    Assignee: Rivian IP Holdings, LLC
    Inventors: Yang Liu, Steven Schulz, Ming Li
  • Patent number: 11623539
    Abstract: Disclosed herein is a compliant joint that is movable in three degrees of freedom (DOF), as well as systems including the compliant joint, and a process for assembling the compliant joint. The compliant joint may comprise an elongate arm, a ball joint, and a carrier. The ball joint is configured to couple to the carrier, and the elongate arm is configured to couple to the ball joint. The ball joint may have a cross section that is ellipsoidal, an outer surface that is convex, and a first hole. The carrier may comprise a second hole that is ellipsoidal, and an inner surface that is concave. The elongate arm, when disposed within the first hole, is movable axially through the first hole, and the ball joint, when disposed within the second hole, is movable with at least one of pitch rotation or yaw rotation.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: April 11, 2023
    Assignee: Amazon Technologies, Inc.
    Inventor: Matthew Anthony Brady
  • Patent number: 11620427
    Abstract: A method for assigning connections between IO pad pins and connectors on an integrated circuit (IC) die. A pattern (300) including a physical layout of connectors (302) and pad pins (304) is associated with a mapping of connections between the connectors (302) and the pad pins (304). A processor (204) identifies instances (402, 404) of the pattern (300) within a design image (400) of an integrated circuit (IC) die using a machine learning model. The design image (400) includes a physical layout of connectors (414) and pad pins (416). For each identified instance (402, 404) of the pattern (300) within the design image (400), the mapping of connections is assigned to respective connectors (414) and pad pins (416) in the identified instance (402, 404).
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: April 4, 2023
    Assignee: Synopsys, Inc.
    Inventors: Xun Liu, Shamik Saha
  • Patent number: 11616441
    Abstract: Described is a new partial power converter (PPC) for the DC-DC stage of rapid-charging stations for electric vehicles (EV). The proposed converter manages only a fraction of the total power delivered from the grid to the battery, which increases the general efficiency of the system and the power density while potentially reducing the cost of the charger. The proposed topology is based on a switched capacitor between the AC terminals of a bridge converter H and does not require high-frequency isolation transformers in order to provide a source of controllable voltage between the CC link and the battery. The proposed concept can be implemented by using interposed power cells, which can improve energy quality, reduce the size of the inductor, and allow scalability for chargers of higher nominal power.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: March 28, 2023
    Inventors: Samir Felipe Kouro Renaer, Sebastián Andre Rivera Iunnissi, Álvaro Daniel Pesántez Alvarado
  • Patent number: 11615306
    Abstract: An electronic device includes a memory that stores input matrices A and B, a cache memory, and a processor. The processor generates a compiled representation that includes values for acquiring data from input matrix A when processing instances of input data through the neural network, the values including a base address in input matrix A for each thread from among a number of threads and relative offsets, the relative offsets being distances between elements of input matrix A to be processed by the threads. The processor then stores, in the local cache memory, the compiled representation including the base address for each thread and the relative offsets.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 28, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Xiuyu Li, Jian Yang
  • Patent number: 11607963
    Abstract: A method is provided for impedance-controlled fast charging of a stored electrical energy source of a working device, in particular of a stored energy source in a vehicle. In the method: a variable characteristic of an impedance of the stored energy source is detected; a present charging current for charging the stored electrical energy source is set as a function of the variable characteristic of the impedance; the present charging current is temporarily reduced with a steep edge by temporarily connecting a resistive load to the stored energy source and feeding the load using the stored energy source; and a voltage response of the stored energy source to the steep edge is detected as the variable characteristic of the impedance of the stored energy source and is used as the basis for setting the present charging current.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: March 21, 2023
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Dave Andre, Christoph Bauer, Simon Nuernberger, Jan Philipp Schmidt