Abstract: A method of generating a layout diagram of an IC device includes assigning a leakage constraint to a first schematic net of the IC device and determining a violation of the leakage constraint based on a dummy gate region. The IC layout diagram includes the dummy gate region between a first component of the first schematic net and a second component of a second schematic net of the IC device. The method includes modifying the IC layout diagram in response to the leakage constraint violation, and generating a layout file based on the modified IC layout diagrams.

Abstract: The present invention discloses an on-board integrated charging device and a current distribution calculating method thereof. The on-board integrated charging device comprises a voltage conversion module. The voltage conversion module is provided with an AC terminal connected to an alternating current or an alternating current load, an HV terminal connected to a power battery and an LV terminal connected to a direct current load. When the AC terminal is idle, the LV terminal is powered by the HV terminal, and an input current of the LV terminal is an actual current of the HV terminal. According to the on-board integrated charging device, OBC, DCAC and DCDC functions can be integrated on the same circuit board, a current reporting requirement can be realized through a distribution algorithm, and the volume and weight of the whole device can be reduced.

Abstract: A method of controlling charge of a vehicle battery includes: determining, by a control unit, whether a high voltage battery and a low voltage battery are charged in a first charging mode, a second charging mode, or a third charging mode; and charging at least one of the high voltage battery or the low voltage battery by controlling a first full-bridge circuit unit, a second full-bridge circuit unit, and a low voltage direct current (DC) converter unit based on the determined first, second or third charging mode.

Abstract: The present disclosure relates to a method for adapting a computation graph of a machine learning model. The method comprises partitioning the computation graph at an edge between a first node and a second node, wherein the edge is a control dependency edge. The method further comprises inserting a proxy node, a send node, and a receive node between the first node and the second node. The proxy node is connected to the first node, the send node is configured to receive output data from the proxy node, and the receive node is configured to receive the output data from the send node.

Abstract: The present disclosure relates to a method performed by battery charger configured to charge a vehicle battery, the method comprising initiating, at a first point in time (t_Bulk_Start), charging of the battery in a bulk charging mode, determining, at a second point in time (t_Bulk_End) subsequent to the first point in time (t_Bulk_Start), that the charging of the battery in the bulk charging mode is completed, estimating, at the second point in time (t_Bulk_End), a state of charge of the battery at the first point in time (t_Bulk_Start) when the charging of the battery in a bulk charging mode was initiated, initiating charging of the battery in a subsequent charging mode using the estimated state of charge (SoC_Bulk_Start), wherein the subsequent charging mode is selected from an absorption charging mode and a float charging mode.

Abstract: A DC-DC converter includes an inverter converting a DC supply voltage to a time varying signal. A transformer has a primary winding coupled to the inverter through an LC-tank circuit. A diode structure includes a first diode pair coupled in series between a high-voltage bus and a negative output, and a second diode pair coupled in series between the high-voltage bus and the negative output. The transformer has a secondary winding with a first terminal coupled to a tap between the first diode pair and a second terminal coupled to a tap between the second diode pair. A high-voltage bus transistor selectively couples the high-voltage bus to a positive output in response to a high-voltage bus gate drive signal. A low-voltage bus transistor selectively couples a low-voltage bus at a center tap of the secondary winding to the positive output in response to a low-voltage bus gate drive signal.

Abstract: A method for optimizing a patterning device pattern, the method including obtaining an initial design pattern having a plurality of polygons, causing at least some of the polygons to be effectively connected with each other, placing evaluation features outside the boundaries of the polygons, and creating a patterning device pattern spanning across the connected polygons based on the evaluation features.

Abstract: Embodiments are directed towards a method to create a reconfigurable interconnect framework in an integrated circuit. The method includes accessing a configuration template directed toward the reconfigurable interconnect framework, editing parameters of the configuration template, functionally combining the configuration template with a plurality of modules from an IP library to produce a register transfer level (RTL) circuit model, generating at least one automated test-bench function, and generating at least one logic synthesis script. Editing parameters of the configuration template includes confirming a first number of output ports of a reconfigurable stream switch and confirming a second number of input ports of the reconfigurable stream switch. Each output port and each input port has a respective architectural composition. The output port architectural composition is defined by a plurality of N data paths including A data outputs and B control outputs.

Abstract: A vehicle-side charging circuit includes an AC-voltage interface, a rectifier connected thereto and at least one first and one second DC-to-DC converter. The DC-to-DC converters are electrically isolating, and each have at least one intermediate circuit capacitor and at least one switch unit. The charging circuit also includes an on-board electrical system connection. The rectifier is connected to the on-board electrical system connection by way of the DC-to-DC converters. The charging circuit has a switch device which connects the DC-to-DC converters so as to be switchable between one another. In a first switching state, the switching device connects the two intermediate circuit capacitors and the switching units of the DC-to-DC converters in parallel and, in a second switching state, connects the intermediate circuit capacitors and the switch units in series.

Abstract: Method and system for assisting electronic chip design, comprising: receiving netlist data for a proposed electronic chip design, the netlist data including a list of circuit elements and a list of interconnections between the circuit elements; converting the netlist data to a graph that represents at least some of the circuit elements as nodes and represents the interconnections between the circuit elements as edges; extracting network embeddings for the nodes based on a graph topology represented by the edges; extracting degree features for the nodes based on the graph topology; and computing, using a graph neural network, a congestion prediction for the circuit elements that are represented as nodes based on the extracted network embeddings and the extracted degree features.

Abstract: A vehicle charging circuit includes an AC voltage connection that has a plurality of potentials, a switch device, a plurality of rectifiers that are each in the form of a bridge rectifier, a plurality of step-up converters, and a plurality of galvanically isolating DC-DC converters. Inputs of the rectifiers are connected to one other. The interconnected inputs of the rectifiers are connected to the AC voltage connection via the switch device. The rectifiers each have an output, downstream of each of which is connected one of the step-up converters. The step-up converters are connected to a rechargeable battery connection of the vehicle charging circuit.

Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout, the initial layout comprising a first pattern and a second pattern; decomposing the initial layout into a first layout including the first pattern and a second layout including the second pattern; inserting a third pattern into the first layout; overlapping the first layout including the first pattern and the third pattern to the second layout including the second pattern; increasing a width of the third pattern in the first layout overlapping the second pattern in the second layout to form a fourth pattern in the first layout; and outputting the first layout comprising the first pattern, the third pattern and the fourth pattern into a first photomask.

Abstract: A method for AC-charging an intelligent battery pack, which is connected to a charging column and has at least two battery modules, which each comprise at least one energy storage element and at least two power semiconductor switches, which interconnect the respective battery module in series or in parallel with another battery module. The battery pack is connected for charging with alternating current provided by the charging column by a charging circuit, which includes a filter and a rectifier. According to the method, a state of each individual energy storage element is monitored. In accordance with a continued evaluation of the states of the respective energy storage elements, a terminal voltage of the battery pack is adjusted by way of dynamic actuation of the power semiconductor switches to a voltage provided by the rectifier.

Abstract: A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.

Abstract: Disclosed is an artificial intelligence-based semiconductor design method performed by a computing device. The artificial intelligence-based semiconductor design method includes: inputting state map information related to a connection relationship between semiconductor devices to a Convolutional Neural Network (CNN) of a semiconductor placement model; placing the semiconductor device based on an output of the convolutional neural network; and training the semiconductor placement model based on the placement of the semiconductor devices.

Abstract: A method for evaluating a heat sensitive structure involving identifying a heat sensitive structure in an integrated circuit design layout, the heat sensitive structure characterized by a nominal temperature, identifying a heat generating structure within a thermal coupling range of the heat sensitive structure, calculating an operating temperature of the first heat generating structure; calculating a temperature increase or the heat sensitive structure induced by thermal coupling to the heat generating structure at the operating temperature; and performing an electromigration (EM) analysis of the heat sensitive structure at an evaluation temperature obtained by adjusting the nominal temperature by the temperature increase induced by the heat generating structure.

Abstract: One example of the present disclosure is an integrated circuit (IC). The IC includes an inverter with an input and an output, a clock transmission gate coupled to the output of the inverter; and a plurality of storage cells. The clock transmission gate is coupled to each of the plurality of storage cells, wherein each of the plurality of storage cells comprises a plurality of nodes arranged based on a minimum spacing.

Abstract: A method of generating training spectra for training of a neural network includes measuring a first plurality of training spectra from one or more sample substrates, measuring a characterizing value for each training spectra of the plurality of training spectra to generate a plurality of characterizing values with each training spectrum having an associated characterizing value, measuring a plurality of dummy spectra during processing of one or more dummy substrates, and generating a second plurality of training spectra by combining the first plurality of training spectra and the plurality of dummy spectra, there being a greater number of spectra in the second plurality of training spectra than in the first plurality of training spectra. Each training spectrum of the second plurality of training spectra having an associated characterizing value.

Abstract: An article of manufacture for providing an onboard vehicle recharging environment according to the present invention is disclosed. A Continuous Onboard Recharging Environment (CORE) translates mechanical rotational energy obtained from the rotating axles of a vehicle to a form of sufficient voltage and load amperage to facilitate the charging of an Electric Vehicle's battery system while the vehicle is in operation, thus reducing or removing the need for external charging.

Abstract: Various disclosed embodiments include illustrative controller units, direct current fast charging (DCFC) units, and methods. In an illustrative embodiment, a controller unit includes a controller and a memory configured to store computer-executable instructions. The computer-executable instructions are configured to cause the controller to determine status of a power electronics module (PEM) of a direct current fast charging (DCFC) unit, and instruct the PEM to control power quality of a three-phase alternating current (AC) grid power signal in response to the determined status being available.