Abstract: A USB OTG device includes a USB interface having a VBUS pin and an ID pin. A voltage input pin of a first switch is connected to a power source VDD5V. A voltage output pin of the first switch is connected to the VBUS pin and a second switch. The VBUS pin is connected to a power source Vcc. When the voltage at the ID pin is logic high, the voltage at an enable pin of the first switch is set to be logic high, the first switch is on, the second switch is off, thus the USB OTG device provides power to an external device. When the voltage at the ID pin is logic low, the voltage at the enable pin is set to be logic low, the first switch is off, the second switch is on, thus an external device provides power to the USB OTG device.

Abstract: A method for selecting an internal circuit according to a USB interface status includes: connecting a first pin of a USB interface of a terminal to a power supply through a pull-up resistor, where the first pin is a D? or D+ pin; when detecting that an external USB device is inserted into the USB interface, detecting whether the level status of the first pin is high or low; if the level status is low, connecting the D? and D+ pins to corresponding pins of a USB data communication module of the terminal and controlling charging of the terminal according to a first policy; if the level status is high, determining whether the level statuses of the D? and D+ pins are consistent, and if consistent, controlling charging of the terminal according to a second policy; if inconsistent, controlling charging of the terminal according to a third policy.

Abstract: Energy efficient transmission of content can be provided using a variety of techniques. In an example technique, portions of content can be transmitted from a first computing device to a second computing device for display. A wireless radio of the first computing device can be placed into a low power mode between transmissions of the portions of content. In another example technique, one or more portions of content can be decoded, displayed, encoded, and transmitted by a first computing device for mirroring on a second computing device. One or more other portions of the content can be transmitted in encoded format to the second device without being decoded and displayed by the first device. In another example technique, a wireless radio of a first device can be placed into a low power mode in between transmission of commands to a second computing device to control content.

Abstract: A processor may include a core and an uncore area. The power consumed by the core area may be controlled by controlling the Cdyn of the processor such that the Cdyn is within an allowable Cdyn value irrespective of the application being processed by the core area. The power management technique includes measuring digital activity factor (DAF), monitoring architectural and data activity levels, and controlling power consumption by throttling the instructions based on the activity levels. As a result of throttling the instructions, throttling may be implemented in 3rd droop and thermal design point (TDP). Also, the idle power consumed by the uncore area while the core area is in deep power saving states may be reduced by varying the reference voltage VR and the VP provided to the uncore area. As a result, the idle power consumed by the uncore area may be reduced.

Abstract: A processor may include a core and an uncore area. The power consumed by the core area may be controlled by controlling the dynamic capacitance of the processor such that the dynamic capacitance is within an allowable dynamic capacitance value irrespective of the application being processed by the core area. The power management technique includes measuring digital activity factor (DAF), monitoring architectural and data activity levels, and controlling power consumption by throttling the instructions based on the activity levels. As a result of throttling the instructions, throttling may be implemented in 3rd droop and thermal design point (TDP). Also, the idle power consumed by the uncore area while the core area is in deep power saving states may be reduced by varying the reference voltage VR and the VP provided to the uncore area. As a result, the idle power consumed by the uncore area may be reduced.

Abstract: A signal synchronizing device includes a trigger module for capturing an input signal according to a first clock signal which corresponds with the input signal so as to generate a trigger signal, a storage unit for forming a first pulse signal by pulling an output thereof to a first logic level according to the trigger signal, and by pulling the output thereof to a second logic level according to a feedback reset signal, and a synchronizing module for performing synchronous transfer according to the first pulse signal so as to output an output signal corresponding with frequency of a second clock signal, and for generating the feedback reset signal according to the output signal.

Abstract: A MicroTCA system is disclosed that includes an MCH, a clock card connected with the MCH, and multiple AMCs. The clock card includes a clock selecting unit, configured to select and output a clock source and a phase-lock unit, configured to generate a system synchronization clock according to the clock source selected by the clock selecting unit of the clock card. The MCH includes a clock drive unit, configured to drive the system synchronization clock generated by the clock card to multiple AMCs connected with the MCH. A clock card, a cascaded MicroTCA carrier, and a method for providing a clock are also provided. In this way, the implementation of the MicroTCA clock system is simplified, and the whole configuration cost of multiple cascaded MicroTCA carriers is reduced.

Abstract: A method of reducing power consumption of a server cluster of host systems with virtual machines executing on the host systems is disclosed. The method includes recommending host system power-on when there is a host system whose utilization is above a target utilization, and recommending host system power-off when there is a host system whose utilization is below the target utilization. Recommending host system power-on includes calculating impact of powering on a standby host system with respect to reducing the number of highly-utilized host systems in the server cluster. The impact of powering on is calculated by simulating moving some virtual machines from highly utilized host systems to the standby host system being recommended to be powered on. Recommending host system power-off includes calculating impact of powering off a host system with respect to decreasing the number of less-utilized host systems in the server cluster.

Abstract: A standby power reducing module according to an embodiment includes a AC rectification unit; a resonance unit electrically connected to the AC rectification unit and dropping DC voltage; a microcomputer connected to the resonance unit and controlling all operations of a system; a power blocking unit electrically connected to the microcomputer and blocking output voltage of the resonance unit when the system is switched into standby mode; and a independent power supplying unit supplying the standby power to the microcomputer when the system is switched into the standby mode.

Abstract: Systems and methods detect when a transition from a first power module to a second power module is taking place and generates a lockout pulse when the transition is detected. The lockout pulse initiates the blocking of a predetermined number of gate pulses from reaching the second power module. When the predetermined number of gate pulses are blocked, the systems and methods reset to allow complete gate pulses to reach the second module, and continues to detect when the next transition takes place.

Abstract: A control system reduces energy consumption in a multi-device system comprising a plurality of devices. The control system includes at least one processor. The processor is programmed to receive a job to be executed, as well as a selection of one of the plurality of devices for executing the job and a transfer cost for transferring the job from the selected device to each of the plurality of devices. A device to execute the job is determined through optimization of a first cost function. The first cost function is based on the device selection and the transfer costs. The job is assigned to the determined device and a time-out for each device in the multi-device system is determined through optimization of a second cost function. The second cost function is based on an expected energy consumption by the multi-device system. The devices are provided with the determined time-outs.

Abstract: In an information processing apparatus, a control unit includes a first clock device for providing the time of day. A physical domain includes a second clock device, and implements a logical domain that functions as a virtual information processing apparatus. The control unit controls a first time-of-day difference between the time of day of the first clock device and that of the second clock device. The physical domain controls a second time-of-day difference between the time of day of the second clock device and that of the logical domain. In the information processing apparatus, the time of day on the logical domain is controlled based on the first and second time-of-day differences.

Abstract: Generating an optimal power cap value includes steps of: analyzing power usage of a system for a specified period of time; computing a power consumption value for the system for the specified period of time; and generating the optimal power cap value for the system, using the computed power consumption value. The system should be coupled with a power meter and should support power regulation technology.

Abstract: Systems, methods and products are described that provide accelerated boot performance. One aspect includes initiating a booting process of a user operating system of a computer system; identifying a non-critical hardware device set for start up according to the user operating system; excluding the non-critical hardware device; and completing the booting process to provide the user operating system without starting an excluded non-critical hardware device. Other embodiments are described.

Abstract: Various embodiments of methods and systems for mode-based reallocation of workloads in a portable computing device (“PCD”) that contains a heterogeneous, multi-processor system on a chip (“SoC”) are disclosed. Because individual processing components in a heterogeneous, multi-processor SoC may exhibit different performance capabilities or strengths, and because more than one of the processing components may be capable of processing a given block of code, mode-based reallocation systems and methodologies can be leveraged to optimize quality of service (“QoS”) by allocating workloads in real time, or near real time, to the processing components most capable of processing the block of code in a manner that meets the performance goals of an operational mode. Operational modes may be determined by the recognition of one or more mode-decision conditions in the PCD.

Abstract: An electronic device with standby state includes a MCU, a voltage conversion unit, a screen lock circuit, and a power-saving trigger circuit. The voltage conversion unit is connected to the MCU and is used to convert a power supply voltage to a suitable voltage to power the MCU. The screen lock circuit includes a switch, therein, the screen lock circuit is connected to the MCU and is used to lock or unlock the electronic device in response to an operation on the switch when the electronic device is in a work state. The power-saving trigger circuit is connected to the MCU, the voltage conversion unit, and the screen lock circuit, and is used to disable or enable the voltage conversion unit in response to the operation on the switch when the electronic device is in the standby state.

Abstract: To reduce power consumption and heat generation, an active idle system is proposed that monitors for an idle period and then, after a predetermined time, initiates a silent period. During the silent period data and idle frames are not transmitted. During the silent period, one or more transceiver components may be turned off or forced into some other power saving mode. The predetermined time may be any amount of time and is selected to balance network usage and power savings. Periodically during the silent period, such as at predetermined times, one or more sync or idle frames are transmitted. Received sync or idle frames are processed to maintain receiver settings, synchronization or equalizer adaptation. Restoring active data communication may occur by monitoring the channel during silent periods for a request or only during the predetermined times when sync or idle frames are sent.

Abstract: A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.

Abstract: Techniques are disclosed relating to managing power consumption and latencies for entry and exit of idle power states. In one embodiment, a processor includes a processing core configured to operate in a plurality of power states (e.g., C-states) that includes an operating power state and at least one idle power state. The processing core is also configured to operate in a plurality of performance states. The processor further includes a power management unit configured to receive a request from the processing core to enter the at least one idle power state. The power management unit is configured to select a first of the plurality of performance states (e.g., P-states) based on the requested idle power state. In one embodiment, the power management unit is further configured to cause the processing core to transition into the selected first performance state prior to entering the requested idle power state.

Abstract: Synchronizing time bases in a parallel computer that includes compute nodes organized for data communications in a tree network, where one compute node is designated as a root, and, for each compute node: calculating data transmission latency from the root to the compute node; configuring a thread as a pulse waiter; initializing a wakeup unit; and performing a local barrier operation; upon each node completing the local barrier operation, entering, by all compute nodes, a global barrier operation; upon all nodes entering the global barrier operation, sending, to all the compute nodes, a pulse signal; and for each compute node upon receiving the pulse signal: waking, by the wakeup unit, the pulse waiter; setting a time base for the compute node equal to the data transmission latency between the root node and the compute node; and exiting the global barrier operation.