Patents Examined by Phallaka Kik
  • Patent number: 12151576
    Abstract: In a rotation angle detecting apparatus, a ground unit in a parking space has a linear side facing toward the approaching vehicle, an in-vehicle unit is able to face the ground unit, a processor is configured to, after the vehicle starts parking, acquire a first timing at which one of first and second sensors, arranged in a right and left direction of the vehicle, begins to face the ground unit and a second timing at which the other one begins to face the ground unit based on a change of an output signal of one of the sensors, and to calculate a vehicle moving distance from the first timing to the second timing based on an output signal of a rotation angle sensor and calculate an arc tangent value of a value obtained by dividing the calculated moving distance by a sensor-to-sensor distance as a yaw angle.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: November 26, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hiroyuki Ishihara
  • Patent number: 12147749
    Abstract: A relationship between at least a first metric of an integrated circuit (IC) design and a power supply voltage of the IC design may be determined based on a set of IC designs that have different power supply voltages. Next, the power supply voltage and at least the first metric of the IC design may be modified by interpolating values of the first metric based on the relationship between the first metric and the power supply voltage of the IC design.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: November 19, 2024
    Assignee: Synopsys, Inc.
    Inventors: Qiang Wu, Henry S. Sheng
  • Patent number: 12147155
    Abstract: A mask correction method, a mask correction device for double patterning, and a training method for a layout machine learning model are provided. The mask correction method for double patterning includes the following steps. A target layout is obtained. The target layout is decomposed into two sub-layouts, which overlap at a stitch region. A size of the stitch region is analyzed by the layout machine learning model according to the target layout. The layout machine learning model is established according to a three-dimensional information after etching. An optical proximity correction (OPC) procedure is performed on the sub-layouts.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: November 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Min-Cheng Yang, Chung-Yi Chiu
  • Patent number: 12141511
    Abstract: Some embodiments of the present disclosure include techniques for generating a capacitor comprising receiving a total capacitance for a capacitor to be generated, determining a number N of unit capacitors having a unit capacitance to be combined to form the total capacitance, generating a transistor level schematic comprising N unit capacitor schematics having the unit capacitance, wherein the N unit capacitor schematics are configured to produce the total capacitance, and generating a layout comprising N capacitor layout elements configured to produce said capacitor.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: November 12, 2024
    Assignee: Celera, Inc.
    Inventors: Calum MacRae, John Mason, Karen Mason
  • Patent number: 12142954
    Abstract: A cell controller includes: a balancing unit which performs balancing of states of charge of a plurality of secondary batteries by discharging or charging each of the plurality of secondary batteries; a first timer which measures an elapsed time after a start of the balancing; a receiving unit which receives a balancing command signal including information regarding balancing times for the secondary batteries; and a first control unit which controls the balancing unit on a basis of the elapsed time after the start of the balancing, and the balancing command signal, the elapsed time being measured by the first timer and the balancing command signal being received by the receiving unit, in which the receiving unit receives the information on the plurality of secondary batteries through the single balancing command signal.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: November 12, 2024
    Assignee: Hitachi Astemio, Ltd.
    Inventors: Tomonori Kanai, Hikaru Miura
  • Patent number: 12132238
    Abstract: A fuel cell system includes a first fuel cell having an electrode area made of first electrode material, and a second fuel cell having an electrode area made of second electrode material having low durability against output voltage variation in comparison with the first electrode material. The fuel cell system is configured to supply electrical power to a motor generator. The fuel cell system includes a required electrical power acquisition unit configured to obtain required electrical power of the motor generator, and a control unit configured to control the second fuel cell in a manner that a variation of output electrical power of the second fuel cell becomes not more than a predetermined limit variation, and control the first fuel cell in accordance with the required electrical power and output electrical power of the second fuel cell.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: October 29, 2024
    Assignee: Honda Motor Co., Ltd.
    Inventors: Yutaka Chiba, Seiji Sugiura
  • Patent number: 12124781
    Abstract: A method of compiling a verification system including a logic system design and a test bench for verifying the logic system design includes: receiving a description of the verification system, parsing the description of the verification system using a first parser and a second parser to generate a first intermediate representation (IR) and a second IR, respectively; analyzing the first and second IRs to generate exchange information; optimizing at least one of the first IR or the second IR based on the exchange information; and generating a first implementable code and a second implementable code respectively based on the first and second IRs after the optimization, wherein the first and second IRs are related by a connection point, and the exchange information is associated with the connection point.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: October 22, 2024
    Assignee: XEPIC CORPORATION LIMITED
    Inventor: Jiahua Zhu
  • Patent number: 12119686
    Abstract: Provided is a power source system including: a storage battery; a control unit operating by being supplied with power from the storage battery and monitoring the storage battery; a first switch configured as a latch type switch disposed on a first electrical path between the storage battery and the control unit; and a second switch configured as a latch type switch disposed on a second electrical path between the storage battery and an electrical equipment as an object to which the storage battery supplies power. The first switch and the second switch are connected in parallel to the control unit; current is supplied to the control unit from the storage battery; and the control unit includes a switch control unit configured to stop a current supply to the control unit from the storage battery.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: October 15, 2024
    Assignee: DENSO CORPORATION
    Inventor: Tomomichi Mizoguchi
  • Patent number: 12092965
    Abstract: A defect prediction method for a device manufacturing process involving processing one or more patterns onto a substrate, the method including: determining values of one or more processing parameters under which the one or more patterns are processed; and determining or predicting, using the values of the one or more processing parameters, an existence, a probability of existence, a characteristic, and/or a combination selected from the foregoing, of a defect resulting from production of the one or more patterns with the device manufacturing process.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 17, 2024
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Venugopal Vellanki, Vivek Kumar Jain, Stefan Hunsche
  • Patent number: 12093618
    Abstract: In some embodiments, a computer-implemented method of generating a resistor comprises receiving a first resistor value, converting the resistor value into a plurality of resistor layout segments, and automatically placing the plurality of resistor layout segments based on one or more layout placement instructions to form the first resistor value.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: September 17, 2024
    Assignee: Celera, Inc.
    Inventors: Calum MacRae, John Mason, Karen Mason
  • Patent number: 12093619
    Abstract: In some embodiments, information specifying a transistor to be generated is received, the information comprising an on resistance. A total width of a gate of the transistor to be generated is determined based at least on the on resistance. A first width, a number of fingers (F), and a number of device cells (P) are determined based on the total width. A transistor level schematic is generated comprising one or more transistors configured with the first width and the number of fingers (F). A layout is generated, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F) each gate having said first width, wherein the device cells are configured in a two-dimensional array.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: September 17, 2024
    Assignee: Celera, Inc.
    Inventors: Calum MacRae, John Mason, Karen Mason
  • Patent number: 12086518
    Abstract: A method for implementing a programmable device is provided. The method may include extracting an underlay from an existing routing network on the programmable device and then mapping a user design to the extracted underlay. The underlay may represent a subset of fast routing wires satisfying predetermined constraints. The underlay may be composed of multiple repeating adjacent logic blocks, each implementing some datapath reduction operation. Implementing circuit designs in this way can dramatically improve circuit performance while cutting down compile times by more than half.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: September 10, 2024
    Assignee: Intel Corporation
    Inventors: Gregg William Baeckler, Martin Langhammer
  • Patent number: 12088117
    Abstract: Embodiments of the present disclosure describe systems, methods, apparatuses for wirelessly charging handheld and consumer electronics in wireless power delivery environments. In some embodiments, techniques are described for retrofitting wireless power receivers into existing devices e.g., through wirelessly powered battery apparatuses. For example, the apparatuses discussed herein allow any device that accepts standard form factor batteries to be transformed into a wirelessly powered device. The wirelessly rechargeable battery apparatuses can be applied to any battery form factor including custom or semi-custom battery form factors for mobile phones, laptops, tablet computers, etc. Advantageously, among other benefits, the apparatuses discussed herein overcome the product integration challenges discussed above.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: September 10, 2024
    Assignee: Ossia Inc.
    Inventors: Hatem Ibrahim Zeine, Siamak Ebadi, Alireza Saghati, Anas Alfarra, Chris Neugebauer
  • Patent number: 12079555
    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: September 3, 2024
    Assignee: CELERA, INC.
    Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
  • Patent number: 12073157
    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: August 27, 2024
    Assignee: CELERA, INC.
    Inventors: Calum MacRae, John Mason, Karen Mason
  • Patent number: 12065090
    Abstract: A vehicle having: a passenger compartment, which is designed to accommodate occupants and is provided with at least one support surface on which to place a mobile phone; and a wireless charger, which is arranged under the support surface and is designed to generate an electromagnetic field in order to charge the mobile phone placed on the support surface. The wireless charger has: at least one coil generating the electromagnetic field, a power supply circuit designed to supply power to the coil, and a heat sink emitting the heat generated by the coil and by the power supply circuit to the outside. There is at least one Peltier cell having a cool wall facing the support surface, and a hot wall facing the heat sink.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: August 20, 2024
    Assignee: FERRARI S.P.A.
    Inventors: Gianluigi Di Zanni, Alfonso Oliva
  • Patent number: 12067338
    Abstract: Multi version library cell handling and integrated circuit structures fabricated therefrom are described. In an example, an integrated circuit structure includes a plurality of gate lines parallel along a first direction of a substrate and having a pitch along a second direction orthogonal to the first direction. A first version of a cell type is over a first portion of the plurality of gate lines, the first version of the cell type including a first plurality of interconnect lines having a second pitch along the second direction, the second pitch less than the first pitch.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: August 20, 2024
    Assignee: Intel Corporation
    Inventors: Ranjith Kumar, Quan Shi, Mark T. Bohr, Andrew W. Yeoh, Sourav Chakravarty, Barbara A. Chappell, M. Clair Webb
  • Patent number: 12062929
    Abstract: The present invention relates a modular charging system, including a wall-mounted outlet-preserving charger for powering and charging additional accessories, such as battery blocks, wireless device chargers, supporting chargers for wearable devices such as watches, and car chargers, each for use independently or in combination with electronic devices. The present invention typically includes a wall charger with one or more electrical outlets on the front face so that the use of the wall outlet is not lost. The wall charger of the present invention is suitable for use in any major country and may be adapted to the outlet configuration and voltage of those countries.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: August 13, 2024
    Inventor: Seymour Segnit
  • Patent number: 12043101
    Abstract: An objective of the present invention is to miniaturize a connector for connecting an exchangeable battery to an electric vehicle. A power supply device includes a first battery which is exchangeable and includes a battery connector for connection to a moving object; a moving object connector disposed at the moving object and connectable to the battery connector; a first power converting section connected between the moving object connector and a load; a second battery connected to a power supply line in parallel to the first battery, wherein the power supply line is configured to connect the first power converting section to the load; and a control section which is configured to control the first power converting section in such a way that a current which is output from the first battery to the first power converting section via the moving object connector has a first value or a smaller value.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: July 23, 2024
    Assignee: YAZAKI CORPORATION
    Inventors: Akinori Maruyama, Kentaro Imoto
  • Patent number: 12037126
    Abstract: Disclosed herein is a fundamental modeling and control method in dynamic energy conversion and transfers in complex energy systems with multiple energy sources, fuel and electric. The multi-layered modeling enables efficient and stable operation through optimized coordination of engines and electric part of a hybrid turbo-electric distribution system (TeDP). A provable coordination of power and rate of change of power interactions between the components is done at the higher-system level. Advanced nonlinear control of components is disclosed to ensure that components meet power/rate of change of power commands given by the higher level. This method is used to demonstrate, for the first time, how rotor stall and surge instabilities in engines can be eliminated by controlling the electric generators and/or storage.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: July 16, 2024
    Assignee: SmartGridz, Inc.
    Inventors: Marija Ilic, Rupamathi Jaddivada