Abstract: Disclosed in the present specification is a wireless power reception device comprising: a power pickup unit configured to receive wireless power from a wireless power transmission device by means of magnetic coupling with the wireless power transmission device at an operational frequency and convert an alternating current signal generated by the wireless power into a direct current signal; a battery configured to receive the direct current signal from the power pickup unit; and a communication/control unit configured to receive the direct current signal from the power pickup unit, perform a handover procedure from in-band communication using the operational frequency to out-band communication using a frequency other than the operational frequency, perform a procedure for selecting a priority display device on which charging status information about the battery is to be displayed through the out-band communication with the wireless power transmission device, and generate the charging status information.

Abstract: Electric vehicle charging scheduling includes receiving repeated sensor readings of a battery of an electric vehicle, the readings monitoring a charge of the battery while the electric vehicle proceeds along a contemporaneously scheduled route. Then, a geolocation of the electric vehicle is determined and a database queried with the geolocation. A charging station is then identified within geographic proximity of the geolocation of the electric vehicle. As well, a route scheduled for the electric vehicle after the contemporaneously scheduled route is determined. Thereafter, a threshold charge is computed that is requisite to complete both the contemporaneously scheduled route and also at least a portion of the route scheduled after the contemporaneously scheduled route. Finally, in response to a determination that the monitored charge on the battery is below the threshold level, an alert is displayed indicating to charge the battery at the identified charging station.

Abstract: Methods, systems and apparatus for approximating a target quantum state that is defined as a result of applying a specific rotation operation to an initial quantum state. A method includes determining multiple configurations of T-gates. Each configuration of T-gates includes a number of T-gates that is less than or equal to a predefined total number of T-gates and represents a rotation operation that, when applied to the initial quantum state, produces an evolved quantum state that is an approximation of the target quantum state. A configuration of T-gates that represents a rotation operation with a rotation angle that is closest to a rotation angle of the specific rotation operation is selected from the multiple configurations of T-gates. A rotation operation represented by the selected configuration of T-gates is applied to the initial quantum state to obtain the approximation of the target quantum state.

Abstract: Kinetic-powered battery systems for musical instrument that can build a charge based on some or all of the physical motion exerted upon the musical instrument. This physical motion can arise from any conceivable activity, including (but not limited to) handling, travel activity, playing the musical instrument and/or intentionally shaking the musical instrument to build a charge prior to use. The kinetic rechargeable power system for musical instruments has application in any conceivable musical instrument, including (but not limited to) acoustic and electric instruments, wireless transmitters or microphones or any related sound reinforcement equipment currently using batteries and subject to movement in travel, setup, use, or intentional movement to create sufficient charge.

Abstract: Disclosed are a quick simulation and optimization method and system for analog circuits. Aiming at a problem that a customized circuit model is difficultly modeled in a design process of the analog circuit, and the problem of a low circuit design efficiency caused by a slow electromagnetic field simulation speed, the invention proposes to firstly construct a device library, build a circuit and interconnect an AI network to obtain a comprehensive network parameter of the AI network; the comprehensive network parameter in a simulation process is compared with a network parameter target of an analog circuit, and an circuit layout of the analog circuit corresponding to the AI network is output to a three-dimensional full-wave electromagnetic field simulation tool for simulation and verification when requirements are met.

Abstract: A method including: obtaining an image of at least part of a substrate, wherein the image includes at least one feature manufactured on the substrate by a manufacturing process including a lithographic process and one or more further processes; determining one or more image-related metrics in dependence on a contour determined from the image, wherein one of the one or more image-related metrics is an edge placement error, EPE, of the at least one feature; and determining one or more control parameters of the lithographic process and/or the one or more further processes in dependence on the edge placement error, wherein at least one control parameter is determined so as to minimize the edge placement error of the at least one feature.

Abstract: A method of minimizing a cost function of a quantum computation is provided. The method comprises receiving input of an initial state of a quantum problem instance comprising a Hamiltonian with an associated cost function. The Hamiltonian is converted into a number of Pauli strings, which are used to form an operator pool. The Pauli strings in the operator pool are ranked according to how much they lower a value of the cost function with respect to the initial state. Pauli strings are iteratively added from the operator pool to a parameterized quantum circuit, in a manner to minimize circuit depth, until a variational quantum eigensolver (VQE) algorithm converges to an approximate ground state wave function generated by the parameterized quantum circuit.

Abstract: A method, involving determining a first distribution of a first parameter associated with an error or residual in performing a device manufacturing process; determining a second distribution of a second parameter associated with an error or residual in performing the device manufacturing process; and determining a distribution of a parameter of interest associated with the device manufacturing process using a function operating on the first and second distributions. The function may include a correlation.

Abstract: A device includes a power grid (PG) arrangement including: first and second segments in a first conductive layer which are conductive and extend in a first direction, the first segments being configured for a first reference voltage and the second segments being configured for a second reference voltage; the first and second segments being interspersed relative to a second direction, the second direction being perpendicular to the first direction; and relative to the second direction, the first segments being symmetrically spaced apart relative to each other, the second segments being symmetrically spaced apart relative to each other, and the second segments being substantially asymmetrically spaced between corresponding adjacent ones of the first segments.

Abstract: This application discloses a computing system implementing a mask synthesis system to generate synthetic image clips of design shapes and corresponding mask data for the synthetic image clips. The mask data can describe lithographic masks capable of being used to fabricate the design shapes on an integrated circuit. The mask synthesis system can utilize the synthetic image clips of the design shapes and the corresponding mask data to train a machine-learning system to determine pixelated output masks from portions of the layout design. The mask synthesis system can identify one or more pixelated output masks for portions of a layout design describing an electronic system using the trained machine-learning. The mask synthesis system can synthesize a mask layout design for the electronic system based, at least in part, on the layout design describing the electronic system and the one or more pixelated output masks for the layout design.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.

Abstract: In a rotation angle detecting apparatus, a ground unit in a parking space has a linear side facing toward the approaching vehicle, an in-vehicle unit is able to face the ground unit, a processor is configured to, after the vehicle starts parking, acquire a first timing at which one of first and second sensors, arranged in a right and left direction of the vehicle, begins to face the ground unit and a second timing at which the other one begins to face the ground unit based on a change of an output signal of one of the sensors, and to calculate a vehicle moving distance from the first timing to the second timing based on an output signal of a rotation angle sensor and calculate an arc tangent value of a value obtained by dividing the calculated moving distance by a sensor-to-sensor distance as a yaw angle.

Abstract: A mask correction method, a mask correction device for double patterning, and a training method for a layout machine learning model are provided. The mask correction method for double patterning includes the following steps. A target layout is obtained. The target layout is decomposed into two sub-layouts, which overlap at a stitch region. A size of the stitch region is analyzed by the layout machine learning model according to the target layout. The layout machine learning model is established according to a three-dimensional information after etching. An optical proximity correction (OPC) procedure is performed on the sub-layouts.

Abstract: A relationship between at least a first metric of an integrated circuit (IC) design and a power supply voltage of the IC design may be determined based on a set of IC designs that have different power supply voltages. Next, the power supply voltage and at least the first metric of the IC design may be modified by interpolating values of the first metric based on the relationship between the first metric and the power supply voltage of the IC design.

Abstract: Some embodiments of the present disclosure include techniques for generating a capacitor comprising receiving a total capacitance for a capacitor to be generated, determining a number N of unit capacitors having a unit capacitance to be combined to form the total capacitance, generating a transistor level schematic comprising N unit capacitor schematics having the unit capacitance, wherein the N unit capacitor schematics are configured to produce the total capacitance, and generating a layout comprising N capacitor layout elements configured to produce said capacitor.

Abstract: A cell controller includes: a balancing unit which performs balancing of states of charge of a plurality of secondary batteries by discharging or charging each of the plurality of secondary batteries; a first timer which measures an elapsed time after a start of the balancing; a receiving unit which receives a balancing command signal including information regarding balancing times for the secondary batteries; and a first control unit which controls the balancing unit on a basis of the elapsed time after the start of the balancing, and the balancing command signal, the elapsed time being measured by the first timer and the balancing command signal being received by the receiving unit, in which the receiving unit receives the information on the plurality of secondary batteries through the single balancing command signal.

Abstract: A fuel cell system includes a first fuel cell having an electrode area made of first electrode material, and a second fuel cell having an electrode area made of second electrode material having low durability against output voltage variation in comparison with the first electrode material. The fuel cell system is configured to supply electrical power to a motor generator. The fuel cell system includes a required electrical power acquisition unit configured to obtain required electrical power of the motor generator, and a control unit configured to control the second fuel cell in a manner that a variation of output electrical power of the second fuel cell becomes not more than a predetermined limit variation, and control the first fuel cell in accordance with the required electrical power and output electrical power of the second fuel cell.

Abstract: A method of compiling a verification system including a logic system design and a test bench for verifying the logic system design includes: receiving a description of the verification system, parsing the description of the verification system using a first parser and a second parser to generate a first intermediate representation (IR) and a second IR, respectively; analyzing the first and second IRs to generate exchange information; optimizing at least one of the first IR or the second IR based on the exchange information; and generating a first implementable code and a second implementable code respectively based on the first and second IRs after the optimization, wherein the first and second IRs are related by a connection point, and the exchange information is associated with the connection point.

Abstract: Provided is a power source system including: a storage battery; a control unit operating by being supplied with power from the storage battery and monitoring the storage battery; a first switch configured as a latch type switch disposed on a first electrical path between the storage battery and the control unit; and a second switch configured as a latch type switch disposed on a second electrical path between the storage battery and an electrical equipment as an object to which the storage battery supplies power. The first switch and the second switch are connected in parallel to the control unit; current is supplied to the control unit from the storage battery; and the control unit includes a switch control unit configured to stop a current supply to the control unit from the storage battery.

Abstract: In some embodiments, information specifying a transistor to be generated is received, the information comprising an on resistance. A total width of a gate of the transistor to be generated is determined based at least on the on resistance. A first width, a number of fingers (F), and a number of device cells (P) are determined based on the total width. A transistor level schematic is generated comprising one or more transistors configured with the first width and the number of fingers (F). A layout is generated, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F) each gate having said first width, wherein the device cells are configured in a two-dimensional array.