Abstract: A system and method allows resimulation of a portion of a model of an electronic circuit. The system and model may predict and cache data associated with the resimulation of the portion (e.g., the initial state and input signals associated with the portion) in a computer memory. If a request is received to resimulation the portion, the system and method may use the cached data to perform the resimulation.

Abstract: In an integrated circuit (IC) assessment method, an artificial intelligence (AI) component comprising at least one artificial neural network (ANN) is trained to transform layout rendering tiles of a rendering of a reference IC into corresponding reference layout image tiles extracted from at least one layout image of the reference IC. Using the trained AI component, standard cell layout renderings of a library of GDSII or OASIS standard cell layout renderings are transformed into as-fabricated standard cell layout renderings forming a library of as fabricated standard cell layout renderings. Instantiated standard cells and their placements in the layout image of an IC-under-test are identified by matching the instantiated standard cells with corresponding as-fabricated standard cell layout renderings retrieved from the library of as fabricated standard cell layout renderings.

Abstract: A method for establishing a variation model related to circuit characteristics for performing circuit simulation includes: performing first, second, third, and fourth Monte Carlo simulation operations according to a first netlist file and predetermined process model data to generate a first, a second, a third, and a fourth performance simulation results, respectively, where the first netlist file is arranged to indicate a basic circuit in a circuit system; and execute a performance simulation results expansion procedure according to the first, the second, the third, and the fourth performance simulation results to generate a plurality of performance simulation results to establish the variation model, for performing the circuit simulation to generate at least one circuit simulation result according to one or more performance simulation results among the plurality of performance simulation results, where the number of the plurality of performance simulation results is greater than four.

Abstract: In some examples, a method of operating a circuit is described. The method may include performing a circuit function and estimating a probability of failure of the circuit based on one or more stress origination metrics, one or more stress victim events, and one or more initial state conditions.

Abstract: Operations to recognize clock ports within a simulation circuit component and/or recognize a clock signal within simulation waveforms are described. One or more of the operations include generating a plurality of output values at an output port of a circuit simulation component by applying, during a simulation, a plurality of input values to a first input port of the circuit simulation component. The operations also include calculating a correlation vector based on bit sequences in the input values and bit sequences in the output values. The first input port is determined to be a clock port by applying a machine learning model to the correlation vector.

Abstract: A semiconductor integrated circuit design method and apparatus, and relates to the technical field of semiconductors are provided. The semiconductor integrated circuit design method includes: determining, based on an original layout, an original length of an end of a gate structure extending out of an active region in which the gate structure is located; redetermining, based on a preset rule and the original length, a correction length of the end of the gate structure extending out of the active region in which the gate structure is located; and integrating the original layout and the correction lengths, and forming an updated layout.

Abstract: One example includes a method for validating a circuit design. The method includes providing a set of coded rules. Each of the coded rules can define conditions for circuit cells to qualify the circuit design as being radiation-hardened. The method also includes accessing a circuit design netlist associated with the circuit design from a circuit design database. The method also includes evaluating each of the circuit cells in the circuit design netlist with respect to each of the coded rules. The method further includes providing a circuit evaluation report comprising an indication of failure of a set of the circuit cells with respect to one or more of the coded rules in response to the evaluation.

Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to analysis of qubit coherence parameters of a physical qubit layout of a quantum computer. A system can comprise a pulse component for transmitting signals to a qubit, a readout component for receiving signals form the qubit, a memory that stores computer executable component, and a processor that executes the computer executable components stored in the memory. The computer executable components are executable to cause the pulse component to generate a first pulse to drive the qubit, cause the pulse component to generate a second pulse comprising an Autler-Townes off-resonant tone, and determine a probability relative to the qubit, in view of a shift of the qubit to a shifted frequency caused by the second pulse.

Abstract: A method of forming an integrated circuit structure is provided. The method includes: providing a logic cell structure including a first input node, a second input node, and a pulling network connected to a reference voltage and an output node, wherein the pulling network includes a plurality of transistor segments; determining a delay associated with at least one of the first input node and the second input node; and connecting the plurality of transistor segments to the first input node, the second input node and the output node based at least in part on the determined delay.

Abstract: A charging system includes: a power management integrated circuit, a bidirectional voltage conversion circuit, a controller and a battery level detection circuit. The bidirectional voltage conversion circuit is configured to work in a working mode including at least a boost mode and a buck mode. The controller has a first terminal. An input terminal of the battery level detection circuit is connected to a battery, an output terminal of the battery level detection circuit is connected to the first input terminal of the controller, and the battery level detection circuit is configured to detect a voltage and a current of the battery and transmit the voltage and the current of the battery to the controller. The controller is configured to control the working mode of the bidirectional voltage conversion circuit and a working state of the power management integrated circuit according to the battery voltage and the current.

Abstract: A method of performing an entangling gate operation using a quantum computer system includes configuring, by a classical computer, an amplitude function of an amplitude-modulated laser pulse over a plurality of time segments to cause entangling interaction between a pair of trapped ions of a plurality of trapped ions, each of the plurality of trapped ions having two frequency-separated states defining a qubit, where the amplitude function in each time segment is splined using a set of basis functions and associated control parameters, and performing an entangling gate operation between the pair of trapped ions by applying, by a system controller, an amplitude-modulated laser pulse having the configured amplitude function to the pair of trapped ions.

Abstract: A wireless charging system having a power transmitting device may wirelessly transfer power to a power receiving device. The power receiving device may include a voltage regulator that operates independently from the power transmitting device. The voltage regulator may output a rectified voltage and may activate pull-down rectifier switches during zero voltage crossings to boost the rectified voltage. The power receiving device may send control error packets to the power transmitting device to direct the power transmitting device to adjust the transmit power level.

Abstract: Disclosed in the present specification is a wireless power reception device comprising: a power pickup unit configured to receive wireless power from a wireless power transmission device by means of magnetic coupling with the wireless power transmission device at an operational frequency and convert an alternating current signal generated by the wireless power into a direct current signal; a battery configured to receive the direct current signal from the power pickup unit; and a communication/control unit configured to receive the direct current signal from the power pickup unit, perform a handover procedure from in-band communication using the operational frequency to out-band communication using a frequency other than the operational frequency, perform a procedure for selecting a priority display device on which charging status information about the battery is to be displayed through the out-band communication with the wireless power transmission device, and generate the charging status information.

Abstract: Electric vehicle charging scheduling includes receiving repeated sensor readings of a battery of an electric vehicle, the readings monitoring a charge of the battery while the electric vehicle proceeds along a contemporaneously scheduled route. Then, a geolocation of the electric vehicle is determined and a database queried with the geolocation. A charging station is then identified within geographic proximity of the geolocation of the electric vehicle. As well, a route scheduled for the electric vehicle after the contemporaneously scheduled route is determined. Thereafter, a threshold charge is computed that is requisite to complete both the contemporaneously scheduled route and also at least a portion of the route scheduled after the contemporaneously scheduled route. Finally, in response to a determination that the monitored charge on the battery is below the threshold level, an alert is displayed indicating to charge the battery at the identified charging station.

Abstract: Methods, systems and apparatus for approximating a target quantum state that is defined as a result of applying a specific rotation operation to an initial quantum state. A method includes determining multiple configurations of T-gates. Each configuration of T-gates includes a number of T-gates that is less than or equal to a predefined total number of T-gates and represents a rotation operation that, when applied to the initial quantum state, produces an evolved quantum state that is an approximation of the target quantum state. A configuration of T-gates that represents a rotation operation with a rotation angle that is closest to a rotation angle of the specific rotation operation is selected from the multiple configurations of T-gates. A rotation operation represented by the selected configuration of T-gates is applied to the initial quantum state to obtain the approximation of the target quantum state.

Abstract: Kinetic-powered battery systems for musical instrument that can build a charge based on some or all of the physical motion exerted upon the musical instrument. This physical motion can arise from any conceivable activity, including (but not limited to) handling, travel activity, playing the musical instrument and/or intentionally shaking the musical instrument to build a charge prior to use. The kinetic rechargeable power system for musical instruments has application in any conceivable musical instrument, including (but not limited to) acoustic and electric instruments, wireless transmitters or microphones or any related sound reinforcement equipment currently using batteries and subject to movement in travel, setup, use, or intentional movement to create sufficient charge.

Abstract: Disclosed are a quick simulation and optimization method and system for analog circuits. Aiming at a problem that a customized circuit model is difficultly modeled in a design process of the analog circuit, and the problem of a low circuit design efficiency caused by a slow electromagnetic field simulation speed, the invention proposes to firstly construct a device library, build a circuit and interconnect an AI network to obtain a comprehensive network parameter of the AI network; the comprehensive network parameter in a simulation process is compared with a network parameter target of an analog circuit, and an circuit layout of the analog circuit corresponding to the AI network is output to a three-dimensional full-wave electromagnetic field simulation tool for simulation and verification when requirements are met.

Abstract: A method including: obtaining an image of at least part of a substrate, wherein the image includes at least one feature manufactured on the substrate by a manufacturing process including a lithographic process and one or more further processes; determining one or more image-related metrics in dependence on a contour determined from the image, wherein one of the one or more image-related metrics is an edge placement error, EPE, of the at least one feature; and determining one or more control parameters of the lithographic process and/or the one or more further processes in dependence on the edge placement error, wherein at least one control parameter is determined so as to minimize the edge placement error of the at least one feature.

Abstract: A method of minimizing a cost function of a quantum computation is provided. The method comprises receiving input of an initial state of a quantum problem instance comprising a Hamiltonian with an associated cost function. The Hamiltonian is converted into a number of Pauli strings, which are used to form an operator pool. The Pauli strings in the operator pool are ranked according to how much they lower a value of the cost function with respect to the initial state. Pauli strings are iteratively added from the operator pool to a parameterized quantum circuit, in a manner to minimize circuit depth, until a variational quantum eigensolver (VQE) algorithm converges to an approximate ground state wave function generated by the parameterized quantum circuit.

Abstract: A method, involving determining a first distribution of a first parameter associated with an error or residual in performing a device manufacturing process; determining a second distribution of a second parameter associated with an error or residual in performing the device manufacturing process; and determining a distribution of a parameter of interest associated with the device manufacturing process using a function operating on the first and second distributions. The function may include a correlation.