Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a first reference voltage line, a second reference voltage line and a first reference voltage auxiliary line, the first reference voltage line, the second reference voltage line and the first reference voltage auxiliary line are respectively disposed in one of a second wiring layer, a third wiring layer and a fourth wiring layer, the first reference voltage line is electrically coupled to the first reference voltage auxiliary line through via holes penetrating an insulating layer therebetween, the first reference voltage line and the first reference voltage auxiliary line extend in different directions, the second reference voltage line and the first reference voltage auxiliary line extend in a same direction, the first reference voltage line extends in a row or column direction, and the second reference voltage line extends in the row or column direction.

Abstract: A display panel includes: a substrate including an opening area, a display area, and a non-display area, the display area surrounding the opening area, and the non-display area being between the opening area and the display area; a plurality of display elements at the display area of the substrate, each of the display elements including a pixel electrode, an emission layer on the pixel electrode, and an opposite electrode on the emission layer; a thin-film encapsulation layer covering the plurality of display elements; a dam at the non-display area, and protruding from a top surface of a first insulating layer; and a recess between the opening area and the dam, and recessed in a depth direction of the first insulating layer. A lateral wall of the dam meets a first lateral wall from among lateral walls of the recess, the first lateral wall being adjacent to the display area.

Abstract: An inorganic coating may be applied to bond optically scattering particles or components. Optically scattering particles bonded via the inorganic coating may form a three dimensional film which can receive a light emission, convert, and emit the light emission with one or more changed properties. The inorganic coating may be deposited using a low-pressure deposition technique such as an atomic layer deposition (ALD) technique. Two or more components, such as an LED and a ceramic phosphor layer may be bonded together by depositing an inorganic coating using the ALD technique.

Abstract: A photoelectric device includes a first electrode, a second electrode, a photoelectric conversion layer between the first electrode and the second electrode, and a charge transport layer between the first electrode and the photoelectric conversion layer. The photoelectric conversion layer is configured to absorb light in a wavelength spectrum and converting the absorbed light into an electrical signal. The charge transport layer includes a first charge transport material and a second charge transport material which collectively define a heterojunction.

Abstract: A display apparatus includes: a base substrate; a thin film transistor and a power supply wire on the base substrate; a first electrode on the base substrate, and electrically connected to the thin film transistor; a light emitting layer and a common layer on the first electrode; and a second electrode on the common layer. The power supply wire includes: a first conductive layer; a second conductive layer on the first conductive layer; and a third conductive layer on the second conductive layer. The third conductive layer protrudes more than the second conductive layer on a side surface of the power supply wire, and the second electrode contacts a side surface of the second conductive layer.

Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.

Abstract: An array substrate, a display panel including the array substrate, and a fabrication method of the array substrate are provided. The array substrate includes a base substrate, a light-shielding portion, a thin-film transistor and a capacitor. The light-shielding portion is formed on a first surface of the base substrate. The thin-film transistor is formed on a side of the light-shielding portion away from the base substrate, and includes an active layer. The capacitor is formed on the first surface of the base substrate, and includes a first capacitive electrode and a second capacitive electrode. The first capacitive electrode and the second capacitive electrode are at least partially arranged opposite to each other in a direction perpendicular to the first surface of the base substrate. The first capacitive electrode is provided in a same layer as the light-shielding portion.

Abstract: A display device includes a substrate including a display area including pixels, and a light transmissive area including a portion in the display area, and signal lines disposed in the display area and electrically connected with the pixels, where the signal lines include a first signal line on a first side, a second signal line on a second side and arranged with the first signal line in a first direction, and a third signal line on a third side, and the third signal line is arranged with the first signal line and the second signal line in a second direction, the first and second signal lines are insulated from each other in the display area, and a length of the first signal line is longer than a length of the second signal line in the first direction.

Abstract: An entangled inductor structure generates opposite polarity internal magnetic fields therein to substantially reduce, or cancel, external magnetic fields propagating outside of the entangled inductor structure. These reduced external magnetic fields propagating outside of the entangled inductor structure effectively reduce a keep out zone (KOZ) between the entangled inductor structure and other electrical, mechanical, and/or electro-mechanical components. This allows the entangled inductor structure to be situated closer to these other electrical, mechanical, and/or electro-mechanical components within the IC as compared to conventional inductors which generate larger external magnetic fields.

Abstract: In some embodiments, a field effect transistor (FET) structure comprises a body structure, dielectric structures, a gate structure and a source or drain region. The gate structure is formed over the body structure. The source or drain region is embedded in the body structure beside the gate structure, and abuts and is extended beyond the dielectric structure. The source or drain region contains stressor material with a lattice constant different from that of the body structure. The source or drain region comprises a first region formed above a first level at a top of the dielectric structures and a second region that comprises downward tapered side walls formed under the first level and abutting the corresponding dielectric structures.

Abstract: A display device including: a substrate including a display area and a peripheral area adjacent to the display area; a plurality of data lines extending in a first direction in the display area; a fan-out unit arranged in the peripheral area and connected to the plurality of data lines; a first signal line arranged in the peripheral area; and a common power supply line arranged in the peripheral area and overlapping the fan-out unit.

Abstract: A display device includes a substrate having a first side and a second side, a display region having a light-emitting element that includes an electrode, a pixel electrode disposed between the substrate and the electrode in a thickness direction of the substrate, and a light-emitting function layer disposed between the pixel electrode and the electrode in the thickness direction, a drive circuit disposed between the first side and the display region in plan view, and a conductive layer having a first portion extending between the first side and the display region in plan view and along the first direction, and a second portion extending between the second side and the display region in plan view and along the second direction, wherein a width of the first portion in the second direction is greater than a width of the second portion in the first direction.

Abstract: A display apparatus includes a thin film transistor on the substrate, the thin film transistor including a first semiconductor layer and a first gate electrode overlapping the first semiconductor layer wherein a first gate insulating layer is disposed between the first semiconductor layer and the first gate electrode, and a storage capacitor including a lower electrode including a first lower layer and a first upper layer stacked each other and an upper electrode including a second lower layer and a second upper layer stacked each other, wherein the upper electrode overlaps the lower electrode, and a second gate insulating layer is disposed between the upper electrode and the lower electrode, a display element electrically connected to the thin film transistor, wherein the second upper layer has a thickness greater than a thickness of the first upper layer.

Abstract: A display device includes a display panel having improved reliability and a reduced non-display area. The display panel includes: a substrate including a non-display area and a display area outside the non-display area, the non-display area surrounding an transmission area; a plurality of display elements arranged in the display area; a plurality of first lines extending in a first direction and including a detour portion that detours around an edge of the transmission area; and a shield layer arranged over the detour portion of the non-display area so as to overlap the detour portion and include a hole corresponding to the transmission area.

Abstract: Disclosed is a variable resistance memory device including a first conductive line extending in a first direction parallel to a top surface of the substrate, memory cells spaced apart from each other in the first direction on a side of the first conductive line and connected to the first conductive line, and second conductive lines respectively connected to the memory cells. Each second conductive line is spaced apart in a second direction from the first conductive line. The second direction is parallel to the top surface of the substrate and intersects the first direction. The second conductive lines extend in a third direction perpendicular to the top surface of the substrate and are spaced apart from each other in the first direction. Each memory cell includes a variable resistance element and a select element that are positioned at a same level horizontally arranged in the second direction.

Abstract: A display device includes two pixel circuits spaced apart from each other with a transmission area therebetween, a first insulating layer on the two pixel circuits, two pixel electrodes on the first insulating layer, and a second insulating layer including a first portion covering an edge of each of the two pixel electrodes and a second portion, wherein the first insulating layer includes a third portion overlapping the two pixel electrodes, and a fourth portion having a height greater than a height from the substrate to a top surface of the third portion, wherein the first portion of the second insulating layer overlaps the third portion, and the second portion of the second insulating layer overlaps the fourth portion, wherein a height from the substrate to a top surface of the second portion is greater than a height from the substrate to a top surface of the first portion.

Abstract: A display device includes an organic light emitting diode, a first transistor driving the organic light emitting diode, a second transistor transmitting a data signal to the first transistor, a third transistor transmitting a first power voltage to the first transistor, wherein a semiconductor pattern of the first transistor is disposed over a semiconductor pattern of the second transistor, a semiconductor pattern of the third transistor is disposed over the semiconductor pattern of the first transistor, a lower transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the second transistor, and an upper transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the third transistor.

Abstract: Disclosed herein are IC structures, packages, and devices that include III-N transistor-based cascode arrangements that may simultaneously realize enhancement mode transistor operation and high voltage capability. In one aspect, an IC structure includes a source region, a drain region, an enhancement mode III-N transistor, and a depletion mode III-N transistor, where each of the transistors includes a first and a second source or drain (S/D) terminals. The transistors are arranged in a cascode arrangement in that the first S/D terminal of the enhancement mode III-N transistor is coupled to the source region, the second S/D terminal of the enhancement mode III-N transistor is coupled to the first S/D terminal of the depletion mode III-N transistor, and the second S/D terminal of the depletion mode III-N transistor is coupled to the drain region.

Abstract: Exemplary methods of backplane processing are described. The methods may include forming a first metal oxide material on a substrate. The methods may include forming a metal layer over the first metal oxide material. The metal layer may be or include silver. The methods may include forming an amorphous protection material over the metal layer. The amorphous protection material may include a second metal oxide material. The methods may include forming a second metal oxide material over the amorphous protection material. The second metal oxide material may include a crystalline material having one or more grain boundaries. The grain boundaries may include one or more voids.

Abstract: A display device and a method for manufacturing a display device are disclosed. The display device may prevent a leakage current from occurring between adjacent pixels. The display device comprises a substrate, a first electrode provided in each of a first subpixel and a second subpixel arranged to be adjacent to the first subpixel, on the substrate, a trench provided between the first subpixel and the second subpixel, a light emitting layer provided in each of the first subpixel and the second subpixel on the first electrode, a second electrode provided in each of the first subpixel and the second subpixel on the light emitting layer, and a third electrode electrically connecting the second electrode provided in the first subpixel with the second electrode provided in the second subpixel. The second electrode is disconnected between the first subpixel and the second subpixel by the trench.