Abstract: A first Radio-Frequency-to-Direct-Current (RF2DC) transducer receives a first signal from a sensing antenna and generates energy stored by an energy storage circuit. An energy transfer circuit is controllably switched between an energy storage state where energy is stored in the energy storage state and an energy transfer state where stored energy is transferred to a load. The voltage at the energy storage circuit is alternatively variable between an upper value and a lower value around a voltage setting point. A second RF2DC transducer, which is a down-scaled replica of the first RF2DC transducer, produces a second signal indicative of an open-circuit voltage of the first RF2DC transducer. The voltage setting point is set as a function of the second signal indicative of the open-circuit voltage of the first RF2DC transducer.

Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

Abstract: In various embodiments, a clock pulse generation circuit may include a combination circuit, a first set-reset (SR) latch, a second SR latch, and a pulse generator. The combination circuit may be configured to generate a set signal based on an external clock signal. The first SR latch may be configured to generate an internal clock signal based on the reset signal and the set signal. The second SR latch may be configured to generate the reset signal based on the external clock signal and a reset pulse signal. The pulse generator may be configured to generate the reset pulse signal based on the internal clock signal. As a result, the clock pulse generation circuit may be configured to prevent the set signal from being asserted when the reset signal is asserted.

Abstract: A drive apparatus that drives a control terminal of a main switching element establishing/cutting off an electrical connection between a first main terminal and a second main terminal is provided, including first to fourth switching elements establishing/cutting off electrical connections between a positive terminal of a power source and the control terminal, the positive terminal and the second main terminal, the control terminal and a negative terminal of the power source, and the second main terminal and the negative terminal, respectively, and a resistance of at least one among a path between the control terminal and the second main terminal via the first to second switching elements, a path via the first and fourth switching elements, a path via the second to third switching elements, and a path via the third to fourth switching element is different from a resistance of at least one of the others.

Abstract: The power conversion device includes common DC buses, AC buses, DC connection terminals, AC connection terminals, N pairs of distributed power supply connection terminals, N DC/DC converters for transferring power between the common DC buses and the distributed power supply connection terminals, M DC/AC converters for transferring power between the AC buses and the common DC buses, and a control unit for controlling each converter on the basis of a high-order control command. The DC connection terminals are connected to the common DC buses and connected to an external DC power distribution grid, the AC connection terminals are connected to the AC buses and connected to an external AC power distribution grid, and the distributed power supply connection terminals are connected to the DC/DC converters and connected to external DC distributed power supplies.

Abstract: A device includes a first diode and a second diode connected in series between a first terminal and a second terminal of a switching element, wherein the switching element is a unidirectional device and an anode of the first diode is directly connected to an anode of the second diode, a third diode connected between the first terminal and the second terminal of the switching element and a switch connected in parallel with the first diode.

Abstract: Duty cycle correction devices for static compensation of an active clock edge shift. A duty cycle correction circuit in the duty cycle correction device corrects a clock input signal, according to a first control signal. A programmable delay circuit or a modified duty cycle correction circuit in the duty cycle correction device compensates a shift of an active clock edge in a clock output signal of the duty cycle correction circuit, according to a second control signal. A mapping circuit in the duty cycle correction device generates the second control signal by mapping a digital value of the first control signal and a digital value of the second control signal.

Abstract: An electrical switch for switching an electric current is disclosed. The electrical switch includes an electronic trip unit, embodied in a bipartite fashion. A first part of the trip unit is fixedly connected to the electrical switch and includes protection functions of the electrical switch. A second part of the trip unit is embodied mountably and detachably on the electrical switch and defines the protection functions enabled for the customer.

Abstract: A width of a voltage pulse signal is directly proportional to a difference between first and second resistances in a pulse generator. The voltage pulse signal is generated with a ramp signal, two reference voltages, and two comparators. The first reference voltage is generated with the first resistance and a first current, and the second reference voltage is generated with the second resistance and a second current. The first comparator produces a first comparator output in response to the first reference voltage and the ramp signal, and the second comparator produces a second comparator output in response to the second reference voltage and the ramp signal. A logic circuitry generates the voltage pulse signal in response to the two comparator outputs.

Abstract: Methods and systems are described for generating, at a plurality of delay stages of a local oscillator, a plurality of phases of a local oscillator signal, generating a loop error signal based on a comparison of one or more phases of the local oscillator signal to one or more phases of a received reference clock, generating a plurality of phase-specific quadrature error signals, each phase-specific quadrature error signal associated with a respective phase of the plurality of phases of the local oscillator signal, each phase-specific quadrature error signal based on a comparison of the respective phase to two or more other phases of the local oscillator signal, and adjusting each delay stage according to a corresponding phase-specific quadrature error signal of the plurality of phase-specific quadrature error signals and the loop error signal.

Abstract: A photovoltaic system includes groups of solar cells that can be switched in and out of the photovoltaic system. In response to detecting initiation of rapid shutdown, a control circuit controls a switch device to switch out a group of solar cells to lower the output voltage of the photovoltaic system below a safety level. In response to detecting a release trigger that indicates resumption of normal operation, the control circuit controls the switch device to switch back the group of solar cells to restore the output voltage of the photovoltaic system to a normal operating level. Solar cells may be switched out by disconnecting them from the photovoltaic system and switched back by reconnecting them into the photovoltaic system. Solar cells may also be switched out by shorting them out of the photovoltaic system and switched back in by removing the short.

Abstract: A method for transmitting power includes providing power using a contactless power transfer from a transmitter to a receiver that is mutually coupled with the transmitter. The method also includes managing and regulating the contactless power transfer being provided, where the managing and regulating are integrally and autonomously performed by the transmitter.

Abstract: A system includes a bandgap voltage generator coupled to a voltage supply and configured to produce a plurality of reference voltage levels in response to a plurality of calibration codes; an analog-to-digital converter (ADC) coupled to a reference voltage output of the bandgap voltage generator; a logic circuit coupled to an output of the ADC; a first memory element coupled to the logic circuit and configured to store a calibration coefficient indicative of a relationship of the calibration codes and the reference voltage levels; and a second memory element coupled to the logic circuit and configured to store a value of a first reference voltage level for the reference voltage output, wherein the logic circuit is configured to generate a first calibration code from the value of the first reference voltage level and the calibration coefficient.

Abstract: A common mode voltage level shifting and locking circuit is provided. The common mode voltage level shifting and locking circuit includes an operational amplifier, a source follower, a first feedback circuit, and a second feedback circuit. The operational amplifier generates a first common mode voltage. The source follower shifts the first common mode voltage to generate a second common mode voltage. The first feedback circuit generates a first control signal according to the second common mode voltage. The operational amplifier adjusts the first common mode voltage according to the first control signal. The second feedback circuit generates a second control signal according to an external reference voltage provided by a next stage circuit. The source follower adjusts the second common mode voltage according to the second control signal such that the next stage circuit reaches a maximum input common mode range.

Abstract: In certain aspects, a bias generation circuit comprises a bias voltage generator. The bias voltage generator has a main NMOS transistor having a drain and a gate of the main NMOS transistor both coupled to a first terminal, a main resistor having a first main resistor terminal and a second main resistor terminal, wherein the first main resistor terminal couples to a source of the main NMOS transistor; and a main PMOS transistor having a source of the main PMOS transistor coupled to the second main resistor terminal and a drain and a gate of the main PMOS transistor both coupled to a second terminal, wherein the second terminal couples to a main ground. The bias generation circuit further comprises an array of sensors coupled to the first terminal and the second terminal.

Abstract: A tag circuit which allows a load connectable thereto to have a wider power consumption range and which is usable in a wider input power range is provided. The tag circuit includes: a control part which is configured to respond to a command extracted from a radio wave received by an antenna by controlling a load; and a rectifying part which is configured to generate DC power to be supplied to the control part and DC power to be supplied to the load by converting a radio wave received by the antenna into DC power, the rectifying part being capable of changing power conversion characteristics of converting the radio wave received by the antenna into DC power to be supplied to the load.

Abstract: In a system for non-contact transmission of electrical energy to a mobile part movably arranged on a facility floor, a charge unit is situated in a recess of the floor, the charge unit has a receiving part having upper and lower cover parts, a primary winding is accommodated in the upper cover part, the receiving part at least partially restricts a space region that accommodates an electronic circuit, a bore penetrates the lower cover part, and terminates via its first end region in the space region and terminates via its other end region in a further space region which is at least partially restricted by a dome wall provided on the lower cover part, and a diaphragm is situated on the bore.

Abstract: An electronic device includes a power management integrated circuit (PMIC) including a plurality of regulators. Each of the plurality of regulators has a current meter configured to measure a respective load current. A load device is configured to receive real-time load current information from the PMIC and to perform a performance improvement operation based on the real-time load current information.

Abstract: In a system for a non-contact transmission of electrical energy to a mobile part, the system has a bore introduced into a floor material, a frame part is accommodated in the bore, a receiving part is situated in the frame part, an electronic circuit is situated in the receiving part, the receiving part is at least partially covered by a cover part in the manner of a housing, in particular on one of its sides, a sheet-metal part is situated between the receiving part and the frame part, and the sheet-metal part touches the receiving part and the sheet-metal part touches the frame part.

Abstract: An apparatus includes a power switch configured to conduct a dc or ac current, a sense switch having a first drain/source terminal and a gate connected to a first drain/source terminal and a gate of the power switch respectively, an amplifier having a first input coupled to a second drain/source terminal of the power switch and a second input coupled to a second drain/source terminal of the sense switch and a first current sense processing switch having a gate connected to an output of the amplifier.