Patents Examined by Quoc D. Hoang
  • Patent number: 10825860
    Abstract: An optoelectronic device comprises a substrate; a first optoelectronic unit formed on the substrate; a second optoelectronic unit formed on the substrate; a plurality of third optoelectronic units formed on the substrate, electrically connected to the first optoelectronic unit and the second optoelectronic unit; a plurality of first electrodes respectively formed on the first optoelectronic unit, the second optoelectronic unit and the plurality of third optoelectronic units; a plurality of second electrodes respectively formed on the first optoelectronic unit, the second optoelectronic unit and the plurality of third optoelectronic units; an optical layer surrounding the first optoelectronic unit, the second optoelectronic unit and the plurality of third optoelectronic units in a top view of the optoelectronic device; a third electrode formed on the first optoelectronic unit and one of the plurality of third optoelectronic units; and a fourth electrode formed on the second optoelectronic unit and another one
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: November 3, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chao Hsing Chen, Jia Kuen Wang, Chien Fu Shen, Chun Teng Ko
  • Patent number: 10826275
    Abstract: A light emitting element includes a laminated structure formed by laminating a first light reflecting layer 41, a light emitting structure 20, and a second light reflecting layer 42. The light emitting structure 20 is formed by laminating, from the first light reflecting layer side, a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22. In the laminated structure 20, at least two light absorbing material layers 51 are formed in parallel to a virtual plane occupied by the active layer 23.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: November 3, 2020
    Assignee: SONY CORPORATION
    Inventors: Tatsushi Hamaguchi, Shoichiro Izumi, Susumu Sato, Noriyuki Futagawa
  • Patent number: 10804441
    Abstract: A light-emitting device is provided. The light-emitting device includes a substrate including a plurality of pixels, each pixel including a plurality of subpixels designed to emit light with different colors. The plurality of subpixels includes a first subpixel designed to emit red light, a second subpixel designed to emit green light, and a third subpixel designed to emit blue light. The first subpixel includes a first light source formed on the substrate, a red light-emitting layer covering the first light source, and a first yellow color filter covering the red light-emitting layer. The second subpixel includes a second light source formed on the substrate, a green light-emitting layer covering the second light source, and a second yellow color filter covering the green light-emitting layer. The third subpixel includes a third light source formed on the substrate. A method for fabricating the light-emitting device is also provided.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: October 13, 2020
    Assignee: Visera Technologies Company Limited
    Inventors: Wei-Ko Wang, Chia-Hui Wu
  • Patent number: 10804348
    Abstract: Disclosed is an organic light emitting display apparatus and a method of manufacturing the same, which prevent an organic light emitting layer from being peeled from an anode electrode.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: October 13, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventor: KaKyung Kim
  • Patent number: 10804199
    Abstract: A method of fabricating interconnects in a semiconductor device is provided, which includes forming an interconnect layer with a plurality of first conductive lines formed of a first conductive material in a dielectric layer. At least one via opening is formed over the plurality of first conductive lines and an interconnect via formed of a second conductive material is formed in the via opening, wherein the formed interconnect via has a convex top surface.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: October 13, 2020
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yongjun Shi, Ruilong Xie, Nan Fu, Chun Yu Wong
  • Patent number: 10804492
    Abstract: The present invention relates to a flexible OLED panel, thin-film encapsulation structure of flexible panel and encapsulation method for the same. The present invention includes a first inorganic layer, a first organic layer and a second inorganic layer structure, wherein the first organic layer is prepared by using hexamethyldisiloxane which is an organic material to form the first retaining wall. The hydrophilicity/hydrophobicity between the first retaining wall and the first organic layer is oppositely disposed such that the surface of the first retaining wall and the first organic layer do not mutually dissolve when contacted. The feature can greatly reduce the thickness of the at least one retaining wall. While ensuring that the flexible panel display region is shielded from external water oxygen, covering the particle contaminant of the flexible panel, buffering the stress during bending and folding, and the present invention has more simplified and more reliable features.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: October 13, 2020
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jing Huang, Hsiang Lun Hsu
  • Patent number: 10796833
    Abstract: An electrical device structure including a magnetic tunnel junction structure having a first tunnel junction dielectric layer positioned between a free magnetization layer and a fixed magnetization layer. A magnetization enhancement stack present on the magnetic tunnel junction structure. The magnetization enhancement stack includes a second tunnel junction layer that is in contact with the free magnetization layer of the magnetic tunnel junction structure, a metal contact layer present on the second tunnel junction layer, and a metal electrode layer present on the metal contact layer. A metallic ring on a sidewall of the magnetic enhancement stack, wherein a base of the metallic ring may be in contact with the free magnetization layer of the magnetic tunnel junction structure.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: October 6, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicholas A. Lanzillo, Benjamin D. Briggs, Michael Rizzolo, Theodorus E. Standaert, Lawrence A. Clevenger, James Stathis
  • Patent number: 10791593
    Abstract: An organic EL display unit includes a first substrate, a second substrate, a display layer, and a sealing section. The display layer is provided between the first substrate and the second substrate. The display layer includes an organic layer. The sealing section is provided continuously from an end surface of the display layer to at least a portion of respective end surfaces of the first substrate and the second substrate.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: September 29, 2020
    Assignee: Sony Corporation
    Inventors: Keishi Tada, Jiro Yamada, Shinichiro Morikawa, Masaaki Sekine, Naoki Matsushita, Kohji Hanawa
  • Patent number: 10784425
    Abstract: The light illumination module includes a substrate, a plurality of wiring patterns formed in parallel on the substrate, and a plurality of LED devices disposed on the wiring patterns. Each wiring pattern has a stripe-shaped portion extending in a first direction, a first protrusion portion protruding in a second direction, and a second protrusion portion protruding in an opposite direction. The first and second protrusion portions are formed in an alternating manner along the first direction, and the LED devices are disposed on the first protrusion portion and the stripe-shaped portion at a location corresponding to the second protrusion portion. A first electrode of each LED device is electrically connected to the first protrusion portion or the stripe-shaped portion immediately below, and a second electrode of each LED device is electrically connected to the stripe-shaped portion or the second protrusion portion of an adjacent wiring pattern with a wire.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: September 22, 2020
    Assignee: HOYA CANDEO OPTRONICS CORPORATION
    Inventor: Hiroki Watanabe
  • Patent number: 10784422
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: September 22, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: David Clark, Curtis Zwenger
  • Patent number: 10763331
    Abstract: A semiconductor device includes a bulk substrate, and an epitaxial layer formed on a surface of the bulk substrate. A part of the surface of the bulk substrate is an alignment region including an alignment pattern defined by at least one recess or one protrusion. An ion-injected layer is formed in at least a part of the alignment region.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: September 1, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Kouichi Saitou
  • Patent number: 10756213
    Abstract: A method of forming a multi-valued logic transistor with a small footprint and the resulting device are disclosed. Embodiments include forming plural fins on a silicon substrate, each fin covered with a hardmask; filling spaces between the fins and hard masks with an oxide; removing the hardmasks and recessing each fin, forming a cavity in the oxide over each fin; forming plural Si-based layers in each cavity with an increasing percentage of Ge or C or with an decreasing concentration of dopant from a bottom layer to a top layer; performing CMP for planarization to a top of the fins; recessing the oxide to a depth slightly below a top portion of the fin having a thickness equal to a thickness of each Si-based layer; and forming a high-k gate dielectric and a metal gate electrode over the plural Si-based layers.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: August 25, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Min-hwa Chi, Ajey Jacob, Abhijeet Paul
  • Patent number: 10756156
    Abstract: A display device includes a substrate, a pixel circuit unit which is disposed on the substrate and having a first hole, a light blocking layer which is disposed on the pixel circuit unit and having a second hole corresponding to the first hole, a light emitting layer disposed on the pixel circuit unit, and a sealing unit on the light blocking layer. The substrate includes a first layer having a depression corresponding to the first hole, and a second layer which is disposed between the first layer and the pixel circuit unit and having a third hole between the depression and the second hole. The sealing unit includes a cover portion on the light blocking layer, and an extension portion extending from the cover portion. The depression has a width larger than a width of the third hole.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: August 25, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wooyong Sung, Junghan Seo, Kwanhyuck Yoon, Sooyoun Kim, Jongki Kim, Seungho Yoon, Heeyeon Lee, Moonwon Chang
  • Patent number: 10756232
    Abstract: Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: August 25, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Miyuki Hosoba, Suzunosuke Hiraishi
  • Patent number: 10748839
    Abstract: The present invention provides a leadframe component and a package structure. The leadframe component includes a first leadframe and a second leadframe. The first leadframe includes a first chip-mounting portion for carrying a first chip, a first coil portion, a plurality of first pins and a plurality of first floated pins. The second leadframe includes a second chip-mounting portion for carrying a second chip, a second coil portion, a plurality of second pins and a plurality of second floated pins. The first leadframe is disposed above or under the second leadframe for aligning the first coil portion with the second coil portion.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: August 18, 2020
    Assignee: LITE-ON SINGAPORE PTE. LTD.
    Inventor: You-Fa Wang
  • Patent number: 10748925
    Abstract: A three-dimensional memory device includes a vertical semiconductor channel surrounding a vertical dielectric core. Laterally extending dielectric pegs structurally support the vertical semiconductor channel and the vertical dielectric core. The vertical semiconductor channel may be a single crystalline semiconductor channel.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 18, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Masanori Tsutsumi, Manabu Kakazu, Raghuveer S. Makala, Senaka Kanakamedala
  • Patent number: 10741614
    Abstract: A display device and an eyeglasses-like augmented reality device using the same are provided. The display device includes a display panel including a lower substrate and an upper substrate and having a display area, an insulating layer that lies over the lower substrate and has a sloped surface in the display area, and an organic light-emitting diode on the insulating layer. The insulating layer has different slopes for different positions in the display area.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: August 11, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Younghoon Son, Yeonsuk Kang
  • Patent number: 10741800
    Abstract: The film-forming method according to an embodiment of the present invention includes: a step A for forming a photocurable resin liquid film on a substrate; a step B for vaporizing the photocurable resin in a first region on the substrate by selectively irradiating the first region with infrared rays or visible light having a wavelength that is longer than 550 nm; and a step C for obtaining a photocured resin film by curing the photocurable resin in the second region on the substrate, said second region including the first region, by irradiating, simultaneously with the step 3 or after performing the step 3, the second region with light, to which the photocurable resin is sensitive.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: August 11, 2020
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Katsuhiko Kishimoto
  • Patent number: 10734460
    Abstract: The disclosure provides a display device, including a substrate, a pixel define layer, a conductive line and a spacer. The pixel define layer is disposed on the substrate, wherein the pixel define layer includes a first opening region and a second opening region, wherein the second opening region is adjacent to the first opening region. The conductive line is disposed on the substrate, wherein in a top view of the display device, the conductive line is located between the first opening region and the second opening region. The spacer is disposed on the substrate, wherein the spacer at least partially overlaps the conductive line.
    Type: Grant
    Filed: April 28, 2019
    Date of Patent: August 4, 2020
    Inventors: Hsia-Ching Chu, Pai-Chiao Cheng
  • Patent number: 10727425
    Abstract: A foldable display device and its manufacturing method are disclosed, in which a flexible cover plastic is used as a cover window and internal elements may be prevented from being damaged due to external impact. The foldable display device comprising a thin film transistor substrate; a first adhesive layer arranged on the thin film transistor substrate; a second adhesive layer arranged outside the first adhesive layer on the thin film transistor substrate; and a touch substrate arranged on the first and second adhesive layers, wherein the second adhesive layer includes a rigid material and is arranged on areas outside the first adhesive layer except a folding area where the thin film transistor substrate is folded.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: July 28, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventor: HongSik Kim