Abstract: In the manufacture of semiconductor integrated circuit devices, semiconductor regions such as, e.g., doped regions or tubs are separated by an etched trench which is self-aligned with respect to such regions on account of the presence of an etch-resistant layer overlying the regions during etching. In accordance with preferred processing of the invention a first layer is formed alongside the trench to be etched, a spacer second layer is formed alongside the edge of the first layer, and a third layer is formed abutting the spacer. The spacer is etched away while first and third layers remain in place, and the trench is etched in the space between the first and third layers. A preferred etchant comprises CF.sub.3 Br and oxygen.

Abstract: For end-to-end alignment of two optical waveguides one of which is in the form of a strip buried in a semiconductor wafer, a longitudinal lateral mark is used constituted by the flank of a valley etched in the wafer and self-aligned to the strip formed beforehand. To achieve this self-alignment a protection layer is deposited in the area in which the mark is to be formed, a register layer is deposited on top of the protection layer and a photosensitive resin is deposited on top of these layers and the substrate. First selective etching eliminates the register layer at the location of the valley of the mark. Second and third selective etching respectively etch the lateral channels of the strip and then the valley of the mark.

Abstract: A holding apparatus, a metal deposition system and a wafer processing method which preserve topographical marks, including those used as alignment targets, on a semiconductor wafer by preventing metal from depositing on such marks during metal deposition. The invention eliminates the need to use window mask and etch techniques to provide replication of topographical marks on a newly formed metal layer when a CMP planarization technique is used prior to metal deposition. As a result, cost, cycle time and yield loss due to the additional window mask and etch steps can be eliminated. The holding apparatus includes a wafer retainer for retaining a wafer which has at least one topographical mark and a clamp ring with at least one tab. The wafer is pressed against the clamp ring by the retainer for securing the wafer in the retainer.

Abstract: Self-aligned silicide regions (24) are formed in a semiconductor device (10) using vapor phase reaction. A chemical vapor deposition system (40) is used, but rather than depositing a blanket silicide material, a precursor (48) is introduced into the reaction chamber (42) and reacts with only exposed silicon and polysilicon members of the device. The reaction is assisted by heating the substrate to a temperature at which the precursor is volatile. Because the precursor source reacts only with exposed silicon and polysilicon regions, subsequent etch steps are unnecessary. In one form, cobalt silicide regions are formed using a cobalt carbonyl as the precursor source.

Abstract: A substrate for use to form an amorphous semiconductor having excellent characteristics, and an amorphous semiconductor substrate comprising a substrate of this kind are disclosed. A method of producing the amorphous semiconductor substrate is also disclosed. An amorphous semiconductor such as a--Si, a--Si alloys, or the like is deposited on a substrate by utilizing an RF plasma having a frequency greater than 50 MHz in an atmosphere whose partial gas pressure associated with a residual gas other than inert gas and hydrogen is less than 10.sup.-8, while applying a bias voltage including a DC component to the substrate during the deposition process. The present invention is characterized in that the substrate has a surface layer having an amorphous structure wherein electric charges may move at least through said surface layer.

Abstract: A surface treating method of the invention comprises the steps of generating mixed chemical species containing an intended chemical species of ions necessary for surface treatment by ionization of a gas, selectively trapping the intended chemical species from the mixed chemical species, exciting the intended chemical species to predetermined vibrational and electronic states, extracting the excited chemical species from a position where trapped, and subjecting the extracted chemical species to surface treatment on a surface of an article to be treated. In this method, the intended chemical species of ions which are under vibrational and electronic conditions effective for the surface treatment and have a certain mass number have been once trapped at a given position. The trapped ions are uniformly arranged with respect to their translational velocity and applied to a sample surface. Thus, dry etching with high anisotropy and high selectivity to material and deposition with good uniformity can be realized.

Abstract: To provide a GaP red light emitting element substrate which a large amount of oxygen is doped in the p-type GaP layer, and which very few Ga.sub.2 O.sub.3 precipitates develop on and/or in p-type GaP layer, and methods of manufacturing said substrate. After the n-type GaP layer 2 is grown on the n-type GaP single crystal substrate 1, when forming the p-type GaP layer 3 doped with Zn and O, on said n-type GaP layer 2 by means of the liquid phase epitaxial growth method, the p-type GaP layer 3 is grown by using a Ga solution with a high concentration of oxygen, and said Ga solution is removed from the substrate 1 to complete the growth when the temperature is lowered to a prescribed temperature of 980.degree. C. or higher. When the temperature has reached the prescribed temperature of 980.degree. C.

Abstract: The disclosure is directed to improved techniques and devices employing an aluminum-bearing III-V semiconductor material and a native oxide of aluminum that is formed in the semiconductor material. Effective optical confinement, tailored to obtain desired operating conditions, can be achieved with a thick native oxide of aluminum that extends through at least one-third of the thickness of the aluminum-bearing layer in which the native oxide is formed. The resultant lateral index step can be made quite large and employed for devices such as ring lasers.

Abstract: A crystal of a compound semiconductor is deposited on a substrate using a metal organic vapor phase epitaxy within a reaction enclosure having a vertical flow of deposition gas supplied through a gas injector within the deposition enclosure. The deposition gas is supplied in a plurality of divided flow paths in which the flow rates are individually controlled. The injector comprises a plurality of gas jet ports which receive respective, plural flow paths and which are disposed in a two-dimensional array having dimensions corresponding to the two-dimensional main surface dimensions of the substrate thereby to supply a uniform flow of deposition gas over the entire two-dimensional main surface of the substrate. The method and apparatus have special application in the deposition of quaternary III--V compound semiconductor.

Abstract: Disclosed is a method of fabricating a two-color radiation detector, and two-color photodetectors fabricated by the method. A structure is grown upon a substrate (10) to provide, in sequence, a LPE grown LWIR n-type layer (12), a MWIR p+ type common contact layer (14), and a MWIR n-type layer (16). Following growth of the MWIR n-type layer, a layer of passivation (18) is applied, and the substrate is removed to so as to enable further processing of the structure into an array (1) of two-color photodetectors. The three layer structure is bonded, prior to further processing, to a supporting substrate (22) with an adhesive bond made to the passivation layer. The supporting substrate is comprised of IR transparent material such as Group IIB-VIA semiconductor material, Group IIIA-VA semiconductor material, Group IVA semiconductor material, sapphire, and combinations thereof.

Abstract: An interface having low resistance is formed between a single crystal silicon surface and deposited silicon. Before deposition of the silicon, the oxide or nitride layer covering the surface is removed in conventional fashion. The exposed surface is then pre-treated with a plasma etch containing SF.sub.6. Because fluorine is more electro-negative than oxygen, fluorine atoms adhere to the exposed single crystal silicon surface, where their presence prevents reoxidation. Silicon is then deposited on the surface by thermal decomposition of silane, during which deposition the fluorine atoms form silicon-tetrafluoride, which gas is evacuated during a normal out-gas cycle. The resultant interface, which may be an emitter-base junction, exhibits an effective resistance of only a few ohms.

Abstract: A method of producing a mesa embedded optical semiconductor device includes the following steps. A multilayer semiconductor structure is formed which includes a laser active layer and an adjoining layer, on a substrate. The multilayer semiconductor structure is selectively etched to form a mesa structure and expose a first planar surface around a root of the mesa structure. The mesa structure is formed to have a second planar surface which is orthogonal to a side wall of the mesa structure and is lower than a top surface of the mesa structure, and a planar side wall formed by a side wall of the laser active layer and a side wall of the adjoining layer. An embedded layer is formed, by vapor growth deposition, at the first planar surface, the second planar surface, and the planar side wall of the mesa structure, such that the embedded layer is free of voids.

Abstract: A vapor phase epitaxial growth method of a compound semiconductor is provided. On a semiconductor substrate held by a holder, a first epitaxial layer is grown using a first growth gas and then, a separator gas is emitted to the vicinity of the substrate to separate the substrate from the first growth gas. After the separator gas is removed from the vicinity, a second growth gas is supplied to the vicinity to form a second epitaxial layer on the first epitaxial layer. Since the substrate is separated by the separator gas from the first growth gas, transition regions of crystal composition and carrier concentration are difficult to be generated.

Abstract: A process for fabricating sequential inductors and varactor diodes of a monolithic, high voltage, nonlinear, transmission line in GaAs is disclosed. An epitaxially grown laminate is produced by applying a low doped active n-type GaAs layer to an n-plus type GaAs substrate. A heavily doped p-type GaAs layer is applied to the active n-type layer and a heavily doped n-type GaAs layer is applied to the p-type layer. Ohmic contacts are applied to the heavily doped n-type layer where diodes are desired. Multiple layers are then either etched away or Oxygen ion implanted to isolate individual varactor diodes. An insulator is applied between the diodes and a conductive/inductive layer is thereafter applied on top of the insulator layer to complete the process.

Abstract: A method of fabricating a semiconductor device having an epitaxial layer of a group III-V semiconductor material provided on an underlying crystal layer with a lattice matching therewith, the semiconductor material being doped to the p-type by addition of beryllium and selected from a group including gallium aluminum arsenide and indium gallium aluminum arsenide, in which the method comprises steps of growing the epitaxial layer on the underlying crystal layer, adding beryllium to a concentration level of about 5.times.10.sup.19 atoms/cm.sup.3 to about 5.times.10.sup.20 atoms/cm.sup.3 to the semiconductor material, and adding indium by an amount of about 0.5 mole percent to about 8 mole percent with respect to group III elements in the semiconductor material.

Abstract: Disclosed is a method for the making of an optoelectronic device such as buried lasers in which the different layers of the device are chiefly made during a single step of epitaxy by means of a removable mechanical mask.

Abstract: A method of making a MOS field effect transistor having shallow source and drain regions with improved breakdown and leakage characteristics includes the step of forming a layer of a metal silicide along a surface of a body of silicon at each side of a gate which is on an insulated from the surface. A high concentration of an impurity of a desired conductivity type is implanted only into the metal silicide layers. A lower concentration of the impurity is then implanted through the metal silicide layers and into the body just beneath the metal silicide layers. The body is then annealed at a temperature which drives the impurities from the metal silicide layer into the body to form the junctions.

Abstract: An optical semiconductor device is formed by using one controlled etch to form a "T" shaped contact structure on the device (20). The etch rate is controlled by judicious selection of materials to provide a cladding layer (17) that has a predetermined etch rate in hydrofluoric acid, a support layer (10) and a contact layer (18) that are not affected by hydrofluoric acid, a lift-off layer (19) that is dissolved by hydrofluoric acid, and a barrier layer (21). Dissolving of the lift-off layer (19) facilitates removing the barrier layer (21).

Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs (110) on silicon (102) is accomplished by formation of a defect annihilating grid (104) on the silicon (102) prior to the epitaxy of the GaAs (110).

Abstract: In the deposition of metal on solid substrates by a Metal Organic Chemical Deposition process, an improvement comprises the provision of vapors of a precursor of the metal by passing an inert carrier gas through a mixture of the metal precursor and a liquid having a vapor pressure at ambient temperature lower than that of the metal precursor and in which the metal precursor is at least partially soluble.