Patents Examined by Ramamohan R. Paladugu
  • Patent number: 5213985
    Abstract: A relatively simple optical monitoring technique is utilized to measure temperature within a processing chamber. A III-V direct-bandgap semiconductor is optically excited to emit photoluminescence (PL). Spectral resolution of the emitted PL provides a direct measure of the bandgap of the semiconductor. In turn, the temperature of the semiconductor is derived from the bandgap measurement.
    Type: Grant
    Filed: May 22, 1991
    Date of Patent: May 25, 1993
    Assignee: Bell Communications Research, Inc.
    Inventors: Claude J. Sandroff, Francoise S. Sandroff
  • Patent number: 5210052
    Abstract: A method for fabricating a heteroepitaxial semiconductor substrate body used as a substrate of a compound semiconductor device. The heteroepitaxial semiconductor substrate body comprises a semiconductor substrate of a first semiconductor material and an epitaxial layer of a second semiconductor material grown heteroepitaxially on the semiconductor substrate. The method comprises steps of growing the epitaxial layer on the semiconductor substrate heteroepitaxially to form the heteroepitaxial semiconductor substrate body, depositing a stress inducing layer on a top surface of the epitaxial layer so as to induce a stress in the epitaxial layer, applying a cyclic annealing process for repeatedly and alternately holding the heteroepitaxial substrate body including the stress inducing layer deposited on the epitaxial layer at a first temperature and at a second temperature lower than the first temperature, and removing the stress inducing layer from the top surface of the epitaxial layer.
    Type: Grant
    Filed: May 13, 1992
    Date of Patent: May 11, 1993
    Assignee: Fujitsu Limited
    Inventor: Kanetake Takasaki
  • Patent number: 5208167
    Abstract: A method for producing a SOI substrate comprising: a step of forming a first opening to an insulating film on a semiconductor substrate and then forming semiconductor crystal layer by epitaxial growth over the first opening and the insulating film; a step of forming a second opening by partially removing the semiconductor crystal layer; a step of forming an integrated insulating film, and a step of forming an integrated semiconductor crystal layer. With the present invention, a semiconductor crystal layer can be formed on an insulating film on a substrate with large area, wherein the crystal layer and the substrate is completely insulated from each other. Further even from such materials as hard to form monocrystal substrate, a substrate can be easily obtained.
    Type: Grant
    Filed: June 19, 1992
    Date of Patent: May 4, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 5208187
    Abstract: A metal film forming method comprises steps of:forming a non-monocrystalline metal film principally composed of aluminum, in contact, at least in a part thereof, with a monocrystalline metal principally composed of aluminum; andheating the non-monocrystalline metal film to convert at least a part thereof into monocrystalline state.
    Type: Grant
    Filed: July 8, 1991
    Date of Patent: May 4, 1993
    Inventors: Kazuo Tsubouchi, Kazuya Masu
  • Patent number: 5190893
    Abstract: A local interconnect structure is formed in a semiconductor device. In one form, the semiconductor device has two conductive features (one of 54) and (56) which are to be electrically connected. A layer of metal (62), for instance titanium, is deposited on the device. The layer of metal is patterned to form a strap (64) which connects the two conductive features. After patterning the layer of metal to form the strap, the strap is thermally nitrided to form a conductive metal nitride local interconnect (66).
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: March 2, 1993
    Assignee: Motorola Inc.
    Inventors: Robert E. Jones, Jr., Hisao Kawasaki