Patents Examined by Ramamohan Rao
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Patent number: 5468678Abstract: A method for manufacturing a III-V Group compound or a II-VI Group compound semiconductor element by VPE, comprising the step of annealing a grown compound at 400.degree. C. or higher, or irradiating electron beam the grown compound at 600.degree. C. or higher.Type: GrantFiled: January 12, 1994Date of Patent: November 21, 1995Assignee: Nichia Chemical Industries, Ltd.Inventors: Shuji Nakamura, Naruhito Iwasa, Masayuki Senoh
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Patent number: 5462883Abstract: A method for fabricating silicon on insulator structures having a dislocation free silicon layer. The method utilizes low temperature UHVCVD to deposit a very heavily doped etch stop layer having a very steep doping profile onto a substrate and a lightly doped active layer onto the etch stop layer. An insulator is formed on the active layer and a carrier wafer is formed on the insulator layer. The original substrate is removed in a first etch and the etch stop layer is removed in a second etch resulting in a thin, uniform active layer. In one embodiment, a small percentage of germanium is added to the etch stop layer to produce a defect free epitaxial active layer.Type: GrantFiled: April 11, 1994Date of Patent: October 31, 1995Assignee: International Business Machines CorporationInventors: Robert H. Dennard, Bernard S. Meyerson, Robert Rosenberg
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Patent number: 5453399Abstract: In one form of the invention, a method is disclosed for fabricating a semiconductor-on-insulator structure comprising the steps of: forming an insulator layer 22; forming a layer 24 comprising boron (B) on the insulator layer 22; and forming a semiconductor layer 26 on the layer 24 comprising B.Type: GrantFiled: October 6, 1993Date of Patent: September 26, 1995Assignee: Texas Instruments IncorporatedInventor: Chih-Chen Cho
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Patent number: 5453405Abstract: Light emitting diodes (LEDs) and LED bars and LED arrays formed of semiconductive material, such as III-V, and particularly AlGaAs/GaAs material, are formed in very thin structures using organometallic vapor deposition (OMCVD). Semiconductor p-n junctions are formed as deposited using carbon as the p-type impurity dopant. Various lift-off methods are described which permit back side processing when the growth substrate is removed and also enable device registration for LED bars and arrays to be maintained.Type: GrantFiled: December 9, 1993Date of Patent: September 26, 1995Assignee: Kopin CorporationInventors: John C. C. Fan, Brenda Dingle, Shambhu Shastry, Mark B. Spitzer, Robert W. McClelland
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Patent number: 5445992Abstract: A semiconductor film having a very high light response of photoconductivity and good electrical characteristics such a wide band gap, for example, a non-monocrystalline silicon carbide film, is formed by decomposition reaction of a silicon-containing raw material gas and a hydrocarbon as a carbon raw material under light irradiation or high frequency, where the carbon raw material gas comprises at least one of tertiary and quaternary carbon atom-containing hydrocarbons of specific chemical formulae, and a semiconductor device using the thus formed semiconductor film is also provided.Type: GrantFiled: May 5, 1994Date of Patent: August 29, 1995Assignee: Canon Kabushiki KaishaInventors: Hiroyuki Tokunaga, Tadashi Atoji
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Patent number: 5441913Abstract: A semiconductor epitaxial substrate and a process for producing the same, the semiconductor epitaxial substrate comprising a GaAs single-crystal substrate having thereon an In.sub.y Ga.sub.(1-y) As (0<y.ltoreq.1) crystal layer as a channel layer, the composition and the thickness of the In.sub.y Ga.sub.(1-y) As layer being in the ranges within the elastic deformation limit of crystals constituting the In.sub.y Ga.sub.(1-y) As layer and the vicinity of the In.sub.y Ga.sub.(1-y) As layer, the semiconductor epitaxial substrate further comprising a semiconductor layer between the channel layer and an electron donating layer for supplying electrons to the channel layer, the semiconductor layer having a thickness of from 0.5 to 5 nm and a bandgap width within the range of from the bandgap width of GaAs to the bandgap width of the electron donating layer.Type: GrantFiled: June 28, 1994Date of Patent: August 15, 1995Assignee: Sumitomo Chemical Company, LimitedInventors: Masahiko Hata, Noboru Fukuhara, Hiroaki Takata, Katsumi Inui
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Patent number: 5439843Abstract: A semiconductor substrate comprises an insulating layer and a compound semiconductor monocrystal thin film formed on said insulating layer, the thermal expansion coefficient of said insulating layer being in the range of 60%-140% of that of said monocrystal thin film.Type: GrantFiled: September 6, 1994Date of Patent: August 8, 1995Assignee: Canon Kabushiki KaishaInventors: Kiyofumi Sakaguchi, Takao Yonehara, Mamoru Miyawaki
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Patent number: 5434044Abstract: A process is described for forming, over a silicon surface, a titanium nitride barrier layer having a surface of (111) crystallographic orientation. The process comprises: depositing a first titanium layer over a silicon surface; sputtering a titanium nitride layer over the titanium layer; depositing a second titanium layer over the sputtered titanium nitride layer; and then annealing the structure in the presence of a nitrogen-bearing gas, and in the absence of an oxygen-bearing gas, to form the desired titanium nitride having a surface of (111) crystallographic orientation and a sufficient thickness to provide protection of the underlying silicon against spiking of the aluminum. When an aluminum layer is subsequently formed over the (111) oriented titanium nitride surface, the aluminum will then assume the same (111) crystallographic orientation, resulting in an aluminum layer having enhanced resistance to electromigration.Type: GrantFiled: June 3, 1994Date of Patent: July 18, 1995Assignee: Applied Materials, Inc.Inventors: Jaim Nulman, Kenny K. Ngan
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Patent number: 5434101Abstract: In the manufacture of a single crystal film by epitaxial growth method, defects such as cracking are avoided by increasing the deviation of the lattice constant of the resulting film in the direction of growth from the substrate. Preferably, the deviation is increased at the rate of (0.4.about.9).times.10.sup.-4 %/.mu.m.Type: GrantFiled: March 2, 1993Date of Patent: July 18, 1995Assignee: TDK CorporationInventors: Kazuhito Yamasawa, Atsushi Oido, Akio Nakata, Nobuya Uchida
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Patent number: 5433791Abstract: Ultraviolet (UV) light from a lamp or UV laser, such as a metal can short arc xenon lamp or excimer laser, respectively, is provided for cracking Group V and Group VI species comprising clusters (dimers and tetramers) or metal-organic molecules to form monomers (atoms). The UV radiation interacts with a molecular beam of Group V and Group VI species subsequent to their generation in a source cell and thermal cracking. The source cell may comprise an effusion source in molecular beam epitaxy (MBE) apparatus, a thermal cracker cell in gas-source MBE apparatus, or a gas injector cell in metal-organic MBE apparatus (MOMBE). Light from the UV lamp or laser is coupled into a vacuum chamber in which the source cell is located, at a point below the source cell and is then directed along a path parallel to the source cell by a first reflector and finally directed onto the thermally-cracked beam of molecules by a second reflector, where the UV radiation photo-cracks the molecular beam.Type: GrantFiled: May 26, 1994Date of Patent: July 18, 1995Assignee: Hughes Aircraft CompanyInventors: Peter D. Brewer, Clifford A. LeBeau
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Patent number: 5433170Abstract: A metal-organic chemical vapor-phase deposition process for fabricating a layer of a Group II-VI compound semiconductor using an organometallic compound based on bis(cyclopentadienyl)magnesium having a vapor pressure in the range of from 1.3.times.10 Pa to 1.3.times.10.sup.2 Pa at a temperature of 330.degree. K. The present invention also provides a light-emitting device which is fabricated by means of the metal-organic vapor-phase deposition process above. The process according to the present invention provides a magnesium-containing compound semiconductor layer having an accurately controlled composition, and it readily enables the fabrication of a compound semiconductor layer having a grated structure.Type: GrantFiled: November 4, 1994Date of Patent: July 18, 1995Assignee: Sony CorporationInventors: Atsushi Toda, Takeharu Asano
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Patent number: 5434100Abstract: A substrate wafer for epitaxy of a compound semiconductor single crystal and an epitaxy using the substrate wafer are disclosed. Where the orientation off-angle from the <100> plane of an area available for device formation of a surface of the substrate wafer is .theta..degree., and the growth rate on an epitaxial layer on the substrate wafer is V .mu.m/hr, and the growth temperature of the epitaxial layer is T K, the orientation off-angle .theta..degree. is given by the following expression: ##EQU1## where 0.1.ltoreq.V.ltoreq.10 and 853.ltoreq.T.ltoreq.1023. The substrate wafer is capable of significantly reducing the number of teardrop-like hillock defects which appear on the surface of the epitaxial layer and of increasing the smoothness of the surface of the epitaxial layer.Type: GrantFiled: April 23, 1993Date of Patent: July 18, 1995Assignee: Japan Energy CorporationInventors: Masashi Nakamura, Shigeo Katsura, Ryuichi Hirano, Nobuhito Makino, Eiji Ikeda
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Patent number: 5431735Abstract: A phosphorus effusion cell for molecular beam epitaxy is disclosed. It consists of a vessel in which, by sublimation of red phosphorus, the vapor of this element is produced, the vessel being closed by means of a vacuum tight valve which regulates its flow. In the vessel, there are two zones having different temperatures, one of sublimation of red phosphorus and another of condensation and re-evaporation of white phosphorus, both zones being thermally insulated by means of reflecting screens which prevent the temperature of the heating resistance from having to reach temperatures above 350.degree. C. The valve, intermittent closing of which regulates the effusion of phosphorus vapor, is at a temperature slightly above that of the thermostated zone of condensation/re-evaporation of the white phosphorus. It finds applicable in the manufacture of semiconducting structures.Type: GrantFiled: January 14, 1994Date of Patent: July 11, 1995Assignee: Riber S.A.Inventor: Fernando F. Briones
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Patent number: 5432122Abstract: The present invention provides a method of making a thin film transistor for driving a liquid crystal display comprising the steps of forming a gate electrode on a glass substrate and forming an insulating layer and an amorphous silicon layer in turn on said glass substrate and said gate electrode, and scanning laser beams on the surface of said amorphous silicon layer with the end portions of the respective scanned laser beams being overlapped. According to the method of making a thin film transistor for driving a liquid crystal display of the present invention, a thin film transistor suitable for HDTV, the field effect mobility of which is high, is achieved. Further, in making a thin film transistor, a separate processing step is not required and the number of processing steps can be reduced because constructional features of a TFT are utilized.Type: GrantFiled: November 3, 1993Date of Patent: July 11, 1995Assignee: Gold Star Co., Ltd.Inventor: Kie S. Chae
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Patent number: 5432124Abstract: There is provide a method of manufacturing a compound semiconductor (MBE) that can make the substrate surface of the semiconductor highly clean and plane so that no impurity may be left between the substrate surface and the grown crystal layer. In the step of cleaning a substrate with MBE, the substrate surface is irradiated with V molecular beams that cannot be significantly deposited out of molecular beams to be used for the crystal growth step, said V molecular beams being irradiated under a condition of P.sub.1 .ltoreq.(P.sub.2 .times.1/2), where P.sub.1 is the pressure of V molecular beams and P.sub.2 is the pressure of molecular beams in the crystal growth step and the temperature of the substrate surface is raised by heating until stabilized group III surfaces appear on the substrate surface. A very cleanand smooth substrate surface can be obtained with such an arrangement. Harmful impurities can be completely eliminated from the interface of the substrate and the crystal.Type: GrantFiled: July 6, 1994Date of Patent: July 11, 1995Assignee: The Furukawa Electric Co., Ltd.Inventors: Kazuaki Nishikata, Yuji Hiratani, Michinori Irikawa
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Patent number: 5429983Abstract: A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a conductive film on an insulating film, forming growth nucleuses containing any of elements in group IIIb, group IVb, group Vb and group VIIb that does not constitute the conductive film and the insulating film on the surface of the conductive film, and growing a semiconductor selectively on growth nucleuses.Type: GrantFiled: August 29, 1994Date of Patent: July 4, 1995Assignee: Fujitsu LimitedInventors: Yutaka Takizawa, Ken-ichi Yanai
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Patent number: 5427977Abstract: An Si or SiC semiconductor layer is subjected to anodic oxidation in an HF solution to form a porous semiconductor layer. Without drying, the porous semiconductor layer is then immersed in pure water. Ultrasonic waves applied to the pure water shorten the reaction time and help bubbles separate from the surface of the porous region. The porous semiconductor layer is used for forming a pn junction, and carriers are injected into the pn junction.Type: GrantFiled: January 6, 1994Date of Patent: June 27, 1995Assignee: Fujitsu LimitedInventors: Masao Yamada, Motoo Nakano, George J. Collins, Tetsuro Tamura, Akira Takazawa
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Patent number: 5427630Abstract: Epitaxial and polycrystalline layers of silicon and silicon-germanium alloys are selectively grown on a semiconductor substrate or wafer by forming over the wafer a thin film masking layer of an oxide of element selected from scandium, yttrium, lanthanum, cerium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium and then growing the epitaxial layer over the wafer at temperatures below 650.degree. C. The epitaxial and polycrystalline layers do not grow on the masking layer. The invention overcomes the problem of forming epitaxial layers at temperatures above 650.degree. C. by providing a lower temperature process.Type: GrantFiled: May 9, 1994Date of Patent: June 27, 1995Assignee: International Business Machines CorporationInventors: Cyril Cabral, Jr., Kevin K. Chan, Jack O. Chu, James M. E. Harper
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Patent number: 5427054Abstract: A process of forming high quality diamond films, wherein non-diamond components and crystal defects are significantly reduced. Diamond films are formed on a diamond substrate by vapor-phase synthesis using a source gas, wherein the atomic concentrations of oxygen and carbon, [0] and [C], respectively, in the source gas satisfy the condition that 0.01.ltoreq.[C]/([C]+[O]).ltoreq.0.40. Boron (B) doped p-type semiconducting films can also be formed using the same source gas which further includes a B-containing compound.Type: GrantFiled: June 6, 1994Date of Patent: June 27, 1995Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Kimitsugu Saito, Koichi Miyata
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Patent number: 5426068Abstract: An undoped p-type GaAs epitaxial layer or an n-type GaAs epitaxial layer is grown on the surface of a wafer, and thereafter the wafer is annealed at a temperature which ranges from 800.degree. C. to 1,200.degree. C. and is equal to or higher than a predetermined critical temperature depending on the carrier concentration in the epitaxial layer before it is annealed. The epitaxial layer thus annealed is rendered semi-insulating without addition of any impurity. Accordingly, performances of an electronic device which incorporates such a wafer are improved.Type: GrantFiled: March 25, 1994Date of Patent: June 20, 1995Assignee: Japan Energy CorporationInventors: Toyoaki Imaizumi, Osamu Oda