Patents Examined by Ramon A Mercado
  • Patent number: 11016694
    Abstract: A method is used in providing remote replication management. A storage management system detects a storage driver for a storage array, where the storage driver enables managing remote replication for the storage array. The storage management system manages remote replication of storage objects for the storage array by using the storage driver, where the storage driver includes interfaces for managing remote replication.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: May 25, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Evgeny Roytman, Shreesha PaiManoor
  • Patent number: 11016891
    Abstract: A computing device includes processing units and a shared processor cache. Each cache line is associated with a different plurality of accounting bits, including a unit bit associated with each processing unit. An operation by a particular processing unit on a particular cache line is identified. If the operation is a read consumed by that processing unit, and when a unit bit for that processing unit in the accounting bits associated with the particular cache line is not set, at least the value portion of the particular cache line is stored or referenced in the trace, and the particular unit bit is set. If the operation is a write, each unit bit in the accounting bits associated with the cache line that are associated with any processing unit other than the particular processing unit is cleared, and the particular unit bit associated with the particular processing unit is set.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: May 25, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jordi Mola
  • Patent number: 10983706
    Abstract: Examples of the present disclosure provide apparatuses and methods for multiple endianness compatibility. An example method comprises receiving a plurality of bytes and determining a particular endianness format of the plurality of bytes. The method can include, responsive to determining the particular endianness format is a first endianness format, reordering bits of each byte of the plurality of bytes on a bytewise basis, storing the reordered plurality of bytes in an array of memory cells, and adjusting a shift direction associated with performing a number of operations on the plurality of bytes stored in the array. The method can include, responsive to determining the particular endianness format is a second endianness format, storing the plurality of bytes in the array without reordering bits of the plurality of bytes.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: April 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jeremiah J. Willcock, Kyle B. Wheeler, Timothy P. Finkbeiner
  • Patent number: 10976952
    Abstract: A remote agent for providing backup services to applications includes a persistent storage and a backup manager. The persistent storage stores backup policies for the applications. The backup manager identifies an application of the applications for providing the backup services; generates an application backup template based on a backup policy of the backup policies for the application; sends the generated application backup template to a production host that hosts the application; and makes a determination that the backup policy has been triggered. In response to the determination, the backup manager initiates a native data extraction from the application using the application backup template to obtain a native data dump; stores the native data dump in backup storage; and indexes the stored native data dump as a backup.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: April 13, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Shelesh Chopra, Kwangyoung Jung, Scott Randolph Quesnelle, Ban Wang, Sanjeev Kumar Lohchab, Sreelatha Pobbathi
  • Patent number: 10956087
    Abstract: A memory controller includes: an interface configured to operably communicate with a host device; a temperature detecting circuit configured to operably detect an ambient temperature, wherein when the ambient temperature is beyond a predetermined temperature range, the temperature detecting circuit generates a control signal; and a processing circuit coupled to the interface and the temperature detecting circuit, for selecting one of a plurality of data program schemes to program data into a first storage block of a flash memory according to the control signal.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: March 23, 2021
    Assignee: RAYMX MICROELECTRONICS CORP.
    Inventors: Shih-Fu Huang, Cheng-Yu Chen
  • Patent number: 10929040
    Abstract: In a half-compressed RAID 1 system a first copy of a data set is maintained in an uncompressed state and a second copy of the data set is maintained in a compressed state, where corresponding compressed and uncompressed blocks are stored on different physical devices. The result is RAID 1 reliability with storage space consumption similar to RAID 5-3+1. Compression striping in which the compressed and uncompressed data is distributed across two or more storage devices can be used to reduce data access response time. Further, delayed compression can be used to reduce the time required to perform WRITE ops. Compression may also be performed based on resource availability or storage tier hierarchy.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: February 23, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventor: Michael Trachtman
  • Patent number: 10929283
    Abstract: The present disclosure includes apparatuses and methods related to shifting data. An example apparatus comprises a cache coupled to an array of memory cells and a controller. The controller is configured to perform a first operation beginning at a first address to transfer data from the array of memory cells to the cache, and perform a second operation concurrently with the first operation, the second operation beginning at a second address.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: February 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Daniel B. Penney, Gary L. Howe
  • Patent number: 10915503
    Abstract: A space allocator in a file management system maintains and uses one or more offsets and a stored value of the largest space skipped on previous scans to increase the efficiency of scans for available space in a file system space map. When the space allocator determines a current allocation request is greater than the largest space skipped in the previous scan, a last allocated offset can be used to begin scanning to reduce the portion of the map to scan in order to find available space. When the space allocator determines the current allocation request is less than or equal to the largest space skipped in the previous scan, a first available offset can be used to begin scanning for an appropriate unused space.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: February 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Matthew S. Johnston, James L. Tilbury
  • Patent number: 10915247
    Abstract: A system and method for efficiently managing data through compression interfaces may include receiving, by a controller, data, generating, by the controller, a compressed payload based on the data, generating, by the controller, metadata describing the compressed payload, the metadata including fixed size metadata and variable size metadata, generating, by the controller, a data container comprising the uncompressed payload and the metadata, and transmitting, by the controller, the data container to an application. Some implementations of the system may include a storage media, and a storage controller executable by a processor that may include an interface processor, a controller logic, and a media processor configured to communicate with an application and the storage media to perform aspects of the method.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: February 9, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ashish Singhai, Ajith Kumar Battaje, Sandeep Sharma, Saurabh Manchanda
  • Patent number: 10908826
    Abstract: A processor can determine that a set of the memory cells is controlled by signals from a first portal. The processor can determine a function of a second portal in a relationship between the first portal and the second portal. The processor can cause, in response to a determination that the function of the second portal is a specific function, a memory control circuitry to be configured so that a subset, of the set, is controlled also by signals from the second portal. The processor can determine a function of a third portal in a relationship between the first portal and the third portal. The processor can cause, in response to a determination that the function of the third portal is the specific function, the memory control circuitry to be configured so that the subset, of the set, is controlled also by signals from the third portal.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: February 2, 2021
    Assignee: salesforce.com, inc.
    Inventors: Luc Marcel Giavelli, Joshua James Luft-Glidden, Radhika Nair, Fabrice Talbot, Srinivasa Gopaladasu, Venkata Kolla, Lucas Pfister, Chintan Tank, Chaitanya Bhatt
  • Patent number: 10891195
    Abstract: An apparatus is configured to generate a current snapshot set for a consistency group comprising a plurality of storage volumes subject to replication from a source storage system to a target storage system, and to schedule a differential scan of the current snapshot set relative to a previous snapshot set generated for the consistency group. For each of one or more snapshot trees maintained for the consistency group, a determination is made as to whether or not a first node corresponding to the previous snapshot set is an ancestor of a second node corresponding to the current snapshot set, and a manner in which an instance of the differential scan is performed for the snapshot tree is altered responsive to a result of the determination.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: January 12, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Xiangping Chen
  • Patent number: 10884660
    Abstract: An exemplary embodiment of the disclosure provides a memory management method for a rewritable non-volatile memory module. The method includes: receiving a first type command from a host system and temporarily storing the first type command to a first command queue; after receiving the first type command, receiving a second type command from the host system and temporarily storing the second type command to a second command queue; if the first command queue meets a preset condition, performing a programming operation for programming the rewritable non-volatile memory module according to the first type command in the first command queue; and after performing the programming operation, transmitting a response message corresponding to the second type command in the second command queue to the host system.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: January 5, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chen Yap Tan
  • Patent number: 10866747
    Abstract: An arrangement for securing a memory device of a computing system in which a memory access command is compared to each command in a list of commands. The command, with specified attributes, is authenticated when the command and its attributes match an entry in the list of commands. Following authentication, the command is evaluated according to usage and behavior metrics in order to identify and prevent unauthorized or malicious access of the memory device. If no violation of usage or behavior metrics is detected, the command may be issued to the memory device for execution.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: December 15, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sukhamoy Som, David F. Heinrich, Theodore F. Emerson
  • Patent number: 10860240
    Abstract: A production host for hosting virtual machines includes a persistent storage a backup storage client, and a production agent. The persistent storage stores data associated with a portion of the virtual machines. The backup storage client provides access to second data associated with a second portion of the virtual machines stored in a backup storage. The production agent identifies an instant access request for a virtual machine and, in response to identifying the instant access request, generates instant access virtual machine data in the backup storage using a portion of the second data associated with the virtual machine; locally mounts the generated instant access virtual machine data; locally instantiates the virtual machine using the instant access virtual machine data; and executes the instantiated virtual machine using the instant access virtual machine data.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: December 8, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Upanshu Singhal, Ravi V. Chitloor, Shelesh Chopra, Archit Seth, Manish Sharma, Sunil Yadav, Abhishek Sharma
  • Patent number: 10860232
    Abstract: In some examples, a system dynamically adjusts a proportion of incoming data blocks for which respective fingerprints are added to a fingerprint index, where the fingerprint index correlates fingerprints for data blocks to storage location indicators for the data blocks. The system inputs, into a buffer, fingerprint index delta updates for the incoming data blocks according to the dynamically adjusted proportion, and updates the fingerprint index based on the fingerprint index delta updates input into the buffer. The system retrieves, in response to a fingerprint of an incoming data block, a collection of block entries from a block location index that stores information for data blocks in temporal order, and deduplicates the incoming data blocks using the collection of block entries from the block location index.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: December 8, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Srivenkatesh Kumar Vaithianathan, Sonam Mandal, Sudhanshu Goswami
  • Patent number: 10846177
    Abstract: Example apparatus and methods control a data storage system to store data in a self-describing logical data storage capsule using a logical cylindrical recording format. Example apparatus and methods assign a searchable, globally unique identifier to the capsule and associate the globally unique identifier with a user. The logical data storage capsule is migrated from a first data storage medium to a second data storage medium without translating or reformatting the data storage capsule. The data storage capsule contains information describing to a data storage device how to migrate the capsule without translating or reformatting the data storage capsule. Example apparatus and methods dynamically select an error correction approach for storing data in the data storage capsule, de-duplicate, and encrypt the data storage capsule. The data storage capsule may be local, or may be part of a cloud-based storage system.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: November 24, 2020
    Assignee: Quantum Corporation
    Inventor: George Saliba
  • Patent number: 10839877
    Abstract: A protection module for an electronic circuit prevents unintended write operations by a master module to functional registers of a protected module. The protection module includes soft lock bits (SLBs) that indicate whether corresponding functional registers are locked and control logic that supports (i) a page select (PS) control parameter that indicates whether access by the master module is to the functional registers or the SLBs and (ii) a mode select (MS) control parameter that indicates whether access by the master module to the functional registers is in a normal access mode, in which each written-to functional register is left unlocked, or an auto-lock access mode, in which each just-written-to functional register is automatically locked by setting the corresponding SLB. The functional registers and the SLBs share addresses that can fit within a single address space that includes the control parameters.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 17, 2020
    Assignee: NXP USA, INC.
    Inventors: Arun Kumar Barman, Parul Bansal, Jhalak Gupta
  • Patent number: 10831377
    Abstract: The present disclosure provides techniques for implementing an apparatus, which includes processing circuitry that performs an operation based on target data block, a processor-side cache that implements a first cache line, memory-side cache that implements a second cache line having line width greater than the first cache line, and a memory array. The apparatus includes one or more memory controllers that, when the target data block results in a cache miss, determine a row address that identifies a memory cell row as storing the target data block, instruct the memory array to successively output multiple data blocks from the memory cell row to enable the memory-side cache to store each of the multiple data blocks in the second cache line, and instruct the memory-side cache to output the target data block to a coherency bus to enable the processing circuitry to perform the operation based on the target data block.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: November 10, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Richard C. Murphy, Anton Korzh, Stephen S. Pawlowski
  • Patent number: 10831667
    Abstract: Various aspects are described herein. In some aspects, the disclosure provides techniques for accessing tag information in a memory line. The techniques include determining an operation to perform on at least one memory line of a memory. The techniques further include performing the operation by accessing only a portion of the at least one memory line, wherein the only the portion of the at least one memory line comprises one or more flag bits that are independently accessible from remaining bits of the at least one memory line.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: November 10, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Bharat Kumar Rangarajan, Chulmin Jung, Rakesh Misra
  • Patent number: 10831378
    Abstract: A method for use in a dispersed storage network (DSN) includes receiving a data access request at a DSN memory that controls storage of encoded data slices in multiple storage units. The data access request is capable of being serviced using either of at least two different storage units. The DSN memory determines wear levels associated with the two different storage units, and selects one of them as a preferred storage unit based, at least in part, on the wear levels. The DSN memory fulfills the data access request using the preferred storage unit.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Trent W. Johnson, Praveen Viraraghavan, Ilya Volvovski