Patents Examined by Robert Pascal
  • Patent number: 9100061
    Abstract: A switchable filter and diplexer circuit includes a plurality of bandpass filters having passbands for the frequency bands in which communication across a communication channel is desired and a plurality of diplexers, the diplexers having a plurality of passbands. A plurality of switches are provided to select one of the bandpass filters or diplexers from among the plurality of bandpass filters and diplexers for communication on a communication channel. An additional switching capability is provided to select a first passband of a given diplexer when a second passband of that diplexer is selected by the plurality of switches.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: August 4, 2015
    Assignee: Entropic Communications, LLC
    Inventors: Younghuang Zeng, Branislav Petrovic
  • Patent number: 9098099
    Abstract: An apparatus and a method for raising an output efficiency in a mobile communication terminal are provided. The apparatus includes a supply modulator and a power amplifier. The supply modulator includes a DC-DC converter, a voltage regulator, and a switching regulator. The supply modulator modulates an envelope component of an input signal to generate power. The power amplifier amplifies a phase component of the input signal using the power generated by the supply modulator as a power source of a collector/drain. The DC-DC converter raises battery power of the mobile communication terminal. The voltage regulator determines an output voltage of the supply modulator using the power raised by the DC-DC converter. The switching regulator determines an output current of the supply regulator using the battery power of the mobile communication terminal.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: August 4, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bok-Ju Park, Hyung-Sun Lim, Hee-Sang Noh, Jun-Seok Yang
  • Patent number: 9099964
    Abstract: Disclosed is a high-frequency signal processing device capable of reducing transmission power variation and harmonic distortion. For example, the high-frequency signal processing device includes a pre-driver circuit, which operates within a saturation region, and a final stage driver circuit, which operates within a linear region and performs a linear amplification operation by using an inductor having a high Q-value. The pre-driver circuit suppresses the amplitude level variation of a signal directly modulated, for instance, by a voltage-controlled oscillator circuit. Harmonic distortion components (2HD and 3HD), which may be generated by the pre-driver circuit, are reduced, for instance, by the inductor of the final stage driver circuit.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: August 4, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tomoumi Yagasaki
  • Patent number: 9094104
    Abstract: A transceiver front-end of a communication device comprises a frequency blocking arrangement, which may be either a transmit frequency blocking arrangement or a receive frequency blocking arrangement. The frequency blocking arrangement has a blocking frequency interval associated with one of a transmit frequency and receive frequency, and a non-blocking frequency interval associated with the other of the transmit frequency and receive frequency. The frequency blocking arrangement is configured to block passage of signals in the blocking frequency interval between said signal transmission and reception node and either said receiver node or said transmitter node. The frequency blocking arrangement comprises a network of passive components comprising at least one transformer and a filter arrangement adapted to have a higher impedance value in the blocking frequency interval than in the non-blocking frequency interval.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: July 28, 2015
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Imad Ud Din, Stefan Andersson, Daniel Eckerbert, Henrik Sjöland, Tobias Tired, Johan Wernehag
  • Patent number: 9088257
    Abstract: A device for controlling operation of a power amplifier includes a detector, a reference signal generator and a controller. The detector is configured to detect a voltage level of an output signal of the power amplifier with respect to a predetermined boost threshold and to generate a corresponding detection signal and a reference signal. The controller is configured to provide a supply voltage to an output transistor of the power amplifier based on a comparison of the detection signal and the reference signal, the supply voltage being a no boost voltage, which is substantially the same as a supply voltage, when the comparison indicates that the voltage level is within the predetermined boost threshold, and the supply voltage being one of multiple boost voltages when the detection signal indicates that the voltage level is beyond the predetermined boost threshold. The controller generates the boost voltages by boosting the supply voltage.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 21, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Michael Wendell Vice, Sungkil Hwang
  • Patent number: 9088205
    Abstract: A power supply system comprising a power stabilization stage configured to combine a first reference signal having a first frequency range with a second reference signal having a second frequency range that is different than the first frequency range to generate a combined reference for driving a reference load. A first power supply (e.g. SMPS) is configured to generate a first output based on the first reference signal. A second power supply (e.g. linear regulator) is configured to generate a second output based on the second reference signal. A power combiner circuit is configured to combine the first output with the second output to generate a combined output for driving an output load.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: July 21, 2015
    Assignee: QUANTANCE, INC.
    Inventor: Vikas Vinayak
  • Patent number: 9088062
    Abstract: [OBJECT] It is an object to provide a dielectric waveguide filter with attenuation poles, which is capable of suppressing deterioration in a high band-side attenuation characteristic with respect to a low band-side attenuation characteristic. [SOLUTION] A dielectric waveguide filter comprises a plurality of dielectric waveguide resonators each having a rectangular parallelepiped-shaped dielectric block, periphery of which is covered by a conductor film. The dielectric waveguide resonators are configured to form a main coupling path, and a sub coupling path bypassing a part of the main coupling path. The part of the main coupling path bypassed by the sub coupling path includes at least one capacitive coupling path.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: July 21, 2015
    Assignee: TOKO, INC.
    Inventor: Kazuhiro Ito
  • Patent number: 9086715
    Abstract: A voltage regulator for use within an envelope tracking power supply system is described. The voltage regulator comprises a voltage regulation module. The voltage regulation module comprises at least one energy storage element, the at least one energy storage element comprising a first terminal operably coupled to a first node of the voltage regulation module, and a second terminal operably coupled to a second node of the voltage regulation module. The voltage regulation module further comprises an input arranged to receive a reference voltage supply signal, the input being selectively couplable to the first node and selectively couplable to the second node, an output selectively couplable to the first node and selectively couplable to the second node, and a ground plane selectively couplable to the second node.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: July 21, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventor: Patrick Stanley Riehl
  • Patent number: 9088250
    Abstract: A distortion compensating apparatus including: a processor to generate a compensated signal by performing distortion compensation on an input signal, based on a distortion compensation coefficient depending on the input signal, to separates the compensated signal into a first signal and a second signal that have constant amplitude and that have a phase difference based on amplitude of the compensated signal, to generate a third signal by multiplying the first signal by a first coefficient, and to generate a fourth signal by multiplying the second signal by a second coefficient, and a combiner to generate a seventh signal by combining the fifth signal and the sixth signal which are generated by amplifying the third signal and the fourth signal, wherein the processor is further configured to calculate the distortion compensation coefficient, the first coefficient, and the second coefficient, based on the third signal, the fourth signal and the seventh signal.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: July 21, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Toshio Kawasaki
  • Patent number: 9083069
    Abstract: A power combiner/distributor including first, second, and third waveguides connected with each other in a planar shape, and for either one of distributing power inputted from the first waveguide to the second and third waveguides and combining powers inputted from the second and third waveguides to input the combined power to the first waveguide is provided. The power combiner/distributor includes a branch circuit connected with the first waveguide and for branching a transmission path formed in the first waveguide into first and second transmission paths, and decoupling circuits connected with the branch circuit and also to the second and third waveguides, respectively, the decoupling circuits having a power losing resonator coupled to the second and third waveguides, resonating within an operation frequency band, and causing a power loss.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: July 14, 2015
    Assignee: FURUNO ELECTRIC COMPANY LIMITED
    Inventor: Kenichi Iio
  • Patent number: 9083071
    Abstract: An electrical device that comprises a tunable cavity filter that includes a container and a post. The container encloses a cavity therein, wherein interior surfaces of the container are covered with a metal layer. The post is configured be movable through an opening in the container such that at least a portion of the post is locatable inside of the cavity.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: July 14, 2015
    Assignee: Alcatel Lucent
    Inventors: Noriaki Kaneda, John Franey
  • Patent number: 9084351
    Abstract: A structure (10) includes a conductor (151), conductors (111, 131) that are located on the same side with respect to the conductor (151), that are opposed to at least a part of the conductor (151), and that overlap each other when seen in a plan view, a connection member (101) that penetrates the conductors (111, 131, 151), that is connected to the conductor (151), and that is insulated from the conductors (111, 131), openings (112, 132) that are formed in the conductors (111, 131), respectively, and which the connection member (101) passes through, and conductor elements (121, 141) that are formed to be opposed to the openings (112, 132), that are connected to the connection member (101) passing through the openings (112, 132), and that are larger than the openings (112, 132). The number of layers in which the conductor elements (121, 141) are located is two or more and less than or equal to the number of layers in which the conductors (111, 131) are located.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: July 14, 2015
    Assignee: NEC CORPORATION
    Inventors: Hiroshi Toyao, Naoki Kobayashi, Noriaki Ando
  • Patent number: 9077305
    Abstract: Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for different operating conditions such as operating frequency. As a result, semiconductor dies can be manufactured in a single configuration for several different operating frequencies, and each die can be tuned to reduce (e.g. minimize) supply noise, such as by varying the ESR or the capacitance of at least one of the pathways.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Timothy M. Hollis, Steven Bodily
  • Patent number: 9077294
    Abstract: An amplifier circuit includes a first and a second switching element connected in series between a first and a second voltage potential and are actuated in the amplifier mode in a clocked manner. A capacitive element is connected in parallel to at least one of the two switching elements, a measuring circuit for measuring the switching edges occurring during switching of the switching elements, and a current-determining circuit for determining the output current by means of the measured switching edges.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: July 7, 2015
    Assignee: Astrium GmbH
    Inventor: Udo Rapp
  • Patent number: 9071211
    Abstract: A combiner coupled to output terminals of a Doherty amplifier, the combiner comprising an inverter circuit and a transformer circuit. The inverter circuit comprising at least a first network and a second network, wherein each of the first network and the second network includes lumped elements. The transformer circuit comprising at least a third network and a fourth network, wherein each of the first third and the fourth network includes the lumped elements, wherein the lumped elements are selected from the group of capacitors and inductors.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: June 30, 2015
    Assignee: Anadigics, Inc.
    Inventor: Kenneth Sean Ozard
  • Patent number: 9070963
    Abstract: A duplexer includes: a reception filter connected between a reception terminal and an antenna terminal; a transmission filter connected between a transmission terminal and the antenna terminal; and a wiring substrate including the reception filter and the transmission filter on an upper surface, the reception terminal, the transmission terminal and the antenna terminal being formed on a lower surface, and a reception electrode electrically connected to the reception terminal, a transmission electrode electrically connected to the transmission terminal, an antenna electrode electrically connected to the antenna terminal, and a circular metal layer surrounding the reception, transmission and antenna electrodes, and electrically connected to a ground being formed on an upper surface, wherein a shortest distance between a side of the circular metal layer closest to the reception and transmission terminals and the reception electrode is larger than a width of the side of the circular metal layer.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: June 30, 2015
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Satoru Ono
  • Patent number: 9065404
    Abstract: To effectively control the amplitude vs. power supply voltage characteristics, for example, in an ET amplifier.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: June 23, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Naoki Hongo
  • Patent number: 9065163
    Abstract: Radio frequency (RF) power amplifiers are provided which may include high power, wideband, microwave or millimeter-wave solid state power amplifiers based on waveguide power combiner/dividers.
    Type: Grant
    Filed: December 22, 2012
    Date of Patent: June 23, 2015
    Assignee: NUVOTRONICS, LLC
    Inventors: Donald X. Wu, David W. Sherrer, Jean-Marc Rollin
  • Patent number: 9065387
    Abstract: Systems and methods for maintaining power amplifier performance are provided. A system includes a bias supply that generates a bias voltage, and at least one primary power amplifier (PA) that receives the bias voltage and a primary radio frequency (RF) input. The at least one primary PA amplifies the primary RF input based on the bias voltage. The system includes an auxiliary PA that is connected in parallel with the at least one primary PA and receives the bias voltage and an auxiliary RF input, which is a scaled version of the primary RF input. The auxiliary PA amplifies the auxiliary RF input based on the bias voltage. The system includes a detector that measures an output voltage associated with the amplified auxiliary RF input, and a comparator that compares the measured output voltage to a reference voltage. The bias supply adjusts the bias voltage based on the comparison.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: June 23, 2015
    Assignee: Broadcom Corporation
    Inventors: Tirdad Sowlati, Ehsan Adabi, Sayedfarid Shirinfar, Ahmadreza Rofougaran
  • Patent number: 9054668
    Abstract: In one embodiment, front end circuitry for an electronic appliance, the front end circuitry comprising: a first port configured to conduct signals from a signal source, the signals comprising a first signal and a second signal; a first filter coupled to the first port, the first filter configured to filter the first signal according to a first frequency band and output the filtered first signal for further processing; a second filter coupled to the first port and arranged in parallel with the first filter, the second filter configured to absorb the second signal according to a second frequency band that is a stopband for the first filter; and an impedance load coupled between an output of the second filter and ground.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: June 9, 2015
    Assignee: BROADCOM CORPORATION
    Inventor: Ignacio Gorostegui