Abstract: A structure including a first resin layer and a second resin layer sandwiching a self-light emitting element layer, a first stopper layer, a first resin sacrificial layer and a first glass substrate which are stacked on the first resin layer on the opposite side of the self-light emitting element layer, and a second glass substrate stacked on the second resin layer is prepared. The first glass substrate is peeled off from the first resin sacrificial layer by irradiating the first glass substrate with a laser beam. The first resin sacrificial layer is decomposed by a chemical reaction using a gas. The first stopper layer has a resistance to the chemical reaction, and the first resin sacrificial layer is removed while leaving the first stopper layer in a step of decomposing the first resin sacrificial layer.

Abstract: A semiconductor integrated circuit device having a bulk bias control function is provided. The semiconductor integrated circuit device may be configured to output the first external voltage as a bulk voltage of a transistor in a power-up period, and to output a second external voltage having a higher level than the first external voltage as the bulk voltage of the transistor in a power-down mode.

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material, and a through-semiconductor-via coupled to a negative voltage source. Deep trench isolation structures are disposed between individual photodiodes in the plurality of photodiodes to electrically and optically isolate the individual photodiodes. The deep trench isolation structures include a conductive material coupled to the through-semiconductor-via, and a dielectric material disposed on sidewalls of the deep trench isolation structures between the semiconductor material and the conductive material.

Abstract: An encapsulated ferroelectric capacitor or ferroelectric memory cell includes encapsulation materials adjacent to a ferroelectric capacitor, a ferroelectric oxide (FEO) layer over the encapsulated ferroelectric capacitor, and an FEO encapsulation layer over the ferroelectric oxide to provide protection from hydrogen induced degradation.

Abstract: A substrate-retaining device with improved thermal uniformity is provided. In an exemplary embodiment, the substrate-retaining device includes a substantially circular first surface with a defined perimeter, a plurality of contact regions disposed at the perimeter, and a plurality of noncontact regions also disposed at the perimeter. The contact regions are interspersed with the noncontact regions. Within each of the noncontact regions, the first surface extends past where the first surface ends within each of the contact regions. In some such embodiments, each region of the plurality of contact regions includes a contact surface disposed above the first surface.

Abstract: A method for making thin film transistor array includes following steps. A gate electrode is formed on a surface of the insulating substrate. An insulating layer is deposited on the insulating substrate to cover the gate electrode. A carbon nanotube layer is applied on the insulating layer. A number of source electrodes and a number of drain electrodes opposite with each other is formed by patterning the carbon nanotube layer. A semiconductor layer is formed by coating a semiconductor fragments suspension on the insulating layer, wherein the semiconductor layer comprises a number of semiconductor fragments located between the number of source electrodes and the number of drain electrodes.

Abstract: OLEDs and techniques for fabricating OLEDs are provided, in which the OLED has a shortest lateral current path through an active region that is longer than the shortest lateral electric field line within the active region. Such configurations prevent “hot spots” in the OLED panel, leading to a more uniform emission by the panel.

Abstract: An improved finFET and method of fabrication using a silicon-on-nothing process flow is disclosed. Nitride spacers protect the fin sides during formation of cavities underneath the fins for the silicon-on-nothing (SON) process. A flowable oxide fills the cavities to form an insulating dielectric layer under the fins.

Abstract: The present invention relates to the field of displays and discloses a color filter substrate, a display device and a method for manufacturing a color filter substrate. The color filter substrate comprises: a transparent substrate; a light-electricity converting module, provided on the transparent substrate and configured to convert a light beam incident from the transparent substrate into electric energy. The display device comprises the color filter substrate. In the invention, a light-electricity converting module is set on a transparent substrate, thus a light beam incident from the transparent substrate may be converted into electric energy, so that the sunlight transmitted into a display panel may be transformed into electric energy; because the solar energy is abundant, it may meet the demand of the display panel, and the service time of the display panel may be prolonged.

Abstract: The present invention relates to the field of liquid crystal display, and provides a method for manufacturing an array substrate, the array substrate, and a display device. In the array substrate, a gate insulating layer between source and drain electrodes and a pattern of a gate electrode has a thickness greater than that of the gate insulating layer between an active layer and the pattern of the gate electrode. Due to the thick gate insulating layer between the source and drain electrodes and the pattern of the gate electrodes, the capacitance between the source and drain electrodes and the gate electrodes will be reduced.

Abstract: A method for fabricating a photovoltaic device includes applying a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device.

Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device including receiving a FinFET precursor including a fin structure formed between isolation regions, and a gate structure formed over a portion of the fin structure such that a sidewall of the fin structure is in contact with a gate spacer of the gate structure; patterning the fin structure to comprise a pattern of at least one upward step rising from the isolation region; forming a capping layer over the fin structure, the isolation region, and the gate structure; performing an annealing process on the FinFET precursor to form at least two dislocations along the upward step; and removing the capping layer.

Abstract: A microelectronic device may be formed with at least one transistor having a source region and a drain region, wherein an interlayer dielectric layer may be formed adjacent the transistor. A trench may be formed through the first interlayer dielectric layer to at least one of the source region and the drain region and a conductive contact may be formed in the trench, wherein the conductive contact comprises a conformal conductive layer separated from the at least one of the source region and the drain region by a conformal insulating layer.

Abstract: An electrode body is provided as an electrode body capable of appropriately reducing a load when silicon wafer direct bonding is performed. The electrode body 1 includes a base member 10 that has a predetermined thickness; and an electrode portion 20 that is formed on one surface of the base member in a thickness direction thereof. The electrode portion 20 includes a basic bump 21 formed in a substantially columnar shape to protrude on the base member 10 and a fragile bump 22 formed independently from the basic bump to form a metallic bond with the basic bump 21.

Abstract: A manufacturing method of a mother substrate assembly includes forming a metal layer on substantially an entire surface of a transparent substrate including a cell area including a non-display area and a display area, an align key area, and a substrate area surrounding the cell area and the align key area, etching the metal layer to form an align key in the align key area, etching the metal layer to form a reflection part in the non-display area, and etching the metal layer in the display area to form a metal nanowire in the display area.

Abstract: A display device according to an embodiment of the present disclosure may include a lower substrate disposed with a line electrode at an upper portion thereof, a plurality of semiconductor light emitting devices electrically connected to the line electrode to generate light and disposed to be separated from one another, and an adhesive portion including a body configured to fix the location of the lower substrate to that of the semiconductor light emitting device, and a conductor dispersed within the body to electrically connect the lower substrate to the semiconductor light emitting device, wherein the plurality of semiconductor light emitting devices form one pixel region (P) having red, green and blue semiconductor light emitting devices that emit red, green and blue light, and contain a material selected from inorganic semiconductor materials, and the adhesive portion blocks light generated from the plurality of semiconductor light emitting devices.

Abstract: A semiconductor integrated circuit device having a bulk bias control function is provided. The semiconductor integrated circuit device may be configured to output the first external voltage as a bulk voltage of a transistor in a power-up period, and to output a second external voltage having a higher level than the first external voltage as the bulk voltage of the transistor in a power-down mode.

Abstract: A magnetic field sensor includes a lead frame having a plurality of leads, at least two of which have a connection portion and a die attach portion. A semiconductor die is attached to the die attach portion of the at least two leads and a separately formed ferromagnetic element, such as a magnet, is disposed adjacent to the lead frame.

Abstract: A semiconductor device includes a substrate having an active region, a first gate structure over a top surface of the substrate, a second gate structure over the top surface of the substrate, a pair of first spacers on each sidewall of the first gate structure, a pair of second spacers on each sidewall of the second gate structure, an insulating layer over at least the first gate structure, a first conductive feature over the active region and a second conductive feature over the substrate. Further, the second gate structure is adjacent to the first gate structure and a top surface of the first conductive feature is coplanar with a top surface of the second conductive feature.

Abstract: Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material, a terminal coupled to the diffusion region, and a field plate coupled to the terminal and extending from the terminal over the diffusion region to shield the diffusion region. Additional embodiments are also described.