Patents Examined by Roshn K Varghese
  • Patent number: 11972879
    Abstract: While laying a subsea cable, an exposed cut off end of the cable is exposed to water prior to permanently sealing off this cable end. To prevent damage to the cable due to contact with the often salt water, due to for example oxidation, a temporarily watertight seal is to be applied to the cut off end. A method for applying this seal is provided which comprises applying a mouldable sealant to the exposed end wherein the sealant acts as a watertight barrier between the water and the cut off end of the cable. The sealant may comprise an intermediate layer between the cut off end and a watertight outer layer arranged to increase adhesion between the cut off end and the outer layer. This allows a broader range of outer layer materials to be used as the outer layer material does not need to adhere directly with the cable.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: April 30, 2024
    Assignee: BAGGERMAATSCHAPPIJ BOSKALIS B.V.
    Inventors: Tim Van Keulen, Rob Rudolf Theodorus Oor, Emiel Van Weenen
  • Patent number: 11973332
    Abstract: The present disclosure is concerned with bus bars that are provided with protrusions that allow them to be brought directly or indirectly in contact with a cooling system to remove heat generated in the bus bars themselves. The disclosure further provides a method of cooling a bus bar. The method includes providing at least one bus bar with at least one protrusion, and connecting the at least one protrusion to a cooling element.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: April 30, 2024
    Assignee: DANA TM4 INC.
    Inventor: Francois Dube
  • Patent number: 11968775
    Abstract: An embodiment of a printed circuit board includes a first insulating layer, a metal layer disposed above the first insulating layer, a second insulating layer disposed above the metal layer, and signal lines disposed above the second insulating layer, the signal lines extending in a first direction and having line widths in a second direction perpendicular to the first direction. The metal layer has open areas overlapping the signal lines in a third direction perpendicular to the first and second directions. In another embodiment, the open areas are replaced with metal meshes.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: April 23, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon Sun Na, Min Soo Choi
  • Patent number: 11956912
    Abstract: An electronic device is provided. The electronic device includes a foldable housing configured to include a hinge structure, a first housing structure that has a first face that is connected to the hinge structure and is directed in a first direction, a second face that is directed in a second direction opposite to the first direction, and a first lateral member that at least partly surrounds a space between the first face and the second face, and a second housing structure that has a third face that is connected to the hinge structure and is directed in a third direction, a fourth face that is directed in a fourth direction opposite to the third direction, a second lateral member that at least partly surrounds a space between the third face and the fourth face, and that is folded about the hinge structure onto the first housing structure, a flexible display, a first magnet a second magnet and at least one electrical path.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yongyoun Kim
  • Patent number: 11956898
    Abstract: Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: April 9, 2024
    Assignee: Apple Inc.
    Inventors: Anne M. Mason, Chad O. Simpson, William Hannon, Mark J. Beesley
  • Patent number: 11895772
    Abstract: An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: February 6, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Chi-Min Chang, Ching-Sheng Chen, Jun-Rui Huang, Wei-Yu Liao, Yi-Pin Lin
  • Patent number: 11889624
    Abstract: A flexible printed circuit board includes a base film having an insulating property, and one or more interconnects laminated to at least one surface side of the base film. At least one of the one or more interconnects includes, in a longitudinal direction, a first portion and a second portion that is a portion other than the first portion, an average thickness of the second portion being greater than an average thickness of the first portion. A ratio of the average thickness of the second portion to the average thickness of the first portion is greater than or equal to 1.5 and less than or equal to 50.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: January 30, 2024
    Assignees: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshio Oka, Koji Nitta, Shoichiro Sakai, Yasushi Mochida, Tadahiro Kaibuki, Junichi Okaue
  • Patent number: 11889620
    Abstract: A radio-frequency module includes a mounting board, a first electronic component, and a second electronic component. The second electronic component is lower in height than the first electronic component. The mounting board includes dielectric layers, conductive layers, and via-conductors. In the mounting board, the dielectric layers and the conductive layers are stacked in the thickness direction of the mounting board. The mounting board has a first region and a second region. The first region overlaps the first electronic component and extends from a first major surface to a second major surface. The second region overlaps the second electronic component and extends from the first major surface to the second major surface. In the mounting board, the conductive layers in the first region are fewer than the conductive layers in the second region. In the mounting board, the first region is thinner than the second region.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 30, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yutaka Shuto, Hiroshi Nishikawa, Tomomi Yasuda
  • Patent number: 11871519
    Abstract: A display device includes a driver including flexible circuit boards connected to a display panel. The driver includes a first source circuit board, a second source circuit board, a main circuit board including a controller that generates a power source voltage and applying the power source voltage to each of the first source circuit board and the second source circuit board, and a connector connecting the first source circuit board and the second source circuit board. The connector is electrically connected to a first voltage line that is the most adjacent to the second source circuit board among the voltage lines of the first source circuit board and a second voltage line that is the most adjacent to the first source circuit board among the voltage lines of the second source circuit board.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 9, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventor: Taejin Kim
  • Patent number: 11871513
    Abstract: A cavity elongated in one direction is formed in a protective film covering the conductive pattern of the topmost conductive layer of a multilayer wiring substrate. The cavity exposes part of the conductive pattern. A first via-conductor extends downward from the conductive pattern of the topmost conductive layer at least until that of a second conductive layer. Second via-conductors extend downward from the conductive pattern of the second or third conductive layer at least until that of a conductive layer one below. As viewed from above, the first via-conductor and the cavity partially overlap each other. At least two second via-conductors are disposed to sandwich the cavity therebetween. The difference between the smallest gap between the cavity and the second via-conductor at one side and that between the cavity and the second via-conductor at the other side is smaller than the smallest gap between the cavity and the second via-conductors.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 9, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Kondo, Shigeki Koya, Kenji Sasaki
  • Patent number: 11849538
    Abstract: A terminal substrate includes a signal terminal disposed on a terminal surface of an insulation ceramic layer. An insulation resin layer of a flexible substrate includes a first surface facing the terminal surface, and a second surface on an opposite side of the first surface. A first signal pad disposed on the first surface is joined to the signal terminal. A first penetration conductive part penetrates the insulation resin layer from the first signal pad. A first signal line is disposed on the second surface. A second penetration conductive part penetrates the insulation resin layer from the first signal line. A second signal line is disposed on the first surface. A third penetration conductive part penetrates the insulation resin layer from the second signal line. A second signal pad is disposed on the second surface.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: December 19, 2023
    Assignees: NGK ELECTRONICS DEVICES, INC., NGK INSULATORS, LTD., Fujitsu Optical Components Limited
    Inventors: Noboru Kubo, Masato Ishizaki, Kento Takahashi
  • Patent number: 11838432
    Abstract: A portable electronic device includes a housing defining an internal volume and a circuit board assembly within the internal volume. The circuit board assembly includes a first circuit board, a wall structure soldered to the first circuit board, and a second circuit board soldered to the wall structure and supported above the first circuit board by the wall structure. The second circuit board defines an exterior top surface of the circuit board assembly. A processor is coupled to the first circuit board and positioned within an internal volume defined between the first circuit board and the second circuit board and at least partially surrounded by the wall structure. A memory module is coupled to the exterior top surface of the circuit board assembly.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: December 5, 2023
    Assignee: APPLE INC.
    Inventors: Bryan D. Keen, Devon A. Monaco, Sherry Lee, Ihtesham H. Chowdhury, Eric N. Nyland, Matthew D. Hill, Arun R. Varma, Lucy E. Browning, Sawyer I. Cohen, Benjamin J. Pope, Abhishek Choudhury, James W. Bilanski, Yaodong Wang, Daniel J. Morizio, Nicholas W. Ruhter, David A. Karol, Sean M. Gordoni
  • Patent number: 11832388
    Abstract: A wiring board includes an insulating base having a first principal surface, and a second principal surface opposite to the first principal surface, a first through hole formed in the base, a first conductive layer provided inside the first through hole, a first insulating layer covering the first principal surface, a second insulating layer covering the second principal surface, a second through hole formed in the first insulating layer, the base, and the second insulating layer, a magnetic material provided inside the second through hole, a third through hole famed in the magnetic material, and a second conductive layer provided inside the third through hole.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: November 28, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro Murakami
  • Patent number: 11758650
    Abstract: A flexible printed circuit board includes a base film; a circuit pattern disposed on one surface of the base film; and a coverlay film covering the circuit pattern. The base film is divided into a flexible area and a rigid area, and the circuit pattern of the flexible area comprises a portion thinner than a portion of the circuit pattern of the rigid area.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Jung Byun, Jung Soo Kim, Sang Hyun Sim, Chang Min Ha, Jin Won Lee
  • Patent number: 11758665
    Abstract: The present disclosure relates to a battery connection module and a battery device. The battery connection module includes a carrying tray, a plurality of busbars and a flexible circuit board. The plurality of busbars are provided to the carrying tray.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: September 12, 2023
    Assignee: Molex, LLC
    Inventors: Yong Lin, Shang Xiu Zeng, Kian Heng Lim
  • Patent number: 11751333
    Abstract: An interconnection for flex circuit boards used, for instance, in a quantum computing system are provided. In one example, the interconnection can include a first flex circuit board having a first side and a second side opposite the first side. The interconnection can include a second flex circuit board having a third side and a fourth side opposite the third side. The first flex circuit board and the second flex circuit board are physically coupled together in an overlap joint in which a portion of the second side for the first flex circuit board overlaps a portion of the third side of the flex circuit board. The interconnection can include a signal pad structure positioned in the overlap joint that electrically couples a first via in the first flex circuit board and a second via in the second flex circuit board.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: September 5, 2023
    Assignee: GOOGLE LLC
    Inventors: John Martinis, Bob Benjamin Buckley, Xiaojun Trent Huang
  • Patent number: 11751323
    Abstract: A printed circuit board (PCB) is provided for transmitting a differential signal. The PCB includes first and second conductive signal layers. The first conductive signal layer includes a first positive trace of the differential signal and a first negative trace of the differential signal. The second conductive signal layer includes a second positive trace of the differential signal and a second negative trace of the differential signal. The first positive trace is adjacent to the first negative trace, and the second positive trace is adjacent to the second negative trace and directly below the first negative trace.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: September 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 11744008
    Abstract: A printed board includes a first wiring layer including a first terminal, a second wiring layer including a second terminal facing to the first terminal, a dielectric layer interposed between the first wiring layer and the second wiring layer and having an end face, and a plurality of through-hole vias configured to electrically connect the first terminal and the second terminal. The plurality of through-hole vias includes a first through-hole via which is closest to an end-face edge of the first terminal, and a second through-hole via which is closest to an inner edge of the second terminal. The end-face edge being closer to the end face than the inner edge. A distance between the first through-hole via and the end-face edge is equal to or smaller than one eighth of a signal wavelength of a high speed signal transmitted through the first terminal.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: August 29, 2023
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taichi Misawa, Keiji Tanaka
  • Patent number: 11700689
    Abstract: A circuit board includes a first layer, a second layer, a third layer, a plurality of plating through holes, at least one first intermediate layer and at least one second intermediate layer. The first layer and the second layer are used as reference voltage planes. A plurality of transmission wires are disposed on the third layer. The transmission wires are coupled to a wireless signal transceiver and a plurality of antenna arrays; wherein the third layer is disposed between the first layer and the second layer. The plating through holes are disposed at sides of the third layer, wherein the plurality of plating through holes are configured to connect the first reference voltage plane with the second reference voltage plane. The first intermediate layer is disposed between the first layer and the third layer, and the second intermediate layer is disposed between the second layer and the third layer.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: July 11, 2023
    Assignee: HTC Corporation
    Inventors: Che-Jung Chang, Chia-Chu Ho, Wei-Hong Gao
  • Patent number: 11690175
    Abstract: A connection structure configured to connect a display panel and a circuit board, includes a flexible printed circuit, a first chip-on-film, and a second chip-on-film. The first chip-on-film and the second chip-on-film are coupled to one end of the flexible printed circuit. The first chip-on-film and the second chip-on-film are coupled to two surfaces of the flexible printed circuit that are opposite in a thickness direction of the flexible printed circuit.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: June 27, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chang Liu