Abstract: A device and a scheme for realizing the bridge interconnection in the ATM network efficiently. In the bridge device, a MAC frame transmitted from the interface with respect to the ATM network is transmitted selectively to either a point-to-point ATM connection interconnecting this bridge device and another bridge device or a multicast ATM connection interconnecting this bridge device and other bridge devices, while MAC addresses and identifiers of point-to-point ATM connections are registered in correspondences in a table.

Abstract: Techniques for (a) controlling admission of customers to a shared resource, (b) adjusting the capacity of a resource in light of new customer demand, and (c) diverting usage from a failed resource to alternative resources, each use a "blocking probability computer" (BPC) to solve a resource-sharing model that has a product-form steady-state distribution. The techniques allow each customer to obtain an appropriate grade of service and protection against overloads from other customers. Each customer is a source of a series of requests, and is assigned "upper-limit" (UL) and "guaranteed-minimum" (GM) "bounds" on its requests. The upper limit bound puts an upper limit on the number of requests from that customer that can be in service at any time. The guaranteed-minimum bound guarantees that there will always be available resource units in the resources to serve a specified number of requests from that customer.

Abstract: The port in a packet network switching system that a packet should be associated with is determined by retrieving packet address information for a packet that is to be transmitted. A predetermined number of bits from the packet address information is selected to use a hash key, which is used to compute a table address. The contents of the table at that address are compared with the packet address information. If it matches, the packet is transmitted over the port associated with that particular destination address. If it does not match, the table address is incremented by one, and the contents of the new table location identified by the incremented address are compared with the packet address information. A high speed digital video network apparatus which utilizes the hashing function is implemented on a single integrated circuit chip, and includes a network protocol processing system interconnection, compression/decompression circuits, and encoder/decoder circuits.

Abstract: An intelligent multistation access unit is provided having a transmission speed detection circuit for determining the data transmission speed of an attached device attempting to gain access to a node of a multiple transmission rate digital data communications network. The intelligent multistation access unit is comprised of a speed detect circuit, which indicates the data transmission speed of the attached device, a switching circuit which directs the attached device to the speed detect circuit until switched to allow the attached device access to the network node, and a processor that controls the switching circuit and which permits the attached device access to the node depending on the data transmission speed indication.

Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.

Abstract: A new technique for the determination of the masking effect of an audio signal is employed to provide transparent compression of an audio signal at greatly reduced bit rates. The new technique employs the results of recent research into the psycho-physics of noise masking in the human auditory system. This research suggests that noise masking is a function of the uncertainty in loudness as perceived by the brain. Measures of loudness uncertainty are employed to form noise masking thresholds for use in the compression of audio signals. These measures are employed in an illustrative subband, analysis-by-synthesis framework. In accordance with the illustrative embodiment, provisional encodings of the audio signal are performed to determine the encoding which achieves a loudness differential, between the original and coded audio signal, which is less than (but not too far below) the loudness uncertainty.

Abstract: The hybrid medium access control MAC system is configurable to the type of communication required to support a desired application or service. The MAC system analyzes services requested from a settop terminal, or a network controller client, and determines the best MAC component for transmitting signals upstream based on the resources required by the service and the available network resources. A portion of the upstream channel spectrum is allocated to each of the MAC components: 1) POP; 2) assigned static TDMA; 3) assigned dynamic multi-rate TDMA; and 4) random slot reservation-dynamic slot allocation TDMA. Depending upon the communication requirements of the service desired, the configurable MAC system will select the MAC component best suited to support the service. A frequency agile transmitter is then tuned to the channel which has been preallocated for the selected MAC component(s).

Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.

Abstract: A codebook for vector quantization is speaker-adapted or a speaker is normalized so that it complies with the codebook using a small number of samples for learning. A deviation vector is set for the centroid of each cluster or an input vector. The deviation vector is set so that a separately defined objective function is maximized if it is defined to be maximized, or minimized if it is defined to be minimized. The maximization or minimization is performed using samples for learning obtained from a speaker who uses the system when the centroid or input vector is moved by an amount corresponding to the deviation vector. By moving the centroid or input vector using the deviation vector, speaker adaptation is performed if the former is moved and speaker normalization is performed if the latter is moved.

Abstract: An interface circuit is provided for implementing zero-byte substitution (ZBS) in a channel unit or line card which couples a digital subscriber line, such as a basic or primary rate Integrated Services Digital Network (ISDN) line, to a T1 network or other digital transmission facility. On the transmit side, the occurrence of an all-zero data byte in a B channel of the ISDN interface causes a corresponding zero byte indicator (ZBI) flag to be produced in the D+ channel, and also causes the all-zero byte to be replaced by the preceding non-zero data byte rather than by a prescribed or predetermined data byte. On the receive side, the occurrence of a repeated data byte in a B channel is detected and causes the current data byte to be replaced by an all-zero byte to restore the original data. The ZBI flag is then used as an error check bit to verify that the reinsertion of the all-zero byte was correct.

Abstract: A method and apparatus for providing a reliable means to perform handoff from a code division multiple access (CDMA) system using a pilot signal to an alternative access technique system. Simple pilot box circuitry is added to a set of border base stations. The border base stations are base stations which operate only in the alternative access technique and which have coverage areas which are contiguous with coverage areas of CDMA operation base stations. The mobile unit monitors for the pilot signal from the border base stations in the same manner as it monitors for pilot signals from the CDMA operation base stations. When the mobile unit detects the pilot signal corresponding to a border base station, it notifies a system controller in accordance with standard operation. The system controller is aware that the pilot signal corresponds to a border base station and thus triggers a hard handoff process to the alternative access technique system in response thereto.

Abstract: AN ATM communication system having both dynamic bandwidth allocation capability comprising storage mechanism for DBA traffic, the storage mechanism further including dedicated storage mechanism for ABR traffic. The system being such that ABR bandwidth requests are allocated after all other DBA bandwidth allocations have been satisfied. A device for interrupting an ABR transmission, before a bandwidth allocation within which the said ABR transmission is included has been fully used, for the transmission of other higher priority DBA traffic is provided.

Abstract: A system for converting between parallel data and serial data is described. In the system (10), individual bits of the parallel data (12) are latched into individual registers (117). Each register (117) is coupled to a corresponding AND gate (110) which is also connected to receive phased clock signals. The output terminals of the AND gates (110) are connected to an OR gate (115). Using the system, with appropriately phased clocks, the parallel data is converted into serial data.

Abstract: An apparatus for decoding a compressed and coded sound signal by applying thereto an inverse quantization processing and a synthesis processing is arranged to include a data extracting unit for extracting quantization level data, scale factor data and quantization data from a data stream of the compressed and coded sound signal, and an integrated processing unit for processing the extracted data by use of an integrated operational equation which is obtained by combining a first operational equation used for the inverse quantization processing with a second operational equation used for the synthesis processing.

Abstract: In the inbound direction, a tributary processor (32) includes an SPE encoder/decoder for extracting a synchronous payload envelope (SPE) from an STS-1P signal. A path terminator (62) may extract DS3 signals or a matrix payload envelope (MPE) from the STS-1P SPE. A DS1/DS3 extractor (68) generates DS1 signals from either the DS3 or MPE signals. An MPE mapper (70) creates MPE signals from the DS1 signals. A wideband stage interface (74) converts the MPE signals into matrix transport format (MTF) signals for cross-connection in a wideband center stage matrix (22). In the outbound direction, the wideband stage interface (74) receives MTF signals from the wideband center stage matrix (22) and generates MPE signals therefrom. The MPE signals are sent through the MPE mapper (70) in order to extract DS1 signals. The DS1 signals are converted to DS3 signals or another MPE mapping by the DS1/DS3 extractor (68). The path terminator receives DS3 or MPE signals for conversion into an STS-1P SPE.

Abstract: A flow control enabled Ethernet switch that applies backpressure to input ports that attempt to transmit a data packet to a busy destination port. The backpressure is a phantom packet that activates to abort transmission of the data packet. When the destination port is available, the phantom packets control retransmission, permitting standard retransmission of the data packet. The switch may include prioritization mechanisms to use when awarding priority to a port having backpressure applied.

Abstract: Subscriber units (26) in a satellite communication system (10) send and receive data messages at optimum times. Each subscriber unit (26) has a pre-programmed database that includes a collection of messages (302), such as data (314), fax (316), pre-recorded voice (318), pager (320), or video files (322). Pre-programmed times include low traffic times (404) and/or most economical times (406) at the point of origination and/or destination. Low traffic time information (404) and most economical time information (406) are stored in the subscriber unit (26) and may be updated by the communication system (10). The subscriber unit (26) sends and receives messages at either a pre-programmed or low traffic time (404) or most economical time (406). The satellite communication system (10) calculates message delivery time when different from a user's time zone. A user is notified when a message is sent and received. The subscriber unit (26) stores the messages for future access.

Abstract: A packet communications network includes both packet switched and circuit switched transmission links. A path test command launched from a source resource on the network to a destination resource follows a current path from the source to the destination. At each resource, the path test command initiates a process which identifies the next resource in the path, the port of the current resource through which the next resource is accessed, and the current time. This data is returned to the source resource where the data is accumulated for the entire path and then analyzed to determine the location of failed links, if any, the response time from the source to the destination, the response time of each resource in the path, and the location of congested links. Packet switched resources identify the path test command themselves and carry out the testing procedure. Circuit switched resources utilize the control point controlling that resource to carry out the testing procedure.

Abstract: The present invention relates to a system and method for sending and receiving digital signals in a voice communication system. The system includes a data buffer, a tone detector, a speech encoder, and a transmitting unit. The data buffer receives and stores a digitized signal including voice band tone data and speech data. The tone detector detects the voice band tone data and generates at least one tone packet containing data indicative of the voice band tone data. The speech encoder encodes the speech data into a plurality of compressed speech packets. The transmitting unit in communication with the tone detector and the speech encoder transmits a packet message including tone packets and speech packets over an RF channel. The present invention also relates to a receiver including a speech decoder and a tone generator. The speech decoder decompresses speech packets to generate a digitized speech signal.

Abstract: Signals (e.g., for audio/video conferencing) are divided into data packets for transmission from a local node to a remote node. The transmission of the data packets is delayed to transmit then at intervals to avoid overloading the remote node with data packets that it does not have the bandwidth to receive and/or process. The invention helps prevent the remote node from dropping data packets which may otherwise occur when transmitting audio and/or video signals during a session (e.g., an audio/video conferencing session).