Abstract: A color-temperature adjustment device and a lamp are provided. The color-temperature adjustment device includes a plug-in male terminal and a plug-in female terminal. A first end of the plug-in male terminal is connected to a first end of the plug-in female terminal, and a second end of the plug-in male terminal is configured to connect to a light-emitting component. A second end of the plug-in female terminal is configured to connect to a power supply component. By connecting the plug-in male terminal to the plug-in female terminal from different directions, the color temperature of the light-emitting component can be adjusted. The plug-in male terminal includes a first pin and at least two second pins. The plug-in female terminal includes a first socket and at least two second sockets. The first pin is configured to insert into the first socket. The second pin is configured to insert into the second socket.

Abstract: A light fade controller includes an input power detection circuit configured to detect whether an input power is available. The light fade controller further includes a power discharge circuit configured to enable a power discharge path to discharge output power from a driver circuit through the power discharge path in response to the input power detection circuit detecting that the input power is unavailable.

Abstract: The present disclosure provides a device for signal delay. The device comprises: a frame of insulation material; multiple signal electrodes provided in the frame and electrically connected to each other in series; an input terminal electrically connected to a first of the multiple signal electrodes and configured to receive an input signal; and an output terminal electrically connected to a second of the multiple signal electrodes and configured to output an output signal that is delayed by the multiple signal electrodes with respect to the input signal, wherein at least one of the multiple signal electrodes is located at a different height than those of other signal electrodes with respect to a surface on which the device is to be mounted.

Abstract: A gated tri-state (G3S) inverter includes: first, second and third transistors of a first dopant type (D1 transistors) and first, second and third transistors of a second dopant type (D2 transistors) serially connected between a first reference voltage and second reference voltage, the second dopant type being different than the first dopant type; gate terminals of an alpha one of the noted D1 transistors and an alpha one of the noted D2 transistors being configured to receive an input signal; gate terminals of a beta one of the noted D1 transistors and a beta one of the noted D2 transistors being configured to receive a gating signal; a gate terminal of a gamma one of the noted D2 transistors being configured to receive an enable signal; and a gate terminal of a gamma one of the noted D1 transistors being configured to receive an enable_bar signal.

Abstract: A boost circuit that boosts a voltage using multiple capacitors and multiple diodes disposed on an insulated substrate, where the insulated substrate is divided into multiple insulated substrates, and at least one of the multiple capacitors or the multiple diodes is disposed between the insulated substrates to cross an insulation layer between the insulated substrates.

Abstract: System and techniques for selectable clock sources are described herein. An electronic device includes an oscillator for a first clock signal and a tap on an input signal line to a resonator for the oscillator. The tap enables receipt of a second clock signal from an external oscillator. The electronic device includes mode selection circuitry to receives a signal from a tap to an existing input line to the electronic device. The mode selection circuitry uses this signal to select the oscillator output as the clock source or the tap on the input signal line as the clock source.

Abstract: A brightness control device for controlling light-emitting diodes (LEDs) during a video recording performed by an image sensor. The brightness control device includes a pulse width modulation (PWM) signal output unit and a brightness control signal generation unit. The signal output unit is configured to provide at least one PWM signal. The brightness control signal generation unit is configured to generate a brightness control signal according to an exposure signal of the image sensor and the at least one PWM signal.

Abstract: An integrated phase accumulator apparatus includes a first phase accumulator, a second phase accumulator, and a switch. The first phase accumulator is configured to accumulate a first phase increment over time and provide a first accumulated phase value for signal generation via a local oscillator at a first frequency. The second phase accumulator is configured to accumulate a second phase increment over time and provide a second accumulated phase value for signal generation via the local oscillator at a second frequency. The switch is configured to switch the integrated phase accumulation apparatus between the first frequency and the second frequency and between the second frequency and the first frequency so as to maintain a first continuous phase for the first frequency and a second continuous phase for the second frequency.

Abstract: Receiver circuitry for mitigating effects associated with the phase differences between a capture clock signal and the receipt of a data signal includes first data path circuitry, second data path circuitry, and phase alignment circuitry. The first data path circuitry receives a first data signal based on a capture clock signal. The second data path circuitry receives a second data signal based on the capture clock signal. The phase alignment circuitry adjusts the phase of a first launch clock signal and a second launch clock signal based on a first clock slip signal and a second clock slip signal, respectively. The phase alignment circuitry adjusts a phase of the capture clock signal relative to one of the first and the second launch clock signals based on a first adjustment value associated with the first data path circuitry and a second adjustment value associated with the second data path circuitry.

Abstract: A system includes a measuring device, a processing device and a signal generating device. The measuring device is configured to measure a voltage difference between a first node and a second node. The processing device is coupled between the first node and the second node. The signal generating device is configured to provide a first clock signal to the processing device to adjust the voltage difference, configured to generate the first clock signal according to a first enable signal and a second clock signal, and configured to align an edge of the first enable signal with an edge of the second clock signal. A method and a device are also disclosed herein.

Abstract: A phase interpolator circuit has a first stage that selects a pair of phase vectors from among M available sets of pairs and a second stage that interpolates between the selected pair to phase align a sample clock. The interpolation functions applied to selected pairs of phase vectors can differ to account for integral non-linearity, duty-cycle distortion, phase errors, and crosstalk that vary between phase vectors.

Abstract: A method is provided for determining the three-dimensional position of a plurality of individually controllable lighting devices, including: A) arrangement of the lighting devices in an environment; B) determination of positions of at least part of the lighting devices with respect to a single viewpoint, through the acquisition, by a camera, of a sequence of images of the environment in which the lighting devices is arranged and processing said sequence of images to obtain a two-dimensional model of the positions of at least part of said lighting devices; C) moving the camera to obtain at least one further two-dimensional model of the lighting devices according to at least one different viewpoint; D) processing the two-dimensional models to create a three-dimensional model. Activation of the lighting devices according to a determined lighting state based on said three-dimensional model is envisaged, the camera being moved based on said determined lighting state.

Abstract: An intrinsically safe (IS) luminaire disposed in a hazardous environment provides visible light and serves as a primary, auxiliary, back-up, and/or charging source of IS DC power for external devices disposed in the hazardous environment, such as process control devices and equipment. The luminaire includes a power converter that converts received power into DC power, an IS barrier that converts the DC power into IS DC power native to or utilized by a recipient external device, and a power distribution port via which IS DC power is delivered to the external device. In some configurations, the luminaire monitors communicates statuses, alerts, and/or other information corresponding to delivering IS DC power to one or more external devices to a host and/or portable communication device. The luminaire may include multiple IS barriers of same and/or different IS ratings, and may dynamically control activation/deactivation of the IS barriers and/or usages thereof.

Abstract: An inventive apparatus includes a substrate and a set of multiple electrically conductive traces. The substrate is transparent or reflective for visible light. The electrically conductive traces are sufficiently transparent, or are less than 200 ?m wide and occupy less than 25% of an areal extent of the set, so as to enable visual observation of a scene through or reflected by the substrate along a sight line that passes through the set of electrically conductive traces.

Abstract: Disclosed are a light emitting semiconductor integrated circuit including a light emitting semiconductor lamp body and a high voltage constant current driver chip. The lamp body has a plurality of non-flashing LED lamps and/or flashing LED lamps connected in series. An input voltage of the high voltage constant current driver chip has a preset input voltage range, a first reverse breakdown voltage of the high voltage constant current driver chip has a preset breakdown voltage range, a first output current of the high voltage constant current driver chip has a preset output current range, and a first threshold voltage of the high voltage constant current driver chip has a preset threshold voltage range.

Abstract: Provided is a method and apparatus for controlling light attributes of a lighting device, and a lighting system and includes an indicator that receives an input, and sends to a control unit, a signal for switching light attribute of the lighting device; and the control unit determines whether a first switching signal or a second switching signal from the indicator is received during a light emission period after the lighting device is powered on, and if it is determined that the first switching signal is received, switching a current light attribute to another light attribute, or if it is determined that the second switching signal is received, switching the current light attribute to a light attribute indicated by the second switching signal such that when a specific light attribute is indicated by the second switching signal, the light attribute can still be adjusted with the first switching signal.

Abstract: An example apparatus includes a first transistor configured to receive an analog voltage signal; a second transistor configured to receive a first control signal, coupled to the first transistor, and coupled to a first terminal; a third transistor configured to receive a second control signal, receive a supply voltage, and coupled to the first terminal; a capacitor coupled to the first terminal and to ground; a fourth transistor configured to receive a third control signal and coupled to the first terminal; a fifth transistor gate configured to receive a bias voltage, coupled to ground, and coupled to the fourth transistor; a sixth transistor coupled to the fourth transistor and to ground; a seventh transistor configured to receive the supply voltage, coupled to the first terminal and to the sixth transistor; and an eighth transistor coupled to the first terminal, to the sixth transistor, and to ground.

Abstract: In some examples, an apparatus includes an isolating transformer and a grounding circuit. The isolating transformer has first and second coils separated by an isolation barrier, the first coil having first and second terminals. The grounding circuit is coupled to the first and second terminals. The grounding circuit is configured to couple the first and second terminals to a ground terminal during a first time period. The grounding circuit is also configured to decouple the first and second terminals from the ground terminal during a second time period.

Abstract: Provided are a method and an apparatus for controlling an under-display camera, and the under-display camera structure. The method includes: when a camera is in a turned-on state, lamp beads close to a camera end are turned off and lamp beads far away from the camera are controlled to be in a lighting state, and light emitted by the second-type lamp beads forms a circle of light on the convex glass after being refracted by the convex glass; and when the camera is in a turned-off state, the plurality of lamp beads are controlled to be in a lighting state, and backlight for the convex glass after being refracted is provided by the convex glass. When the camera is turned on, the light emitted by the lamp beads far away from the camera forms a circle of light on the convex glass after being refracted by the convex glass.

Abstract: A digital clock multiplier (DCM) circuit including: a plurality of power amplifier (PA) rows, wherein each PA row comprises a plurality of cascade switched capacitor power amplifiers (SCPA) unit cells configured to: receive a phase shift of a driving clock phase; and one or more processors configured to: disable of one or more of the plurality of cascade SCPA unit cells based on a frequency of the phase shift; generate an output signal for each of the cascade SCPA unit cells; and combine the output signal for each of the cascade SCPA unit cells to generate an PA row output signal.