Abstract: A controller of an information handling system may detect a power fault event for one or more of a plurality of memories configured to operate in a memory mirroring mode. The controller may deactivate the one or more of the plurality of memories by mapping the one or more of the plurality of memories out from usage without rebooting the information handling system based, at least in part, on the detection of the power fault event and the received notification.

Abstract: The present disclosure describes example service takeover methods, storage devices, and service takeover apparatuses. In one example method, when a communication fault occurs between two storage devices in a storage system, the two storage devices respectively obtain running statuses of the two storage devices. A running status can reflect current usage of one or more system resources of a particular storage device. Then, a delay duration is determined according to the running statuses, where the delay duration is a duration for which the storage device waits before sending an arbitration request to a quorum server. The two storage devices respectively send, after the delay duration, arbitration requests to the quorum server to request to take over a service. The quorum server then can select a storage device in a relatively better running status to take over a host service.

Abstract: Methods, systems, and devices for memory data correction using multiple error control operations are described. A single command may be received to correct an error detected in data stored by a memory array. A first error control operation and a second error control operation may be implemented based on the single command. The first error control operation may be performed on the data stored by the memory array using one or more different reference voltages to read the data. The error may be determined to remain in the data after performing the first error control operation. The second error control operation may then be performed on the data stored by the memory array. The second error control operation may use one or more voltage distributions associated with the memory cells of the memory array.

Abstract: Disclosed methods and systems may perform testing and test management operations in which an information handling resource is provisioned with a programming hook corresponding to an operation associated with the resource. Extended testing operations may be performed when the hook is triggered. These operations may include selecting a particular test service docker from among one or more extended test service dockers. The particular test service docker may then be downloaded and executed. The triggering operation may be associated with a standard pre-check/post-check test framework and, in such cases, the extended testing operations include one or more tests in addition to the pre-check and post-check. Suitable test service dockers may be maintained in a public and/or private cloud. Some embodiments support customer-defined test service dockers, which may initiate as private dockers, but which may be published to the public cloud and linked to the hook.

Abstract: The subject technology provides for managing a data storage system. A data operation error for a data operation initiated in a first non-volatile memory die of a plurality of non-volatile memory die in the data storage system is detected. An error count for an error type of the data operation error for the first non-volatile memory die is incremented. The incremented error count satisfies a first threshold value for the error type of the data operation error is determined. The first non-volatile memory die is marked for exclusion from subsequent data operations.

Abstract: A test environment apparatus having processing circuitry is provided for testing an embedded system-under-test. The processing circuitry may be configured to implement the system-under-test for interaction with external test participants via messaging and control operation of an inner agent and an outer agent. The inner agent may be implemented within a virtual machine that is also implementing the system-under-test and the outer agent may be implemented external to the virtual machine implementing the system-under-test. The inner agent and the outer agent may be controlled to operate collaboratively to trigger captures of snapshots that store current states of the system-under-test at respective times and trigger a rollback of the system-under-test based on a timestamp of a delayed message using a snapshot for a selected time that provides a state of the system-under-test prior to the timestamp to permit subsequent delivery of the delayed message with the system-under-test in a rollback state.

Abstract: A method and apparatus provide recovery from a computing device boot up error by detecting a current boot up error in the computing device, loading a plurality of recovery pre-EFI initialization modules (PEIMs), of a recovery unified extensible firmware interface (UEFI) BIOS for execution, wherein the recovery PEIMS include executable code to pre-initialize at least a processing unit and memory of the computing device in a pre-EFI initialization (PEI) phase of a multi-phase platform initialization operation, and recovering from the boot up error by booting up the computing device using the loaded plurality of recovery pre-EFI initialization modules.

Abstract: A method is provided for providing mobile device support services. The method may include monitoring a mobile device status. The method may additionally include performing device diagnostics based at least in part on captured device status data to identify potential faults that may affect mobile device functionality. A corresponding system, apparatus, and computer program product are also provided.

Abstract: Techniques for identifying anomalous multi-source data points and ranking the contributions of measurement sources of the multi-source data points are disclosed. A system obtains a data point including a plurality of measurements from a plurality of sources. The system determines that the data point is an anomalous data point based on a deviation of the data point from a plurality of additional data points. The system determines a contribution of two or more measurements, from the plurality of measurements, to the deviation of the data point from the plurality of additional data points. The system ranks the at least the two or more measurements, from the plurality of measurements, based on the respective contribution of each of the two or more measurements to the deviation of the anomalous data point from the plurality of prior data points.

Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.

Abstract: A system of communicating data over a high availability industrial control system is disclosed. The industrial control system includes a first data producer, a second data producer in communicative connection with the first data producer, a first data consumer, and a second data consumer in communicative connection with the first data consumer. The system further includes the first producer communicating the data over multiple connection paths from the first producer to the first consumer and the second consumer through intermediate modules, and the second producer communicating the data over multiple connection paths from the second producer to the first consumer and the second consumer through intermediate modules. Also disclosed is a method of communicating data over the high availability industrial control system.

Abstract: Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having an integrated voltage regulator and a power management controller, and a first communication path coupled to the power management controller, wherein the first communication path is to carry power error information to the power management controller. The technology may also include a second communication path coupled to an error pin of the SoC, wherein the second communication path is to carry the power error information to the error pin, and wherein the power error information is associated with the integrated voltage regulator.

Abstract: A fault detection system includes a sensor configured to measure a physical quantity and generate a measurement of the physical quantity; a first processor configured to receive the measurement, execute a first firmware based on the measurement, and output a first result of the executed first firmware; a second processor configured to receive the measurement from the sensor, execute a second firmware based on the measurement, and output a second result of the executed second firmware, wherein the first firmware and the second firmware provide a same nominal function in a diverse manner for calculating the first result and the second result, respectively, such that the first result and the second result are expected to be within a predetermined margin; and a fault detection circuit configured to detect a fault when the first result and the second result are not within the predetermined margin.

Abstract: Aspects of the disclosure relate to application assessment. A computing platform may receive content information and manual input data corresponding to hierarchical content. The computing platform may establish a content tree indicating relationships between pages of the hierarchical content. The computing platform may receive starting/ending pages of the hierarchical content and application assessment commands. Using the content tree and in response to receipt of the application assessment commands, the computing platform may generate error information based on the starting page and the ending page by performing a holistic error analysis of the hierarchical content between the starting page and the ending page, which may include automatically populating manual input fields using the manual input data.

Abstract: An artificial neural network system for managing a task to be performed by heterogeneous resources executing an artificial neural network, the artificial neural network system including a model analyzer that receives an artificial neural network model and outputs sub-graph information generated based on the artificial neural network model including at least one of sub-graph, a detector that outputs awareness information about the heterogeneous resources, and a task manager that outputs a first request signal for performing a task with respect to each layer of first resource of the heterogeneous resources based on the sub-graph information and the awareness information, and a second request signal for performing an task with respect to each depth of a second resource of the heterogeneous resources.

Abstract: The disclosure herein describes enhancing data durability of a base component of a data object using an unplanned delta component during transient fault unavailability. A base component of a data object becoming unavailable due to a transient fault is detected. A delta component associated with the base component is generated, wherein the delta component includes unwritten storage space with an address space and a tracking bitmap including a plurality of bits associated with data blocks of the address space of the delta component. The stale LSN with which the base component is associated is assigned to the delta component and the delta component is synchronized with an active component of the data object based on the assigned stale LSN. The delta component records write I/O targeted for the base component and, based on detecting the base component becoming available, the base component is synchronized with the delta component.

Abstract: A memory system includes a memory device, a memory controller configured to control the memory device, and an auxiliary power source configured to supply power to the memory device and the memory controller. The memory controller activates the auxiliary power source in response to the occurrence an NPO (normal power-off) or an SPO (sudden power-off), checks whether there exists an uncompleted operation at a point of time at which the auxiliary power source is activated, and completes the uncompleted operation, and when an amount of residual energy of the auxiliary power source after completing the uncompleted operation exceeds a predetermined threshold value, performs a data verify operation for a predetermined area in the memory device and stores a result of the data verify operation in the memory device.

Abstract: A method of verifying execution sequence integrity of an execution flow includes receiving, by a local monitor of an automated device monitoring system from one or more sensors of an automated device, a unique identifier for each function in a subset of an execution flow for which the local monitor is responsible for monitoring. The method includes combining the received unique identifiers to generate a combination value, applying a hashing algorithm to the combination value to generate a temporary hash value, retrieving, from a data store, a true hash value, determining whether the temporary hash value matches the true hash value, and in response to the temporary hash value not matching the true hash value, generating a fault notification. The true hash value represents a result of applying the hashing algorithm to a combination of actual unique identifiers associated with each function in the subset.

Abstract: Embodiments are for using sequential set index to determine the root cause location of software issues and problem verification of the software issues. Fail data for a software program is received. The fail data corresponds to a plurality of failed test cases for the software program. It is determined that at least one model in a plurality of models includes at least one case that matches the fail data of the software, each of the plurality of models having one or more cases, the at least one case being in the one or more cases. It is determined that a root cause of the at least one model corresponds to the plurality of failed test cases for the software program.

Abstract: A method of performing error detection within an integrated circuit chip analyses transactions communicated over interconnect circuitry of the integrated circuit chip to detect whether a message contains a data error. A memory of the integrated circuit chip coupled to the interconnect circuitry is scanned to detect whether there is a data error stored in the memory, and in response to detecting a data error in a transaction communicated over the interconnect circuitry and/or a data error stored in the memory, a dedicated action indicative of a data error is performed.