Patents Examined by Seahvosh J Nikmanesh
  • Patent number: 7387954
    Abstract: The present invention is to provide a beam homogenizer, a laser irradiation apparatus, and a method for manufacturing a semiconductor device, which can suppress the loss of a laser beam and form a beam spot having homogeneous energy distribution constantly on an irradiation surface without being affected by beam parameters of a laser beam. A deflector is provided at an entrance of an optical waveguide or a light pipe used for homogenizing a laser beam emitted from a laser oscillator. A pair of reflection planes of the deflector is provided so as to have a tilt angle to an optical axis of the laser beam, whereby the entrance of the optical waveguide or the light pipe is expanded. Accordingly, the loss of the laser beam can be suppressed. Moreover, by providing an angle adjusting mechanism to the deflector, a beam spot having homogeneous energy distribution can be formed at an exit of the optical waveguide.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: June 17, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Hirotada Oishi
  • Patent number: 7384804
    Abstract: One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: June 10, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Drost, Ivan E. Sutherland, William S. Coates
  • Patent number: 7384816
    Abstract: An apparatus and method for forming vias in one or more layers, comprising one or more beams located in alignment with the layers for forming one or more vias in one or more areas of the layers. A vacuum mechanism is provided for collecting ablated material caused by the directed beams forming the one or more vias, the vacuum mechanism being in fixed alignment with respect to the one or more beams such that the vacuum applies a removal force on the ablated material at the time and location when the one or more vias is being formed.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: June 10, 2008
    Assignee: Eastman Kodak Company
    Inventors: Ronald S. Cok, Michael L. Boroson, Timothy J. Tredwell, Andrea S. Rivers, Dustin L. Winters
  • Patent number: 7384808
    Abstract: A method for fabricating a high brightness LED structure is disclosed herein, which comprises at least the following steps. First, a first layered structure is provided by sequentially forming a light generating structure, a non-alloy ohmic contact layer, and a first metallic layer from bottom to top on a side of a first substrate. Then, a second layered structure comprising at least a second substrate is provided. Then, the two-layered structures are wafer-bonded together, with the top side of the second layered structure interfacing with the top side of said first layered structure. The first metallic layer functions as a reflective mirror, which is made of a pure metal or a metal nitride to achieve superior reflectivity, and whose reflective surface does not participate in the wafer-bonding process directly.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: June 10, 2008
    Assignee: Visual Photonics Epitaxy Co., Ltd.
    Inventors: Jin-Hsiang Liu, Hui-Heng Wang, Kun-Chuan Lin
  • Patent number: 7381587
    Abstract: A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: June 3, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, John M. Lauffer, Voya R. Markovich, William E. Wilson
  • Patent number: 7375039
    Abstract: A method and an apparatus for performing the method. The method includes: (a) providing an apparatus, wherein the apparatus comprises (i) a chamber, (ii) a plasma device being in and coupled to the chamber, (iii) a shower head being in and coupled to the chamber, and (iv) a chuck being in and coupled to the chamber; (b) placing the substrate on the chuck; (c) using the plasma device to receive a plasma device gas and generate a plasma; (d) directing the plasma at a pre-specified area on the substrate; and (e) using the shower head to receive and distribute a shower head gas in the chamber, wherein the plasma device gas and the shower head gas are selected such that the plasma and the shower head gas when mixed with each other result in a chemical reaction that forms a film at the pre-specified area on the substrate.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: May 20, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Thomas L. McDevitt, Anthony K. Stamper
  • Patent number: 7375008
    Abstract: The invention relates to a method of re-forming a useful layer on a donor wafer after taking off a useful layer formed of a material chosen from among semiconductor materials. The donor wafer includes in succession a substrate and a taking-off structure, the taking-off structure includes the taken-off useful layer before taking-off. The method includes a removal of material involving a portion of the donor wafer on the side where the useful layer has been taken off. The material is removed by mechanical means so as to preserve a portion of the taking-off structure to form at least one other useful layer which can be taken off after re-forming, without adding additional material to the wafer.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: May 20, 2008
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Takeshi Akatsu, Bruce Faure
  • Patent number: 7358177
    Abstract: A fabrication method of under bump metallurgy (UBM) structure is provided. A blocking layer is applied over a surface of a semiconductor element formed with at least one bond pad and a passivation layer thereon. The passivation layer covers the semiconductor element and exposes the bond pad, and the blocking layer covers the bond pad and the passivation layer. The blocking layer is formed with at least one opening at a position corresponding to the bond pad. Metallic layers are formed on a surface of the blocking layer and at the opening. The metallic layers are patterned to form a UBM structure at the opening corresponding to the bond pad. Then the blocking layer is removed. The blocking layer can separate the metallic layers for forming the UBM structure from the passivation layer to prevent metallic residues of the UBM structure from being left on the passivation layer.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: April 15, 2008
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Chi Ke, Chien-Ping Huang