Patents Examined by Shane Woolwine
  • Patent number: 9405859
    Abstract: Methods for storing a feature vector, as well as related comparison units and systems. One such method involves programming a string of memory cells of memory to store do not care data as at least a portion of a value of an attribute of the feature vector.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: August 2, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Kenneth J. Eldredge, Frankie F. Roohparvar, Luca De Santis, Tommaso Vali
  • Patent number: 9396135
    Abstract: A physical cache memory that is divided into one or more virtual segments using multiple circuits to decode addresses is provided. An address mapping and an address decoder is selected for each virtual segment. The address mapping comprises two or more address bits as set indexes for the virtual segment and the selected address bits are different for each virtual segment. A cache address decoder is provided for each virtual segment to enhance execution performance of programs or to protect against the side channel attack. Each physical cache address decoder comprises an address mask register to extract the selected address bits to locate objects in the virtual segment. The foregoing can be implemented as a method or apparatus for protecting against a side channel attack.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 19, 2016
    Assignee: University of North Texas
    Inventor: Krishna M. Kavi
  • Patent number: 9378131
    Abstract: The non-volatile storage solid state drive (SSD) has non-volatile memory (NVM), random access memory (RAM) capable of being accessed at a higher speed than this NVM, and a control unit for controlling accesses to the NVM and to the RAM. The control unit stores in the NVM an address translation table that translates a logical address given to access this NVM to a physical address after dividing it into multiple tables, and stores in the RAM the multiple address translation tables-sub on RAM that have been divided into multiple tables.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: June 28, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Kenzo Kurotsuchi, Seiji Miura
  • Patent number: 9377960
    Abstract: A data storage method, comprising, receiving host data to be written to a plurality of flash storage devices, allocating the host data to one or more data units of a plurality of data units, allocating pad data to one or more data units of the plurality of data units that have not been filled with host data and generating redundant data in a redundant data unit based on the plurality of data units. The method further comprises steps for writing the plurality of data units and the redundant data unit to a stripe across the plurality of flash storage devices, wherein each of the plurality of data units and the redundant data unit is written in the respective flash storage devices at a common physical address.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: June 28, 2016
    Assignee: HGST TECHNOLOGIES SANTA ANA, INC.
    Inventors: Mark Moshayedi, William Calvert
  • Patent number: 9355026
    Abstract: Methods of searching and methods of programming a memory are provided. In one such method of searching, a determination is made as to whether an attribute of a data feature vector programmed in a memory matches within a particular range of values of a same attribute of an input feature vector provided to the memory. In at least some embodiments, the determination is made by applying a pair of gate voltages to a pair of memory cells storing the value of the attribute of the data feature vector.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: May 31, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Kenneth J. Eldredge, Frankie F. Roohparvar, Luca De Santis, Tomasso Vali
  • Patent number: 9336152
    Abstract: Described herein are methods, systems and machine-readable media for simulating a FIFO cache using a Bloom filter ring, which includes a plurality of Bloom filters arranged in a circular log. New elements are registered in the Bloom filter at the head of the circular log. When the Bloom filter at the head of the circular log is filled to its capacity, membership information associated with old elements in the Bloom filter at the tail of the circular log is evicted (simulating FIFO cache behavior), and the head and tail of the log are advanced. The Bloom filter ring is used to determine cache statistics (e.g., cache hit, cache miss) of a FIFO cache of various sizes. In response to simulation output specifying cache statistics for FIFO cache of various sizes, a FIFO cache is optimally sized.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: May 10, 2016
    Assignee: Nimble Storage, Inc.
    Inventors: Senthil Kumar Ramamoorthy, Umesh Maheshwari
  • Patent number: 9336056
    Abstract: Embodiments include methods, systems and computer program products for providing an extendable job structure for executing instructions on an accelerator. The method includes creating a number of data descriptor blocks, each having a fixed number of memory location addresses and a pointer to a next of the number of the data descriptor block. The method further includes creating a last data descriptor block having the fixed number of memory location addresses and a last block indicator. Based on determining that additional memory is required for executing instructions on the accelerator, the method includes modifying the last data descriptor block to become a data extender block having a pointer to one of one or more new data descriptor blocks and creating a new last data descriptor block.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: May 10, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sameh W. Asaad, Parijat Dube, Hong Min, Donald W. Schmidt, Bharat Sukhwani, Mathew S. Thoennes
  • Patent number: 9304699
    Abstract: A technique manages token states across multiple storage processors (SPs) of a data storage array. The technique involves using a token, by a first SP, to identify particular data stored on the array. The technique further involves updating, by the first SP, a first SP-controlled set of token state information for the token, the first SP-controlled set of token state information including (i) a first token state which indicates whether the token is “idle” or “busy” from a perspective of the first SP and (ii) a second token state which indicates whether the token is “idle” or “busy” from a perspective of a second SP. The technique further involves expiring, by the first SP, the token in response to the first SP-controlled set of token state information indicating that the token has remained “idle” for at least a predefined amount of time.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 5, 2016
    Assignee: EMC Corporation
    Inventors: Robert F. Goudreau, James M. Holt, Karl M. Owen, Alan L. Taylor, Chung-Huy Chen
  • Patent number: 9298394
    Abstract: According to this invention, a data arrangement method, the computer connected to a storage system which provides a plurality of logical storage devices comprising a plurality of physical storage devices arranges data in a logical storage volume constructed by integrating the plurality of logical storage devices. The method includes: a step wherein the computer receives an instruction to build the logical storage volume using the plurality of logical storage devices or to rebuild the constructed logical storage volume; a step wherein the computer obtains information about the plurality of physical storage devices constituting each of the plurality of logical storage devices included in the received instruction; and a step wherein the arrangement position of data into the logical storage volume is determined on the basis of the obtained information about the plurality of physical storage devices.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: March 29, 2016
    Assignee: HITACHI, LTD.
    Inventors: Seisuke Tokuda, Kazutomo Ushijima, Akira Shimizu, Michiko Tanaka, Shinji Fujiwara, Nobuo Kawamura
  • Patent number: 9286223
    Abstract: A processor includes a processing unit, a cache memory, and a central request queue. The central request queue is operable to receive a prefetch load request for a cache line to be loaded into the cache memory, receive a demand load request for the cache line from the processing unit, merge the prefetch load request and the demand load request to generate a promoted load request specifying the processing unit as a requestor, receive the cache line associated with the promoted load request, and forward the cache line to the processing unit.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: March 15, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sriram Srinivasan, Tarun Nakra
  • Patent number: 9280487
    Abstract: Data processing methods and apparatus for efficiently storing and retrieving data, e.g., blocks of data, to and from memory. The data processing includes, e.g., techniques such as using linked lists and/or tables for tracking duplicate data blocks received for storage, the use of lossless data compression, and de-duplication based on comparing hash values, compressed data block sizes, and/or bit by bit comparisons of the block of data to be stored and previously stored blocks of data.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: March 8, 2016
    Assignee: CISCO TECHNOLOGY, INC.
    Inventor: James Candelaria
  • Patent number: 9274945
    Abstract: An apparatus and method for processing unit reclaiming requests in a solid state memory device. The present invention provides a method of managing a memory which includes a set of units. The method includes selecting a unit from the set of units having plurality of subunits. The method further includes determining a number of valid subunits m to be relocated from the units selected for a batch operation where m is at least 2. The selecting is carried out by a unit reclaiming process.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Robert Haas, Roman Pletka
  • Patent number: 9274967
    Abstract: Described herein are methods, systems and machine-readable media for simulating a FIFO cache using a Bloom filter ring, which includes a plurality of Bloom filters arranged in a circular log. New elements are registered in the Bloom filter at the head of the circular log. When the Bloom filter at the head of the circular log is filled to its capacity, membership information associated with old elements in the Bloom filter at the tail of the circular log is evicted (simulating FIFO cache behavior), and the head and tail of the log are advanced. The Bloom filter ring is used to determine cache statistics (e.g., cache hit, cache miss) of a FIFO cache of various sizes. In response to simulation output specifying cache statistics for FIFO cache of various sizes, a FIFO cache is optimally sized.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: March 1, 2016
    Assignee: Nimble Storage, Inc.
    Inventors: Senthil Kumar Ramamoorthy, Umesh Maheshwari
  • Patent number: 9268650
    Abstract: A storage device including a copy processor that carries out a copying process of storing the copy of the data stored in the copy-source volume into the copy-destination volume; a copying manager that prepares copying related to the copying process and sets the copying process to a stand-by state; an activation manager that sets activation target data representing a target to be activated for the copying process in response to an activation instruction from a superior device; and a copy controller that cancels the stand-by state of the copying process, being set the activation target data for, and causes the copy processor to carry out the copying process. This configuration makes it possible to back up data of multiple copy sessions, ensuring integrity in timing of data to be backed up without lowering the capability of an I/O process.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: February 23, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Zhongzhong Min
  • Patent number: 9268681
    Abstract: A nonvolatile memory (“NVM”) buffer is incorporated into an NVM system between a volatile memory buffer and an NVM to decrease the size of the volatile memory buffer and organize data for programming to the NVM. Heterogeneous data paths may be are used for write and read operations such that the nonvolatile memory buffer is used only in certain situations.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: February 23, 2016
    Assignee: APPLE INC.
    Inventor: Anthony Fai
  • Patent number: 9264067
    Abstract: Some embodiments include two-dimensional compressed data sets that can be re-aligned while preserving compression of the data. A set of one or more shifts and a corresponding set of one or more first dimension indices into a two-dimensional compressed data set for re-aligning the two-dimensional compressed data set are determined. Impact of re-aligning upon each vector in the second dimension of the two-dimensional compressed data set is determined while the two-dimensional compressed data set remains compressed. New compressed vectors are created in the second dimension resulting from re-aligning. Compression information is modified for each of the original vectors of the two-dimensional compressed data set that remain after re-aligning based, at least in part, on the new compressed vectors. A re-aligned version of the two-dimensional compressed data set is created with the new compressed vectors, and the remaining original vectors with their modified compression information.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventor: Stuart E. Carney
  • Patent number: 9252804
    Abstract: Some embodiments include an apparatus and a computer program product configured to re-align two-dimensional compressed data sets while preserving compression of the data. A set of one or more shifts and a corresponding set of one or more first dimension indices into a two-dimensional compressed data set for re-aligning the two-dimensional compressed data set are determined. Impact of re-aligning upon each vector in the second dimension of the two-dimensional compressed data set is determined while the two-dimensional compressed data set remains compressed. New compressed vectors are created in the second dimension resulting from re-aligning. Compression information is modified for each of the original vectors of the two-dimensional compressed data set that remain after re-aligning based, at least in part, on the new compressed vectors.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventor: Stuart E. Carney
  • Patent number: 9244632
    Abstract: Described are techniques for booting a data storage system. A first set of configuration and state information is read from first storage devices of a first RAID group using special processing code and a RAID library. A first set of system objects (of a system object topology) are instantiated using the first set of information. The first set of system objects represent storage entities containing a second set of configuration and state information. Using an I/O runtime stack based on the system object topology, the second set of information is read from second storage devices of a second RAID group using the same RAID library having calls made from method(s) of a RAID group object representing the second RAID group. A second set of client objects, instantiated using the second set of information, represent storage entities including client data stored on third storage devices of a third RAID group.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: January 26, 2016
    Assignee: EMC Corporation
    Inventors: Robert P. Foley, Peter Puhov, Marc C. Cassano, Ronald D. Proulx, Daniel E. Cummins
  • Patent number: 9223500
    Abstract: Embodiments are directed towards cloning files in a distributed file system. In response to a request to create file clones, a file cloning application can be employed to generate file clones based on a source file. The file cloning application can generate a new inode for each new file clone and at least one new shadow store. Data blocks from the source file can be transferred to the shadow store. The transferred data blocks can be replaced with reference blocks that point to the data blocks transferred to the shadow store. Likewise, additional reference blocks pointing to data blocks in the shadow store can be generated for the new file clone inodes. Further, the shadow store can maintain reference counters that track the number of reference blocks pointing to each shadow store block. Also, file clones can be generated based on a point-in-time snapshot of the source file.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: December 29, 2015
    Assignee: EMC CORPORATION
    Inventors: Eric Michael Lemar, Matthew D. Fleming, Asif Arif Daud, Mohd Fahadullah, Ronald Stuart Steinke, Justin Michael Husted
  • Patent number: 9223692
    Abstract: A non-volatile memory (NVM) includes a memory cell array of multi-level memory cells (MLC) arranged in physical pages. A programming method for the NVM includes; receiving first data and partitioning the first data according to a single bit page capacity of a physical page to generate partitioned first data, programming the partitioned first data as single-bit data to a plurality of physical pages, and receiving second data and programming the second data as multi-bit data to a selected physical page among the plurality of physical pages, wherein the second data is simultaneously programmed to the MLC of the selected physical page.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: December 29, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Donghun Kwak