Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.

Abstract: An integrated circuit includes a clock-tree with a plurality of clock buffers, a plurality of clocked storage elements, and a plurality of logic circuits. Each clocked storage element has a clock input terminal connected to one of the plurality of clock buffers and a weight. Each of the logic circuits is associated with two of the plurality of clocked storage elements and is characterized as having a logic depth. The weight of each clocked storage element is equal to a sum of an inverse of a logic depth of each of the plurality of logic circuits associated therewith. A first clocked storage element which has a highest weight and is adjacent to and interacts with a second clocked storage element via one of the plurality of logic circuits. A first clock buffer provides a common clock signal to the first and second clocked storage elements.

Abstract: The present invention is generally related to an electronic ballast, an ignition control apparatus used therein and associated method of operation. In one embodiment, an electronic ballast comprising an inverter and an ignition control apparatus which comprises a stability monitoring circuit and a controlled ignition circuit. The inverter converts a DC input voltage into an AC voltage to drive a gas discharge lamp. The stability monitoring circuit monitors whether the DC input voltage is stable. The controlled ignition circuit is electrically coupled to the stability monitoring circuit and the lamp, ignites the lamp based on the monitoring result. The controlled ignition circuit does not ignite the gas discharge lamp until the DC input voltage becomes stable.

Abstract: An embodiment of a technique to capture and locally synchronize data is disclosed. The technique includes receiving first and second signals through a first interface, and receiving a third signal through a second interface where the third signal is unsynchronized with respect to the second signal. The technique further includes detecting a first phase difference between the second and third signals, and generating a fourth signal in a manner so that a second phase difference between the fourth signal and one of the second or third signals is a function of the first phase difference. In addition, the technique includes storing a state of the first signal in response to the fourth signal, and thereafter supplying the stored state of the first signal to the second interface.

Abstract: This invention relates to an ambience lighting system for a display device, where light sources are mounted at the periphery or at the rear side of the display device for emitting an ambience light onto a wall behind the display device. An input means receives color information indicating the color of the wall. A processor then adjusts the color of the emitted ambience light to the received color information of the wall such that the light reflected from the wall towards a viewing area of the display device matches the screen colors of the display device.

Abstract: A multi-mode driver with multiple transmitter types including a first transmitter coupled to a transmission channel and operative to output a signal for transmission on the channel and a second transmitter coupled to the channel and operative to output the signal for transmission on the channel, the second transmitter having at least one different output characteristic than the first transmitter. During the output of the signal from one of the transmitters, the other of the transmitters is biased with a bias supply voltage that prevents voltage breakdown of one or more transistors of the other transmitter.

Abstract: Lighting devices and operating methods are presented in which voltage or current perturbations of an OLED caused by a user pressing the OLED are monitored while the OLED is providing general lighting, and one or more lighting control signals are generated based on the sensed perturbations.

Abstract: A system provides for the distribution of intellectual property logic blocks from a source to a user wherein the user may use the logic blocks during development but is prevented from using the block in production without permission. A sensor is connected in parallel with a first signal from the block and in series with a second signal from the block. When activity on the first signal exceeds a predetermined count, the output of the second signal is corrupted. In some embodiments all such sensors are connected to an aggregator which allows all blocks to continue to operate until all of them have exceeded their predetermined activity count. A state machine compares the values of two keys, one stored within the block, to another value stored in the state machine controller, and allows the block to be used in production if the key values coincide.

Abstract: An embodiment includes an impedance calibration circuit having a calibrator configured to compare voltage levels at an external node and an internal node of the impedance calibration circuit and to generate an output based on the comparison. The calibrator further includes respective filters coupled between the external node and a first input of the comparator, and between the internal node and a second input of the comparator. The filters are configured for symmetric noise injection into the comparator from a chip ground line to which a programmable resistor at the internal node is coupled.

Abstract: Dimming ballasts and methods are presented for powering a plurality of fluorescent lamps in which at most one of the lamps is selectively dimmed while all the remaining lamps are turned on or off according to a dimming level setpoint to allow dimming to match a user's desired lighting level while maintaining high efficiency.

Abstract: According to an embodiment, a control system has: a logic module substrate that has a logic FPGA on which logic is mounted, a transmission module that transmits an output logic state signal, which is logic state signal representing an interim logic state of a process by the logic FPGA of deriving a logic output signal from the logic input signals, and a logic monitoring device that displays to monitor the logic state signal transmitted from the transmission module. The logic module substrate includes an event detection unit that detects a change in the logic state signal. Only when a change in the logic state signals is detected by the event detection unit, the logic output state signal being transmitted to the transmission module.

Abstract: A signal driver circuit having an adjustable output voltage for a high-logic level output signal. The signal driver circuit includes a signal driver configured to output a first logic level signal having a first voltage and output a second logic level signal having a second voltage according to an input signal. A voltage controlled voltage supply coupled to the signal driver provides the first voltage for the first logic level signal. The magnitude of the first voltage provided by the voltage controlled voltage supply is based on a bias voltage. A bias voltage generator can be coupled to the voltage controlled voltage supply to provide the bias voltage.

Abstract: A multi-valued driver circuit selectively outputs, to a transmission line, one from among multiple voltages according to a selection signal. A memory circuit stores setting data which define the respective levels of the multiple voltages. According to the selection signal, a selector circuit selects one from among the multiple setting data stored in the memory circuit. A Thevenin termination circuit outputs a voltage that corresponds to the upper M bits of the data thus selected by the selector circuit. An R-2R ladder circuit outputs a voltage that corresponds to the lower Nl bits of the data thus selected by the selector circuit.

Abstract: Apparatus, systems, and methods disclosed herein may cause an event trigger state machine associated with a programmable on-chip logic analyzer (POCLA) to transition to a programmable state at a programmable number of occurrences of a programmable set of events associated with a first subset of signals on a first subset of input signal paths. States associated with a second subset of signals on a second subset of input signal paths may be stored at a time relative to a transition to the programmable state if a set of storage criteria have been met. Additional embodiments are disclosed and claimed.

Abstract: A clock gate includes a first Muller gate that receives at its inputs a clock signal and an enable signal. The output of the first Muller gate is applied, with a delayed version of the clock signal, to a second Muller gate. A logic circuit operates to logically combine the output of the second Muller gate with a delayed version of the clock signal. The output of the logic circuit provides a gated clock output.

Abstract: In accordance with some embodiments, a method for high frequency clock distribution in a VLSI system includes splitting an original master clock signal into one or more pairs of lower-frequency sub-clocks for a destination in the VLSI system, distributing each lower-frequency sub-clock of the one or more pairs of lower-frequency sub-clocks to a corresponding channel coupled to the destination, and reconstructing a reference master clock signal at the destination from the one or more pairs of lower-frequency sub-clocks, wherein the reconstructed reference master clock signal replicates the original master clock signal.

Abstract: A vehicle headlamp apparatus is provided. The vehicle headlamp apparatus includes a first lamp configured to selectively produce a first high beam light distribution pattern and an infrared light distribution pattern, a second lamp configured to selectively produce a second high beam light distribution pattern and a low beam light distribution pattern, a vehicle detector which detects a vehicle running ahead, and a condition-dependent selection controller which controls the first and second lamps. The condition-dependent selection controller controls the second lamp to produce the low beam light distribution pattern when the vehicle detector detects a vehicle and to produce the second high beam light distribution pattern when the vehicle detector detects no vehicle. The condition-dependent selection controller controls the first lamp to produce the infrared light distribution pattern, irrespective of whether the vehicle detector detects a vehicle.

Abstract: A hybrid lamp apparatus is presented having a primary lamp circuit with a CFL and an electronic ballast, as well as a Halogen or incandescent secondary lamp circuit with a control circuit that shuts off the secondary lamp a time period after powerup, where the secondary lamp time period varies according to the amount of time the apparatus was previously unpowered.

Abstract: Disclosed herein is a driver amplifier circuit, including: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of the first current source transistor and the second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node.

Abstract: A signal separation module includes a single-ended bidirectional pin coupled to a processing device, a single-ended unidirectional output pin coupled to a differential signal transceiver, a single-ended unidirectional input pin coupled to the differential signal transceiver, and signal separation logic. The signal separation logic is to detect a current flow condition that indicates the bidirectional pin is asserted by the processing device; assert, as a result of the existence of the current flow condition, the unidirectional output pin and prevent the unidirectional input pin from affecting the bidirectional pin; detect an opposite current flow condition that indicates that the unidirectional input pin is asserted by the differential signal transceiver; and assert, as a result of the existence of the opposite current flow condition, the bidirectional pin and prevent the assertion of the bidirectional pin from affecting the unidirectional output pin.