Patents Examined by Shelly Chase
  • Patent number: 11750227
    Abstract: A method of transmitting data determines a measure of consecutive packet loss in a network; a ratio of a number of data packets and a number of error correction packets is selected in dependence on the measure. A stream of data packets is generated, and a stream of error correction packets is generated in dependence on the stream of data packets such that the proportion of error correction packets generated to the data packets generated is commensurate with the selected ratio.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: September 5, 2023
    Assignee: Imagination Technologies Limited
    Inventors: Senthil Kumar Mani, Bala Manikya Prasad Puram, Sowmya Mannava
  • Patent number: 11740958
    Abstract: Systems and devices can include a physical layer (PHY) that includes a logical PHY to support multiple interconnect protocols. The logical PHY can include a first set of cyclic redundancy check (CRC) encoders corresponding to a first interconnect protocol, and a second set of CRC encoders corresponding to a second interconnect protocol. A multiplexer can direct data to the first set or the second set of CRC encoders based on a selected interconnect protocol. The logical PHY can include a first set of error correcting code (ECC) encoders corresponding to the first interconnect protocol and a second set of ECC encoders corresponding to the second interconnect protocol. The multiplexer can direct data to the first set or the second set of ECC encoders based on the selected interconnect protocol. In embodiments, different CRC/ECC combinations can be used based on the interconnect protocol and the link operational conditions.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: August 29, 2023
    Assignee: Intel Corporation
    Inventor: Debendra Das Sharma
  • Patent number: 11736235
    Abstract: A data processing method and a related apparatus are disclosed, to improve data recovery effects in various packet loss scenarios. The method includes: determining a packet loss scenario type corresponding to a first data packet when detecting that the first data packet is lost in a data packet transmission process (201); generating a second data packet based on a data packet adjacent to the first data packet if the packet loss scenario type corresponding to the first data packet meets a data packet compensation condition (202); and finally adding the second data packet to a corresponding target location at which the first data packet is located before the first data packet is lost, that is, using the second data packet to compensate for the lost first data packet (203).
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: August 22, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Weiqiang Yang, Yuejun Wei, Nijun Li
  • Patent number: 11728928
    Abstract: A blockchain consortium network can be implemented in which nodes of one or more blockchains generate data for pipeline-based processing by a consortium pipeline system. The generated data can include private blockchain data, public blockchain data, and machine data, such as logs or operational metrics from the nodes. The data is collected from different network levels and can be transformed via pipeline processes of the consortium pipeline system to securely share data in the blockchain consortium network.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: August 15, 2023
    Assignee: SPLUNK INC.
    Inventors: Stephen R. Luedtke, Nathaniel G. McKervey, Ryan Moore, Siegfried Puchbauer, Antoine Toulme
  • Patent number: 11722249
    Abstract: There is provided a communication device comprising: a communication control section configured to calculate a distance measurement value based on time stamp information received from another communication device during distance measurement that is based on wireless communication that is performed between the communication device and the another communication device different from the communication device, and conforms to specified communication standards, wherein, when the time stamp information is an eigenvalue specified in advance, the communication control section does not calculate the distance measurement value.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: August 8, 2023
    Assignee: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventor: Yosuke Ohashi
  • Patent number: 11720266
    Abstract: Automatic memory overclocking, including: increasing a memory frequency setting for a memory module until a memory stability test fails; determining an overclocked memory frequency setting including a highest memory frequency setting passing the memory stability test; and generating a profile including the overclocked memory frequency setting.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: August 8, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: William R. Alverson, Amitabh Mehra, Anil Harwani, Jerry A. Ahrens, Grant E. Ley, Jayesh Joshi
  • Patent number: 11722156
    Abstract: A transmission apparatus includes a signal processing circuit configured to obtain information data bits to be transmitted; add known information data bits to the information data bits to generate first data blocks; perform error-correction coding on the first data blocks to generate first coded data blocks including parity data blocks such that the first coded data blocks satisfy a first code rate; remove the known information data bits from the first coded data blocks to generate second coded data blocks, the second coded data blocks satisfying a second code rate different from the first code rate; and modulate the second coded data blocks using a modulation scheme to generate a modulated signal, which is then transmitted. A number of the known information data bits depends on a number of the information data bits such that the first code rate is fixed regardless of the number of the information data bits.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: August 8, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventor: Yutaka Murakami
  • Patent number: 11716170
    Abstract: A protocol layer on top of the Bluetooth low energy (BLE) system of paired devices to provide transmission that allows arbitrary sizes of data to be sent. To guarantee transmissions, the transmissions may be validated and, if required, resent to replace data that was lost or corrupted. The protocol layer also supports Remote Procedure Calls to allow functions on either of two connected devices to be executed on one device on behalf of the other. A further protocol layer also allows high priority, short messages to temporarily interrupt the transmission of low priority, long messages.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: August 1, 2023
    Assignee: RLT IP LTD.
    Inventors: Paula A. Maddox, Richard E. Collins, Ferenc Visztra, Peter Robins
  • Patent number: 11716169
    Abstract: A method for error handling of an interconnection protocol, a controller and a storage device are provided. The method for error handling of an interconnection protocol is for use in a first device that is linkable to a second device according to the interconnection protocol, the method comprising: during or after a power mode change of a link between the first device and the second device: a) triggering, by the first device, a first line reset signal to the second device; b) performing, by the first device, suppression of detected rate overlap errors; and c) stopping the suppression of detected rate overlap errors after the first device receives a second line reset signal from the second device.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: August 1, 2023
    Assignee: SK hynix Inc.
    Inventors: Cheng Wei Yu, Wen Jyh Lin, Lan Feng Wang
  • Patent number: 11709729
    Abstract: System and methods are disclosed including a plurality of memory devices and a processing device, operatively coupled with the plurality of memory devices, to perform operations comprising: receiving, from a host system, encrypted write data appended with error-checking data; determining whether the encrypted write data contains an error based on the error-checking data; and responsive to determining that the encrypted write data contains an error, notifying the host system that the encrypted write data contains an error.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: July 25, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Juane Li, Fangfang Zhu, Jiangli Zhu, Ying Tai
  • Patent number: 11711101
    Abstract: A communication device that applies an error in an upper layer in addition to error correction in a physical layer is provided. The communication device includes an acquisition unit that acquires control information regarding forward error correction (FEC) of an upper layer and control information regarding FEC of a lower layer, an encoding-decoding unit that performs error correction encoding or decoding of an information sequence in the upper layer according to control information regarding the FEC of the upper layer, and a puncturing processing unit that performs puncturing or depuncturing in the upper layer. The information sequence after FEC encoding of the upper layer is divided into blocks, and puncturing and interleaving are performed in units of blocks.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: July 25, 2023
    Assignee: SONY GROUP CORPORATION
    Inventor: Ryota Kimura
  • Patent number: 11705989
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless communication device may receive an encoded communication, the encoded communication being encoded with a hierarchical coding scheme comprising: first layer code blocks including pairs of information bits and sets of first parity bits, and second layer code blocks including sets of second parity bits, with each set of the second parity bits associated with a subset of the first layer code blocks. The wireless communication device may decode the encoded communication based at least in part on one or more of the sets of the second parity bits that are associated with one or more of the first layer code blocks determined to have failed decoding based at least in part on one or more associated sets of the first parity bits. Numerous other aspects are described.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: July 18, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Amit Bar-Or Tillinger, Idan Michael Horn, Shay Landis, Yehonatan Dallal
  • Patent number: 11705990
    Abstract: A channel encoding method and apparatus. The method includes: obtaining A to-be-encoded information bits; mapping the A to-be-encoded information bits and L CRC bits to a first bit sequence based on an interleaving sequence, where the L CRC bits are obtained based on the A to-be-encoded information bits and a CRC polynomial, the interleaving sequence is obtained from a prestored interleaving sequence table or is obtained based on a maximum-length interleaving sequence, A+L is less than or equal to Kmax, and Kmax is a length of the maximum-length interleaving sequence; and encoding the first bit sequence. In this way, not only an encoding delay can be reduced, but also decoding has an early stop capability, so that decoding can end in advance, thereby reducing a decoding delay.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: July 18, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yunfei Qiao, Juan Song, Yinggang Du
  • Patent number: 11705986
    Abstract: A method and a system for correcting cyclic redundancy check (CRC) for a frame with last bytes changed are provided. The method includes acquiring a data frame, calculating a CRC of a modified data frame, and determining a corrected CRC for the data frame based on at least the CRC of the modified data frame and a CRC correction field calculated on the bytes to be replaced at the end of the frame. An altered data frame includes the data frame with a number of last bytes of the data frame replaced with new bytes.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: July 18, 2023
    Assignee: Synopsys, Inc.
    Inventors: Jishnu De, Jaspreet Singh Gambhir, Jitendra Puri
  • Patent number: 11705215
    Abstract: Several embodiments of systems incorporating memory sub-systems are disclosed herein. In one embodiment, a memory sub-system can include a memory component and a processing device configured to perform a background scan on a memory region of the memory component. In some embodiments, the background scan includes generating a bit error count (BEC) of a codeword saved on the memory region and saving statistical information corresponding to the BEC of the codeword to a histogram statistics log. In some embodiments, when the BEC of the codeword is greater than a BEC threshold, a refresh operation is scheduled for the memory region and/or logged. In these and other embodiments, when one or more error recovery error correction code (ECC) operations do not correct bit errors in the codeword, a refresh and/or retirement operation is schedule for the memory region and/or is logged.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: July 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Gerald L. Cadloni, Bruce A. Liikanen
  • Patent number: 11695432
    Abstract: There is provided an apparatus including an acquisition unit that acquires an information block generated from transmission data for a user and subjected to error correction coding, and an interleaving unit that interleaves a bit sequence of the information block using an interleaver unique to the user. The interleaving unit interleaves the bit sequence by interleaving each of two or more partial sequences obtained from the bit sequence.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: July 4, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Ryota Kimura, Yifu Tang
  • Patent number: 11695502
    Abstract: A packet processing method includes generating, by a processor of a network device, a first encoding task based on M original packets in a to-be-processed first data stream, where M is a positive integer, and where the first encoding task instructs to encode the M original packets; and performing, by a target hardware engine of the network device and based on the first encoding task, forward error correction (FEC) encoding on the M original packets to obtain R redundant packets, where R is a positive integer.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: July 4, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qing Chen, Jiyuan Shi, Jie Chen
  • Patent number: 11695508
    Abstract: The present disclosure relates to data processing methods and apparatus. One example method includes obtaining a first data block from first optical path data, adding padding data and the first data block into a target information bit in a first data frame to form target data, encoding the target data to obtain a first code block, and sending the first code block.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: July 4, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Sisi Ou, Zhangwei Lei, Zhiyu Zhu
  • Patent number: 11681577
    Abstract: Disclosed are various approaches for a controller that can generate and use non-stationary polar codes for encoding and decoding information. In one example, a method includes performing, by an encoder of the controller, a linear operation on at least one vector of information to be stored in a memory. The linear operation includes generating a polar encoded representation from the at least one vector of information. The linear operation also includes generating an output using at least one permutation that is based on a statistical characterization analysis of channels of the memory and a channel dependent permutation that is applied to the polar encoded representation. In some aspects, the statistical characterization analysis includes a respective reliability level of each one of the plurality of channels, and the channel dependent permutation includes an ordered permutation that orders the channels according to their respective reliability level.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: June 20, 2023
    Assignee: The Regents of the University of California
    Inventors: Marwen Zorgui, Mohammed Fouda, Ahmed M. Eltawil, Zhiying Wang, Fadi Kurdahi
  • Patent number: 11683123
    Abstract: In a packet processing method, concatenation processing is performed on other original packets other than a largest first packet in a plurality of original packets. Padding processing is performed on a concatenated packet only when a size of the concatenated packet is less than a size of a largest packet, without performing padding processing on each of the other original packets.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: June 20, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jiyuan Shi, Qing Chen, Mingli Zhang